Prosecution Insights
Last updated: May 29, 2026
Application No. 18/458,875

VIBRATION ISOLATION ASSEMBLIES FOR ELECTRONIC DEVICES

Non-Final OA §103
Filed
Aug 30, 2023
Examiner
HOQUE, MOHAMMAD M
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nxp Usa Inc.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
615 granted / 725 resolved
+16.8% vs TC avg
Moderate +9% lift
Without
With
+9.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
34 currently pending
Career history
769
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
86.7%
+46.7% vs TC avg
§102
7.9%
-32.1% vs TC avg
§112
4.2%
-35.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 725 resolved cases

Office Action

§103
DETAILED ACTION Examiner’s Note The prior arts cited in PTO-892 but not used in the current rejection are related to the claimed novelty. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182. Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Election/Restrictions Applicant’s election without traverse of Invention I (semiconductor device), reflected in claims 1-12 in the reply filed on 04/27/2026 is acknowledged. Claims 13-19 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-4, 6-10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chuah et al. (US 20220369460 A1, hereinafter Chuah‘460) in view of Wang et al. (US 6444921 B1, hereinafter Wang‘921) Regarding independent claim 1, Chuah‘460 teaches, “A system (fig. 1-6; ¶ [0018] - ¶ [0089]) comprising: an electronic circuit board (114, fig. 1C; ¶ [0028]) and a device assembly (all elements except 114) that is mechanically bonded to the electronic circuit board (114) and electrically coupled to the electronic circuit board (114); wherein the device assembly comprises: a first substrate (112, ‘rigid substrate’, ¶ [0019]) coupled to a second substrate (106, flexible substrate, ¶ [0020]) ((via an elastic structure disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate)); a flexible interconnect (110) that electrically couples the first substrate (112) to the second substrate (106); and a vibration sensitive electronic device (118) bonded to a rigid portion of the first substrate (112) and electrically coupled to the flexible interconnect (110) via the rigid portion of the first substrate (112)”. But Chuah‘460 is silent upon the provision of wherein the first substrate coupled to a second substrate via an elastic structure disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate; However, Wang‘921 teaches a similar structure, wherein the first substrate (12, fig. 1) coupled to a second substrate (20) via an elastic structure (18) disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate; It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Chuah‘460 and Wang‘921 to include elastic structure between the two substrates according to the teachings of Isaacson‘439 with a motivation to minimize the chances of motion of the flexible interconnect. See Wang‘921, column 4, lines 17-47. Note: In the above rejection, prior art Wang‘921 can be replaced by prior art Isaacson (US 3766439 A, fig. 2, element 12). Regarding claim 2, Chuah‘460 modified with Wang‘921 further teaches, “The system of claim 1, wherein the device assembly comprises a volume of molding material disposed on the rigid portion of the first substrate that encapsulates the vibration sensitive electronic device (44, 50, fig. 8, 18, Wang‘921)”. Regarding claim 3, Chuah‘460 modified with Wang‘921 further teaches, “The system of claim 1, wherein the flexible interconnect (110, fig. 1C, Chuah‘460) is a continuous polymer structure that includes one or more flexible metallic traces that electrically couple the first substrate to the second substrate”. Regarding claim 4, Chuah‘460 modified with Wang‘921 further teaches, “The system of claim 3, wherein a first portion of the flexible interconnect (110, fig. 1C, Chuah‘460) is bonded to the rigid portion of the first substrate (112) and the first portion of the flexible interconnect (110) transitions into a middle portion of the flexible interconnect that is free from the rigid portion of the first substrate; and wherein the middle portion of the flexible interconnect bends toward the second substrate (114/106) and transitions to a third portion of the flexible interconnect bonded to a rigid portion of the second substrate”. Regarding claim 6, Chuah‘460 modified with Wang‘921 further teaches, “The system of claim 1, wherein the device assembly further comprises: an additional electronic device (116, 120) disposed on the second substrate (106) and electrically coupled to the second substrate (106)”. Regarding claim 7, Chuah‘460 modified with Wang‘921 further teaches, “The system of claim 6, wherein the additional electronic device (116, 120) is electrically coupled to the first substrate (112) via the flexible interconnect (110)”. Regarding independent claim 8, Chuah‘460 teaches, “A device assembly (fig. 1-6; ¶ [0018] - ¶ [0089]) comprising: a first substrate (112, fig. 1C) coupled above a second substrate (114) ((via an elastic structure disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate)); and a flexible interconnect (110) that electrically couples the first substrate (112) to the second substrate (114); wherein a first portion of the flexible interconnect (part of element 110 inside of first substrate 112) is bonded to a rigid portion of the first substrate (112) and the first portion of the flexible interconnect transitions into a middle portion of the flexible interconnect (bending part of element 110 that is free from the rigid portion of the first substrate (112); wherein the middle portion of the flexible interconnect bends toward the second substrate and transitions to a third portion of the flexible interconnect (part of element 110 inside of first substrate 114) bonded to a rigid portion of the second substrate (114); wherein the rigid portion of the first substrate (112) is configured to receive an electronic component (118); and wherein the rigid portion of the second substrate (114) is configured to be bonded and electrically coupled to an electronic circuit (120) board via contacts on a surface of the rigid portion of the second substrate (114)”. But Chuah‘460 is silent upon the provision of wherein the first substrate coupled above a second substrate via an elastic structure disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate; and However, Wang‘921 teaches a similar structure, wherein the first substrate (12, fig. 1) coupled above a second substrate (20) via an elastic structure (18) disposed between the first substrate and the second substrate that bonds the first substrate to the second substrate It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Chuah‘460 and Wang‘921 to include elastic structure between the two substrates according to the teachings of Isaacson‘439 with a motivation to minimize the chances of motion of the flexible interconnect. See Wang‘921, column 4, lines 17-47. Regarding claim 9, Chuah‘460 modified with Wang‘921 further teaches, “The device assembly of claim 8, further comprising a vibration sensitive electronic device (118, Chuah‘460) bonded to the rigid portion of the first substrate and electrically coupled to the flexible interconnect (110) via the rigid portion of the first substrate (112)”. Regarding claim 10, Chuah‘460 modified with Wang‘921 further teaches, “The device assembly of claim 9, further comprising a volume of molding material disposed on the rigid portion of the first substrate that encapsulates the vibration sensitive electronic device (44, 50, fig. 8, 18, Wang‘921)”. Regarding claim 12, Chuah‘460 modified with Wang‘921 further teaches, “The device assembly of claim 9, wherein the device assembly further comprises an additional electronic device (120) disposed on the rigid portion of the second substrate (114) and electrically coupled to the second substrate (114)”. Claims 5 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Chuah‘460 modified with Wang‘921 as applied to claim 4 and 9 as above, and further in view of Johnson (US 20160174378 A1, hereinafter Johnson‘378). Regarding claim 5 and 11, Chuah‘460 modified with Wang‘921 teaches all the limitations described in claim 4 and 9. But Chuah‘460 modified with Wang‘921 is silent upon the provision of wherein the rigid portion of the first substrate extends along a lateral dimension by a first distance such that it overhangs an entirety of the middle portion of the flexible interconnect along the lateral dimension. However, Johnson‘378 teaches a similar structure, wherein the rigid portion of the first substrate (310/312) extends along a lateral dimension by a first distance such that it overhangs an entirety of the middle portion of the flexible interconnect (355) along the lateral dimension. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Chuah‘460 modified with Wang‘921 and Johnson‘378 to form the substrate and the interconnect according to the teachings of Johnson‘378 with a general motivation of adding protection to the interconnect. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Aug 30, 2023
Application Filed
May 15, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+9.4%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 725 resolved cases by this examiner. Grant probability derived from career allowance rate.

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