Prosecution Insights
Last updated: July 17, 2026
Application No. 18/459,129

WAFER BACKGRINDING

Non-Final OA §102§103
Filed
Aug 31, 2023
Examiner
NEIBAUR, ROBERT F
Art Unit
3723
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
285 granted / 374 resolved
+6.2% vs TC avg
Strong +33% interview lift
Without
With
+32.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
34 currently pending
Career history
403
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
78.4%
+38.4% vs TC avg
§102
5.7%
-34.3% vs TC avg
§112
15.4%
-24.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 374 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 1-7 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 06/04/2026. Status of Claims This action is in reply to the response filed on 06/04/2026. Claims 1-7 are withdrawn. Claims 8-20 are currently pending and have been examined. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 8-10, 12-13, and 15-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Masaki (WIPO PUB No. WO2021250996) as evidence by the machine translation of Masaki, hereinafter referred to as Masaki. Regarding claim 8, Masaki discloses a method for backgrinding a wafer comprising [Masaki, fig 7]: seating a device on a grinding table [Masaki, figs 7a and 3a, 30 is mounted on 16/40], wherein the device comprises a shim for a wafer [Masaki, fig 7a, 30 is a shim for 20]; seating grinding tape adhered to a first side of a wafer on the device [Masaki, fig 7a, 21 is adhered to 20 and seated to 30], wherein the shim [Masaki, fig 7b, 30] has a cross section shaped to mirror a cross section of a step gap formed at an edge of the grinding tape that covers solder balls on the first side of the wafer [Masaki, fig 7b, 31 and 32 mirrors the shape of 21 that covers 26 and B], such that the shim and the grinding tape form a planer surface on the grinding table [Masaki, fig 7b, showing that 30 and 21 form a planar surface on 16/40]; and backgrinding a second side of the wafer to form a planer surface on the second side of the wafer [Masaki, fig 7c, 15a grinds back surface 22 of 20]. Regarding claims 9-10, Masaki further discloses the method of claim 8, further comprising: removing the wafer from the grinding table; and singulating dies in the wafer [Masaki, page 3, pp 0003] (clm 9); and further comprising removing the grinding tape from the singulated dies to expose the solder balls [Masaki, page 2, pp 0003] (clm 10). Regarding claim 12, Masaki further discloses the method of claim 8, wherein the device is a flattening jig [Masaki, fig 3b, 30, 40 and 16 form a flattening jig]. Regarding claim 13, Masaki further discloses the method of claim 8, wherein the step gap has a height measured from a greatest thickness of the grinding tape to a point on a solder ball proximate to the edge of the grinding tape [Masaki, fig 7b, showing 26 has a thickness from the surface of 21 and 20 to the surface of B]. Regarding claim 15, Masaki further discloses the method of claim 8, wherein the planer surface formed by the shim and the grinding tape is configured to be placed on a vacuum table of the grinding table [Masaki, page 21, pp 0035, 40 is porous and is a vacuum chuck table]. Regarding claim 16, Masaki further discloses the method of claim 8, wherein the shim has a circular shape [Masaki, fig 3a, showing 30 is circular]. Regarding claim 17, Masaki further discloses the method of claim 8, wherein the wafer is a wafer scale chip package (WCSP) wafer [Masaki, fig 2b, C is a chip, such that 20 is wafer used to making chips]. Regarding claim 18, Masaki discloses a method for backgrinding a wafer [Masaki, fig 7] comprising: seating a device on a grinding table [Masaki, figs 7a and 3a, 30 is mounted on 16/40], wherein the device comprises a shim for a wafer[Masaki, fig 7a, 30 is a shim for 20]; seating grinding tape adhered to a first side of a wafer on the device [Masaki, fig 7a, 21 is adhered to 20 and seated to 30], wherein the grinding tape covers solder balls on the first side of the wafer [Masaki, fig 7b, 21 covers B]; and backgrinding a second side of the wafer to form a planer surface on the second side of the wafer [Masaki, fig 7c, 15a grinds back surface 22 of 20], wherein the backgrinding comprises: applying pressure on the second side of the wafer [Masaki, fig 7c, 15a applies pressure to 22], wherein the shim of the device is shaped to curtail bending of the wafer about a solder ball of the solder balls that is closest to an edge of the grinding tape [Masaki, page 23, pp 0037, 32 is shaped to 26, which is shaped to B]; and removing a portion of the second side of the wafer to provide a backgrinded wafer [Masaki, fig 2 showing the final product of 20], and the backgrinded wafer has a continuous lattice [Masaki, fig 2a, 20 has lattice structure formed by C]. Regarding claims 19-20, Masaki further discloses the method of claim 18, wherein the device is a flattening jig [Masaki, fig 3b, 30, 40 and 16 form a flattening jig] (clm 19); and wherein the shim of the device has a cross section shaped to mirror a cross section of a step gap formed at the edge of the grinding tape [Masaki, fig 7b, showing that 32 mirrors the step gap 26 formed at the edge of 21], such that the shim and the grinding tape form a planer surface on the grinding table [Masaki, fig 7c, showing that 30 and 21 form a planar surface on 40] (clm 20). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 11 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Masaki (WIPO PUB No. WO2021250996) as evidence by the machine translation of Masaki, as applied to claim 8 above, alone. Regarding claim 11, Masaki discloses the method of claim 8, and further discloses that a surface roughness measurement is made on the wafer [Masaki, page 16, pp 0041, surface roughness is measured on 20, where the office interprets the surface roughness measurement to be a measurement of planar surface variance teaching that one of ordinary skill needs to know the surface roughness and therefore the variance of the planar suface], and further discloses that the stop gap is at a height of the bump [Masaki, page 22, pp 0036, where 26 is the height of the bump]. However, Masaki does not explicitly disclose the planer surface on the second side of the wafer has a variance of 5 micrometers or less (clm 11), and the step gap has a height of about 40 micrometers to about 60 micrometers (clm 14). Regarding the planar surface variance, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Masaki to have the surface variance be 5 micrometers or less since it has been held that “where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device [MPEP2144.04(IV)(A)]”. In the instant case, the device of Masaki would not operate differently with the claimed planar surface variance (surface roughness) and since the surface roughness is already measured, the device would function appropriately having the claimed planar surface variance. Further, it appears that applicant places no criticality on the claimed range, indicating simply that the planar surface variance “in some examples” be within the claimed ranges (applicant’s specification pp [0041]). Regarding the step gap height, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Masaki to have a step gap height (or height of the bumps) of between about 40 micrometers to about 60 micrometers since it has been held that “where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device [MPEP2144.04(IV)(A)]”. In the instant case, the device of Masaki would not operate differently with the claimed step gap height (bump heights), the device would function appropriately having the claimed step gap heights (bump heights). Further, it appears that applicant places no criticality on the claimed range, indicating simply that the step gap “for example can be” within the claimed range (applicant’s specification pp [0025]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT NEIBAUR whose telephone number is (571)270-7979. The examiner can normally be reached M - F 8:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Posigian can be reached at 313-446-6546. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERT F NEIBAUR/Primary Examiner, Art Unit 3723
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Prosecution Timeline

Aug 31, 2023
Application Filed
Jun 18, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+32.7%)
2y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 374 resolved cases by this examiner. Grant probability derived from career allowance rate.

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