Prosecution Insights
Last updated: August 18, 2026
Application No. 18/459,230

INTEGRATED CIRCUIT WITH INDUCTOR IN MAGNETIC PACKAGE

Final Rejection §103
Filed
Aug 31, 2023
Examiner
LEE, EUGENE
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
748 granted / 914 resolved
+13.8% vs TC avg
Moderate +6% lift
Without
With
+5.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
42 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
59.9%
+19.9% vs TC avg
§102
16.5%
-23.5% vs TC avg
§112
13.3%
-26.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 914 resolved cases

Office Action

§103
DETAILED ACTION Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 thru 15, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hou et al. US 2020/0211959 A1 in view of Higuchi et al. US 6,207,296 B1 in view of Brassfield et al. US 2020/0211760 A1, which was disclosed in the applicant’s IDS filed 5/22/26. Hou discloses (see, for example, FIG. 2, and 1) a package integrated circuit (IC) 100 comprising a package substrate 110, electronic device 102, metal interconnects 128, insulation material 130, inductor 120, and magnetic molding material 125. In paragraph [0018], Hou discloses the magnetic molding material 125 having ferrite M33, nickel, ferrite N41, iron, etc. Hou does not disclose an insulation material … including non-conductive particles. However, Higuchi discloses (see, for example, column 1, lines 11-63) an inorganic filler which can be highly loaded in resin compositions that are used in a semiconductor device encapsulated with a cured product of the composition. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have an insulation material … including non-conductive particles in order to reduce melt viscosity and water absorption to produce a more reliable insulation material. Even though Hou in view of Higushi discloses (see, for example, paragraph [0018] of Hou) the magnetic molding material 125 having ferrite M33, nickel, ferrite N41, iron, etc., Hou in view of Higuchi does not clearly disclose the magnetic molding material includes conductive particles. However, Brassfield discloses (see, for example, FIG. 6) a packaged integrated circuit 600 comprising a magnetic molding material 502. In paragraph [0032], Brassfield further discloses the magnetic molding material may include a ferromagnetic material, in the form of particles that are dispersed throughout the mold compound. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have the magnetic molding material includes conductive particles in order to enhance the operation of the inductor, and better control the amount of permeability within the inductor and the packaged integrated circuit. Regarding claim 2, see, for example, the abstract wherein Higuchi discloses loading inorganic filler into an epoxy resin composition, and column 4, lines 16-21 wherein Higuchi discloses non-electrically conducive particles such as silica, etc.. Regarding claims 3, and 12, see, for example, paragraph [0032] wherein Brassfield discloses ferromagnetic particles dispersed in a resin. Regarding claims 4, and 13, see, for example, paragraph [0018] wherein Hou discloses multiple metals formed in the magnetic material, which lowers the breakdown voltage in the magnetic material Regarding claim 5, see, for example, FIG. 2 wherein Hou discloses a semiconductor die 104. Regarding claim 6, see, for example, paragraph [0016] wherein Hou discloses a capacitor. Regarding claims 7, and 14, see, for example, FIG. 2, and 3 wherein Hou discloses the inductor has a coil portion 120a-120d, first stilt 214, and second stilt 210, the first and second stilts are coupled to the package substrate 110 at opposing sides of the electronic device 102. Regarding claim 8, see, for example, FIG. 3 wherein Hou discloses first metal post 135 and second metal post 135. Regarding claim 9, see, for example, FIG. 2 wherein Hou discloses metal pads within the substrate 110 underneath the metal posts and metal interconnects. Regarding claims 10, and 15, see, for example, FIG. 2, and 1 wherein Hou discloses the insulation material 130 covers at least a part of the package substrate 110. Regarding claim 11, see the rejection for claims 1, and 2 above. Regarding claim 21, see, for example, FIG. 2 wherein Hou discloses the magnetic molding material 125 fills spaces within the inductor 120 and spaces surrounding the inductor 120. Response to Arguments Applicant’s arguments with respect to claim(s) 1-15, and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. INFORMATION ON HOW TO CONTACT THE USPTO Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE LEE whose telephone number is (571)272-1733. The examiner can normally be reached M-F 730-330 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Eugene Lee July 29, 2026 /EUGENE LEE/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Aug 31, 2023
Application Filed
Jan 22, 2026
Non-Final Rejection mailed — §103
May 22, 2026
Response Filed
Jul 31, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12701847
DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME
3y 6m to grant Granted Aug 04, 2026
Patent 12690227
SEMICONDUCTOR DEVICE
2y 8m to grant Granted Jul 21, 2026
Patent 12684826
AVALANCHE-PROTECTED TRANSISTORS USING A BOTTOM BREAKDOWN CURRENT PATH AND METHODS OF FORMING THE SAME
3y 12m to grant Granted Jul 14, 2026
Patent 12677650
SEMICONDUCTOR STRUCTURES AND METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE
3y 0m to grant Granted Jul 07, 2026
Patent 12666995
PACKAGE STRUCTURE
2y 10m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
88%
With Interview (+5.7%)
2y 8m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 914 resolved cases by this examiner. Grant probability derived from career allowance rate.

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