DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Group I (claims 1-15) in the reply filed on 12/29/25 is acknowledged.
Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/29/25.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 thru 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sato et al. US 2021/0343662 A1 in view of Kawabata US 2018/0158782 A1. Sato discloses (see, for example, FIG. 9) a package integrated circuit (IC) comprising a package substrate 802, electronic device 804, insulation material 834, and inductor 810/812. Sato does not clearly disclose metal interconnects coupled between the electronic device and the package substrate. However, Kawabata discloses (see, for example, FIG. 3) a package integrated circuit 11C comprising metal interconnects 24 packaged between the electronic device 31, and the package substrate 20. It would have been obvious to one of ordinary skill in the art to have metal interconnects coupled between the electronic device and the package substrate in order to improve the connection between the electronic device and package substrate, and also provide further connections outside of the substrate to make more robust electrical devices according to the preferences of the user.
Sato does not clearly disclose magnetic material on the insulating material and encapsulating the inductor, in which the magnetic material is different from the insulation material. However, Kawabata discloses (see, for example, FIG. 3) a package integrated circuit 11C comprising a magnetic material 50 on an insulating material 40. It would have been obvious to one of ordinary skill in the art to include magnetic material on the insulating material and encapsulating the inductor, in which the magnetic material is different from the insulation material in order to improve the effective permeability and reduce noise within the package integrated circuit.
Regarding claim 2, Sato does not clearly disclose the insulation material includes non-electrically conductive particles and a first epoxy resin in which the non-electrically conductive particles are suspended; however, Kawabata discloses (see, for example, paragraph [0042] and [0045]) an insulation material 40 including non-magnetic filler. It would have been obvious to one of ordinary skill in the art to have the insulation material includes non-electrically conductive particles and a first epoxy resin in which the non-electrically conductive particles being suspended in order to enhance insulating performance and withstand voltage performance of the insulating material.
Regarding claims 3, and 12, see, for example, paragraph [0046] wherein Kawabata discloses magnetic fillers dispersed in a thermosetting resin material.
Regarding claims 4, and 13, see, for example, paragraph [0048] wherein Kawabata discloses multiple metals formed in the magnetic material, which lowers the breakdown voltage in the magnetic material
Regarding claim 5, see, for example, FIG. 9 wherein Sato discloses a semiconductor die 804.
Regarding claim 6, see, for example, paragraph [0034] wherein Sato discloses a capacitor.
Regarding claims 7, and 14, see, for example, FIG. 9 wherein Sato discloses the inductor has a coil portion 810/812, first stilt 828, and second stilt 818, the first and second stilts are coupled to the package substrate 802 at opposing sides of the electronic device 804.
Regarding claim 8, see, for example, FIG. 9 wherein Sato discloses first metal post 830 and second metal post 822.
Regarding claim 9, see, for example, FIG. 9 wherein Sato discloses first metal pad 808, and second metal pad 806, and FIG. 3 wherein Kawabata discloses third metal pads 23.
Regarding claims 10, and 15, see, for example, FIG. 9 wherein Sato discloses the insulation material 834 covers at least a part of the package substrate 802.
Regarding claim 11, see the rejection for claims 1, and 2 above. Further, in paragraph [0034], Sato discloses the package substrate includes lead frame.
INFORMATION ON HOW TO CONTACT THE USPTO
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE LEE whose telephone number is (571)272-1733. The examiner can normally be reached M-F 730-330 PM.
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Eugene Lee
January 15, 2026
/EUGENE LEE/Primary Examiner, Art Unit 2815
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