DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-10 in the reply filed on 02/27/2026 is acknowledged.
Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group II invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02/27/2026.
Claim Objections
Claims 6, 9, and 10 objected to because of the following informalities:
Claim 6 recites “the length” (line 4) which should be replaced with “a length”.
Claim 9 recites “the number” and “the total number” (lines 1-2) which should be replaced with “a number” and “a total number”, respectively.
Claim 10 recites “the length” (line 2) which should be replaced with “a length”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent No. 10,032,935 to Higuchi et al. (hereinafter Higuchi).
With respect to claim 1, Higuchi discloses a semiconductor device (e.g., NAND-type flash memory, see the annotated Fig. 5 below) (Higuchi, Figs. 1-5, Col. 1, lines 15-17; Col. 2, lines 1-67; Cols. 3-7), comprising:
a film stack (12) (Higuchi, Figs. 4-5, Col. 3, lines 38-55) including first films (e.g., 14A/14B and 51, W/TiN and alumina) and first insulating films (e.g., 15, SiO2) alternatingly stacked in a first direction (e.g., the Z-direction), the first films (e.g., 14A/14B and 51, W/TiN and alumina) each including an electrode layer (14A/14B) and a second insulating film (51, alumina) disposed on an upper face, a lower face, and a side face of the electrode layer (14A/14B);
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a semiconductor layer (20, a channel of the memory cell MC) (Higuchi, Figs. 4-5, Col. 4, lines 33-48) extending in the first direction (e.g., the Z-direction);
a charge accumulating layer (40) (Higuchi, Figs. 4-5, Col. 4, lines 33-36; Col. 5, lines 1-67) between the semiconductor layer (20) and the film stack (12) in a second direction (e.g., X-direction) perpendicular to the first direction (e.g., Z-direction), the charge accumulating layer (40) having first portions (e.g., a thicker portion 40B) (Higuchi, Figs. 4-5, Col. 5, lines 1-26) between the first films (14/51) and the semiconductor layer (20) in the second direction (e.g., X-direction) and second portions (e.g., a thin portion 40A) between the first insulating films (15) and the semiconductor layer (20) in the second direction (e.g., X-direction), the first portions (40B) each having a first thickness in the second direction, and the second portions each having a second thickness in the second direction, the second thickness (e.g., the thin portion 40A is thinner than the first portion 40B) being less than the first thickness, wherein
at least one of the first portions (40B) has a first width (e.g., a width of the charge-storing part 40B) (Higuchi, Figs. 4-5, Col. 5, lines 30-50) in the first direction (e.g., Z-direction), and
at least one of the first films (14/51) (Higuchi, Figs. 4-5, Col. 5, lines 30-50) has a second width in the first direction (e.g., Z-direction), the second width being less than the first width.
Regarding claim 2, Higuchi discloses the semiconductor device according to claim 1. Further, Higuchi discloses the semiconductor device, wherein the first insulating films (e.g., 15, SiO2) (Higuchi, Figs. 4-5, Col. 3, lines 49-51) comprise silicon and oxygen.
Regarding claim 3, Higuchi discloses the semiconductor device according to claim 1. Further, Higuchi discloses the semiconductor device, wherein the second insulating film (51, alumina (Al2O3)) (Higuchi, Figs. 4-5, Col. 3, lines 54-55) comprises a metal element (e.g., aluminum (Al)).
Regarding claim 4, Higuchi discloses the semiconductor device according to claim 3. Further, Higuchi discloses the semiconductor device, wherein the metal element is aluminum (Al) (Higuchi, Figs. 4-5, Col. 3, lines 54-55).
Regarding claim 5, Higuchi discloses the semiconductor device according to claim 1. Further, Higuchi discloses the semiconductor device, further comprising: third insulating films e.g., (blocking insulation film 50) (Higuchi, Figs. 4-5, Col. 4, lines 33-36; Col. 7, lines 11-23) between each first portion (40B) and the first films (14/51) in the second direction (e.g., the X-direction).
Regarding claim 6, Higuchi discloses the semiconductor device according to claim 1. Further, Higuchi discloses the semiconductor device, further comprising: a fourth insulating film (e.g., tunnel insulation film 30) (Higuchi, Figs. 4-5, Col. 4, lines 33-36; lines 62-67) between the semiconductor layer (20) and the film stack (12) in the second direction (e.g., the X-direction), wherein the fourth insulating film (30) is a continuous film along the length of the semiconductor layer (20) in the first direction (e.g., the Z-direction).
Regarding claim 7, Higuchi discloses the semiconductor device according to claim 1. Further, Higuchi discloses the semiconductor device, wherein the charge accumulating layer (40) comprises silicon and nitrogen (e.g., silicon nitride (SiN) and silicon oxynitride (SiON)) (Higuchi, Figs. 4-5, Col. 6, lines 1-8).
Regarding claim 8, Higuchi discloses the semiconductor device according to claim 7. Further, Higuchi discloses the semiconductor device, wherein the charge accumulating layer (40) further comprises oxygen (e.g., silicon oxynitride (SiON) including oxygen) (Higuchi, Figs. 4-5, Col. 6, lines 1-5).
Regarding claim 10, Higuchi discloses the semiconductor device according to claim 7. Further, Higuchi discloses the semiconductor device, wherein the charge accumulating layer (40) (Higuchi, Figs. 4-5, Col. 4, lines 33-36; Col. 6, lines 6-58) is continuous along the length of the semiconductor layer (20) in the first direction (e.g., the Z-direction).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US Patent No. 10,032,935 to Higuchi in view of Kang et al. (US 2018/0166458, hereinafter Kang).
Regarding claim 9, Higuchi discloses the semiconductor device according to claim 8. Further, Higuchi does not specifically disclose the semiconductor device, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer.
However, Kang teaches forming a non-volatile memory cell (Kang, Fig. 5a, ¶0008, ¶0046-¶0054) comprising a charge storage layer (548b) (Kang, Fig. 5a, ¶0052) comprising a silicon oxynitride (SiON) including silicon, oxygen, and nitrogen in various stoichiometries to provide desired trap density and to located a centroid of the trapped charge within a top of the nitride layer to improve charge retention. Specifically, the charge storage layer comprises an oxygen-rich SiON layer with a concentration of oxygen from about 15 % to about 40 %, and an oxygen-lean SiON layer with a concentration of oxygen less than about 5 %.
Thus, Kang recognizes that a concentration of oxygen of the charge storage layer impacts trap density and charge retention. Thus, a concentration of oxygen of the charge storage layer is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, a concentration of oxygen of the charge storage layer as Kang has identified a concentration of oxygen of the charge storage layer as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at specific concentration of oxygen of the charge storage layer, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer, in order to provide desired trap density and to improve charge retention as taught by Kang (¶0052) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Higuchi by optimizing a concentration of oxygen of charge accumulating layer as taught by Kang to have the semiconductor device, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer, in order to provide improved non-volatile memory cell including a charge accumulating layer in stoichiometry to have a desired trap density and to improve charge retention (Kang, ¶0002, ¶0008, ¶0052).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US Patent No. 10,032,935 to Higuchi in view of Pang et al. (US 2016/0093636, hereinafter Pang) and Kang (US 2018/0166458).
Regarding claim 9, Higuchi discloses the semiconductor device according to claim 8. Further, Higuchi does not specifically disclose the semiconductor device, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer.
However, Pang teaches forming a charge-trapping layer arranged vertically in the tree-dimensional (3D) stacked memory structure (Pang, Figs. 7-8, ¶0033-¶0037, ¶0100-¶0146), wherein the charge-trapping layer of SiON comprises Si-rich SiON portions adjacent to the conductive layers of the stack and not Si-rich for the dielectric-adjacent portions of the stack (Pang, Figs. 7-8, ¶0122). Different atomic percent of silicon (Si) and oxygen (O) in the SiON layer controls the refractive index (RI) of the charge-trapping layer, wherein the RI increases (Pang, Figs. 7-8, ¶0136) in proportion to the amount of Si and the amount of oxygen decreases in the Si-rich SiON portions, such that the portions of the charge-trapping layer which are adjacent to the word line layers have a refractive index which is higher than a refractive index of the portions of the charge-trapping layer which are adjacent to the dielectric layers. The charge-trapping region with a higher refractive index guarantees the proper program, erase and endurance characteristics of the memory cells (Pang, Figs. 7-8, ¶0100); and the charge-trapping region with a lower refractive index has a lower trap density, thus reducing the possibility of trap-assisted tunneling and suppressing the lateral charge migration. Moreover, the larger the difference between the higher and lower refractive indexes, the more effective the isolation between the memory cells so that better data retention is achieved.
Further, Kang teaches forming a non-volatile memory cell (Kang, Fig. 5a, ¶0008, ¶0046-¶0054) comprising a charge storage layer (548b) (Kang, Fig. 5a, ¶0052) comprising a silicon oxynitride (SiON) including silicon, oxygen, and nitrogen in various stoichiometries to provide desired trap density and to located a centroid of the trapped charge within a top of the nitride layer to improve charge retention. Specifically, the charge storage layer comprises an oxygen-rich SiON layer with a concentration of oxygen from about 15 % to about 40 %, and an oxygen-lean SiON layer with a concentration of oxygen less than about 5 %.
Thus, Pang recognizes that a concentration of oxygen of the charge storage layer impacts lateral charge migration and charge retention. Further, Kang recognizes that a concentration of oxygen of the charge storage layer impacts trap density and charge retention. Thus, a concentration of oxygen of the charge storage layer is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, a concentration of oxygen of the charge storage layer as Pang and Kang have identified a concentration of oxygen of the charge storage layer as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at specific concentration of oxygen of the charge storage layer, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer, in order to provide desired trap density and to improve charge retention as taught by Kang (¶0052) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Higuchi by optimizing a concentration of oxygen of the Si-rich SiON portions of the charge-trapping layer adjacent to the word line layers and a concentration of oxygen of the not-Si-rich SiON portions of the charge-trapping layer adjacent to the dielectric layers as taught by Pang, wherein the concentration of oxygen of the Si-rich SiON portions is less than 5 % as taught by Kang to have the semiconductor device, wherein the number of oxygen atoms in the charge accumulating layer is 12% or less of the total number of silicon atoms, nitrogen atoms, and oxygen atoms in the charge accumulating layer, in order to suppress the lateral charge migration and improve data retention; and to provide improved non-volatile memory cell including charge accumulating layer stoichiometries to have a desired trap density and to improve charge retention (Pang, ¶0033-¶0037, ¶0100, ¶0136; Kang, ¶0002, ¶0008, ¶0052).
Conclusion
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/NATALIA A GONDARENKO/Primary Examiner, Art Unit 2891