Prosecution Insights
Last updated: August 17, 2026
Application No. 18/459,398

MANAGING CONDUCTIVE CONNECTIONS FOR SEMICONDUCTIVE DEVICES

Final Rejection §112
Filed
Aug 31, 2023
Priority
Jul 25, 2023 — continuation of PCTCN2023109046
Examiner
LUKE, DANIEL M
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Yangtze Memory Technologies Co., Ltd.
OA Round
2 (Final)
71%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
499 granted / 701 resolved
+3.2% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
21 currently pending
Career history
725
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
49.8%
+9.8% vs TC avg
§102
25.9%
-14.1% vs TC avg
§112
21.8%
-18.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 701 resolved cases

Office Action

§112
DETAILED ACTION This office action is in response to the amendment filed 5/19/2026. Currently, claims 21-40 are pending. Claims 1-20 have been canceled. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters “370” and “372” has been used to designate both the layer above “362” in FIG. 3F and a dielectric layer/protective layer in FIG. 3G. Furthermore, the drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the plurality of conductive interconnections extending through a cover layer on top of the conductive pad layer to contact with the first conductive pad and the second conductive pad in the conductive pad layer, wherein the controller is coupled to the memory device through at least one of the plurality of conductive interconnections (claim 34) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 26 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 26 recites the limitation “a plurality of pad openings on top of the first conductive pad”. There is no support for this limitation in the disclosure as originally filed. The pad openings are discussed in para. [0049] and [0077]. There is no indication that an individual pad has a plurality of pad openings associated therewith. On the contrary, para. [0077] seems to indicate that there would be one opening per conductive pad (“one or more pad openings 374 (e.g., the pad openings 174 of FIG. 1) are formed through the protective layer 372 and the dielectric layer 370 to expose one or more corresponding conductive pads 364”) (emphasis added). The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 21-40 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims define directions such as “a first direction” (claim 21, line 3) and “a second direction” (claim 21, line 8). However, the claims describe these directions in a manner that makes it unclear what these directions actually are, particularly in light of the originally filed disclosure. For instance, claim 21 describes the first direction as the direction along which the alternating first conductive layers and isolating layers are arranged (claim 21, lines 2-3). Referencing FIG. 1, “132” and “134” are the alternating first conductive layers and isolating layers, respectively. These layers are arranged along the z-direction, implying that the claimed first direction equates to the z-direction. Moreover, claim 21 recites “wherein a thickness of the semiconductor layer in the first direction is greater than a thickness of the second conductive layer” in lines 9-10), further implying that the first direction equates to the z-direction. Next, claim 21 describes the second direction as perpendicular to the first direction and the direction in which the first region is located at a side of the second region. The first region is described in the claims as the region of the array structure above which the second conductive layer is arranged (claim 21, lines 5-6). The second conductive layer, meanwhile, is described as being coupled to a plurality of strings of memory cells extending through the array structure, as well as being arranged above the first region. Again referencing FIG. 1, considering “136” is described in the specification as being the strings of memory cells, this leaves “135” to be the second conductive layer and the region therebelow to be the first region of the array structure. Meanwhile, considering “144” is described as a remaining part of a semiconductor substrate that has been thinned (see also para. [0057]) and that the semiconductor layer is arranged above the second region of the array substrate (claim 21, line 7), this leaves the region below the semiconductor layer 144 to be the claimed second region. Returning to the limitation “the first region is located at a side of the second region in a second direction perpendicular to the first direction”, this would leave the second direction as being either the x- or y-direction, which are perpendicular to the z-direction. It is not particularly clear which (x or y) direction would be considered to be the second direction, as FIG. 1 shows the y-direction as being the left-right direction at the right side of the device, but shows the x-direction as being the left-right direction at the middle of the device. Regardless, based on the limitations discussed thus far, the first direction is the z-direction and the second direction is one of the x- or y-directions. However, claim 21 goes on to recite “a plurality of conductive connections extending in the second direction and positioned separately from the array structure” (lines 11-12). According to the specification, “152a/b” are the conductive connections (para. [0050]). However, FIG. 1 shows them extending in the z-direction, i.e. the claimed first direction. There is no indication that they extend in the x- or y-directions. This limitation appears to contradict the other limitations defining the second direction, and thus exactly what the second direction is becomes unclear. Furthermore, claim 21 recites “a conductive pad layer extending in the first direction and arranged above the array structure and the conductive connections”. According to the specification “160” is the conductive pad layer (para. [0052]). As seen in FIG. 1, the conductive pad layer appears to extend in the x- or y-directions, but not in the z-direction, i.e. the claimed first direction. Thus, this limitation in combination with the others defining the first direction leads to confusion as to what exactly is the first direction. Finally, claim 21 recites the limitation “the conductive pad layer comprises a first conductive pad coupled to a portion of the conductive pad layer through a first conductive via”. According to the specification, “160” is the conductive pad layer and “164a/b/c” is the conductive pad, which is located in the conductive pad layer (para. [0048]). It is not clear how a conductive pad located within a conductive pad layer could be considered to be coupled to the conductive pad layer in which the conductive pad resides. FIG. 1 clearly shows that the via 154a/b does not couple a conductive pad to a portion of the conductive pad layer. Independent claim 33 recites these same limitations, and is thus rejected on the same grounds. The dependent claims depending on either claim 21 or claim 33 are also rejected, as they recite the same limitations via dependency. Besides the independent claims, some of the dependent claims recite limitations rendering the claim indefinite. Claim 25 recites the limitation “a second die integrated in the first die”. It is not clear how this arrangement could be possible. More particularly, it is not clear how one die could be integrated in another die. Claim 26 recites the limitation “a second plurality of conductive pads in the conductive pad layer”. It is not clear what these second plurality of conductive pads are in light of the specification, or how they relate to the claimed first and second conductive pads. Claims 27 and 35 recite the limitation “wherein the second conductive layer is arranged above the semiconductor layer and extends in the first direction”. This further confuses what direction is considered to be the first direction. As discussed above, there are recited limitations that imply that the first direction is the z-direction. However, it is not clear how it could be said that the second conductive layer (135 in FIG. 1) extends in the z-direction above semiconductor layer, as it clearly extends in a direction perpendicular to the z-direction at that location. Similarly, claims 28 and 36 recites the limitation “a second isolation layer extending in the first direction between the semiconductor layer and the second conductive layer”. This would equate to what remains of layer 326 (FIG. 3B) after processing, which is not explicitly labeled in FIG. 1. it is not clear how it could be said that this isolation layer extends in the z-direction, as it clearly extends in a direction perpendicular to the z-direction at that location. Response to Arguments Applicant's arguments filed 5/19/2026 have been fully considered but they are not persuasive. Regarding the drawings, amended FIG. 3B is sufficient to overcome that previous objection. The limitations from canceled claim 14 do not appears in the pending claims, and thus that argument is moot. However, with respect to the objection to FIG. 3F, the amendment is not sufficient to overcome the objection. Applicant argues that the layers in FIG. 3F represent the dielectric layer 370 and protective layer 372 discussed in para. [0076], and thus the drawings were amended accordingly. However, those layers in FIG. 3F are clearly different from the dielectric layer 370 and protective layer 372. This is clearly seen comparing FIG. 3F and 3G, which shows the dielectric layer 370 and protective layer 372 formed over the layer from FIG. 3F after patterning to form the pads. With regards to the prior art rejections, these arguments are moot as those references are no longer relied upon in rejecting the claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL LUKE/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Aug 31, 2023
Application Filed
Jan 20, 2026
Non-Final Rejection mailed — §112
May 19, 2026
Response Filed
Jul 17, 2026
Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
71%
Grant Probability
90%
With Interview (+18.7%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 701 resolved cases by this examiner. Grant probability derived from career allowance rate.

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