Prosecution Insights
Last updated: April 19, 2026
Application No. 18/459,913

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM

Final Rejection §103§112
Filed
Sep 01, 2023
Examiner
CARRILLO, BIBI SHARIDAN
Art Unit
1711
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Tokyo Electron Limited
OA Round
4 (Final)
62%
Grant Probability
Moderate
5-6
OA Rounds
2y 8m
To Grant
45%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
470 granted / 759 resolved
-3.1% vs TC avg
Minimal -17% lift
Without
With
+-17.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
44 currently pending
Career history
803
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
44.0%
+4.0% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
33.3%
-6.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 759 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 16-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 16-18 are indefinite because the claims are not further limiting as claim 1 has been amended to recite etching by sequentially supplying multiple chemicals (HF, SC-1) to the rear surface of the substrate. Claim Rejections - 35 USC § 103 3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 6. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Demizu et al. (US6787797B2) in view Mizuno et al. (US2012/0067846A1). Re claim 1, Demizu et al. teach a method of processing a semiconductor wafer comprising forming an oxide film on the backside of the wafer, partially removing the oxide film by etching with HF, and polishing the wafer backside (claim 13, Example 1). Demizu et al. teach the invention substantially as claimed with the exception of etching with a first chemical of HF and a second chemical of SC-1 (ammonia/hydrogen peroxide/water), wherein the supply of the second chemical is shorter than the supply time of the first chemical. Mizuno et al. teach a method of processing a substrate comprising treating the rear surface with HF followed by a second processing liquid comprising ammonia/hydrogen peroxide mixture (abstract; Fig. 4, steps S11, S12) to remove a film on the rear surface (paragraph 25), wherein the processing time of the HF maybe 2-10 minutes (paragraph 81) and the processing time of the second processing liquid is 1-10 minutes. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to have modified the method of Demizu et al. to include etching with HF and SC1, wherein the supply time of the second chemical liquid is shorter than the supply time of the first chemical liquid, as taught by Mizuno et al. for purposes of performing the same function of removing film from the substrate surface. 7. Claim(s) 2-4, 12, and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Demizu et al. (US6787797B2) in view of Mizuno et al. (US2012/0067846A1) and further in view of Ookawa et al. (TW202113962A; machine translation). Re claim 2, Demizu et al. in view of Mizuno et al. fail to teach cleaning with a brush after polishing. Ookawa et al. teach a method of processing semiconductor devices comprising performing various processes in including cutting, slicing, followed by flattening the surface by etching and polishing. Fig. 7(e) teaches that the back surfaces are scrubbed and cleaned after polishing. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the modified method of Demizu et al. to include a brush after polishing, as taught by Ookawa et al., for purposes of cleaning the substrate surface to remove residual contaminants. Re claim 3, refer to page 7 of the machine translation of Ookawa et al. which teaches supplying cleaning liquid during the polishing process. Re claim 4, Demizu et al. in view of Ookawa et al. do not a spray mist. However, Ookawa et al. teach supplying a cleaning liquid with a nozzle 160, and the skilled artisan would reasonably expect spraying the nozzle would result in a mist on the substrate surface. Additionally, claims 4 and 12 are broadly interpreted as any liquid would read on a cleaning liquid and therefore supplying a liquid after cleaning with a brush, would read on the wet etching of Fig. 7f, wherein the rear surface is being supplied with a liquid after the surface is treated with a brush in Fig. 7e. Re claims 16-18, refer to the teachings of Mizuno et al. 8. Claim(s) 7 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Demizu et al. (6787797) in view of Mizuno et al. (US2012/0067846A1) and further in view of Hisashi (JP2004-071836A). Demizu et al. in view of Mizuno et al. teach the invention substantially as claimed with the exception of the silicon oxide or silicon nitride films on a semiconductor substrate. Hisashi et al. teach a method of manufacturing a semiconductor substrate comprising a silicon oxide film deposited on the back surface and further teaches cleaning the back surface of the wafer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include a silicon oxide film, as taught by Hisashi et al., as such films are conventional during the manufacturing of the semiconductor substrate. Response to Arguments 9. The rejection of the claims as being anticipated by Demizu et al. is withdrawn. The newly amended limitations are taught by the prior art of Mizuno et al. Additionally, upon review of applicant’s specification (paragraphs 72-74), it appears that there is no criticality with respect to the supply time of the first and second processing liquids. The examiner further takes the position that absent of a showing of criticality and/or unexpected results, it would be well within the level of the skilled artisan to adjust the supply times of the etching liquids depending upon such factors as the concentration and temperature of the processing fluids. Additionally, it is conventionally well known in the art, as further evidenced by Kohno et al. (US2003/02287A1) to etch using HF and SC-1, wherein the supply times of SC-1 is less than that of HF. The use of HF and SC-1 are well known in the art, as evidenced by Tanaka et al. (US2011/0146726A1); Yoshinari (US2014/0175620A1). 10. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Sharidan Carrillo whose telephone number is (571)272-1297. The examiner can normally be reached M-F, 7:00am-4:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Barr can be reached on 571-272-1414. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Sharidan Carrillo Primary Examiner Art Unit 1711 /Sharidan Carrillo/Primary Examiner, Art Unit 1711 bsc
Read full office action

Prosecution Timeline

Sep 01, 2023
Application Filed
Oct 19, 2024
Non-Final Rejection — §103, §112
Jan 23, 2025
Response Filed
Apr 26, 2025
Final Rejection — §103, §112
Jun 18, 2025
Interview Requested
Jun 18, 2025
Examiner Interview Summary
Jun 18, 2025
Applicant Interview (Telephonic)
Jul 29, 2025
Request for Continued Examination
Jul 31, 2025
Response after Non-Final Action
Aug 22, 2025
Non-Final Rejection — §103, §112
Nov 26, 2025
Response Filed
Feb 20, 2026
Final Rejection — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
62%
Grant Probability
45%
With Interview (-17.1%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 759 resolved cases by this examiner. Grant probability derived from career allow rate.

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