Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 1. Claims 8, 14, 15, and 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 1/7/26. Claim 15 has been withdrawn because it depends from withdrawn claim 14. Claim 20 has been withdrawn for having the same claim language as withdrawn claim 14. 2. Applicant's election with traverse of Species II in the reply filed on 1/7/26 is acknowledged. The traversal is on the ground(s) that the examiner bases the restriction on independent or distinct and not independent and distinct . The Applicant also argued that there is not serious burden. This is not found persuasive because the Applicant only argues by stating the provisions of MPEP 802.01 and 803 with no further arguments with what was actually written in the restriction. The requirement is still deemed proper and is therefore made FINAL. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claim s 1, 2, 6, 16, 18, and 19 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by U.S. Patent Application Publication No . 2020/0403026 Li et al. 3 . Referring to claim 1, Li et al. teaches a light-emitting diode (LED) chip, comprising: a first active LED structure comprising a first n-type layer, a first active layer, and a first p-type layer , ( Figures 2A-B #220 & Paragraph 0088 green ) ; a second active LED structure comprising a second n-type layer, a second active layer, and a second p-type layer , (Figures 2A-B #2 3 0 & Paragraph 00 96 blue ) ; and a bonding layer , (Figures 2A-B #2 2 2 & Paragraph 00 9 2 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), between the first n-type layer , ( Figures 2A-B #220 & Paragraph 0088 green ), and the second p-type layer , ( Figures 2A-B #230 & Paragraph 0096 blue ) , the bonding layer comprising a thickness of at least 100 nanometers (nm) , ( Figures 2A-B #222 & Paragraph 0092 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other) . 4 . Referring to claim 2, Li et al. teaches a LED chip of claim 1, wherein the bonding layer comprises a thickness in a range from 100 nm to 5000 nm , ( Figures 2A-B #222 & Paragraph 0092 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other) . 5 . Referring to claim 6, Li et al. teaches a LED chip of claim 1, wherein the bonding layer comprises a conductive oxide , (Figures 2A-B #212 & Paragraph 0082 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other) . 6 . Referring to claim 16, Li et al. teaches a method, comprising: providing a first active light-emitting diode (LED) structure comprising a first n-type layer, a first active layer, and a first p-type layer , (Figures 2A-B #220 & Paragraph 0088 green) ; providing a second active LED structure comprising a second n-type layer, a second active layer, and a second p-type layer , (Figures 2A-B #230 & Paragraph 0096 blue) ; and bonding the first active LED structure , (Figures 2A-B #220 & Paragraph 0088 green), to the second active LED structure , (Figures 2A-B #230 & Paragraph 0096 blue), with a bonding layer , (Figures 2A-B #222 & Paragraph 0092 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), between the first n-type layer , (Figures 2A-B #220 & Paragraph 0088 green), and the second p-type layer , (Figures 2A-B #230 & Paragraph 0096 blue), the bonding layer comprising a thickness of at least 100 nanometers (nm) , (Figures 2A-B #222 & Paragraph 0092 .01-1 micron where the ITO layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other) . 7 . Referring to claim 18, Li et al. teaches a method of claim 16, wherein the first active LED structure is formed on a first growth substrate , (Figures 2A-B #220 & Paragraph 008 6 green), and the second active LED structure is formed on a second growth substrate , (Figures 2A-B #230 & Paragraph 009 4 blue) . 8 . Referring to claim 19, Li et al. teaches a method of claim 18, further comprising removing the first growth substrate from the first active LED structure , (Figures 2A-B #220 & Paragraph 008 6 green), before bonding the first active LED structure to the second active LED structure , (Figures 2A-B #230 & Paragraph 0096 blue) . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim s 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No . 2020/0403026 Li et al. 9. Referring to claim 9, Li et al. teaches the LED chip of claim 1, but is silent to wherein the first active LED structure , (Figures 2A-B #220 & Paragraph 0088 green), and the second active LED structure , (Figures 2A-B #230 & Paragraph 0096 blue) , are configured to provide peak wavelengths that differ in a range from 5 nanometers (nm) to 20 nm from one another. Li et al. teaches the LED #220 has a green color, ( wavelength of 500-565 nm), and the LED #230 has a blue color , (wavelength of 450-485 nm). T he claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to know that the peak wavelength difference between the LEDs can be in a range from 5 nanometers (nm) to 20 nm from one another because the green LED having a wavelength of 500 nm and the blue LED having a wavelength of 450nm would be in the range of 15 nm difference as an example, and also since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Also, Note that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff , 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). 10. Referring to claim 10, Li et al. teaches the LED chip of claim 1, but is silent to LED chip of claim 1, wherein the first active LED structure and the second active LED structure are configured to provide peak wavelengths that differ in a range from 25 nm to 300 nm from one another. Li et al. teaches the LED #220 has a green color, (wavelength of 500-565 nm), and the LED #230 has a blue color, (wavelength of 450-485 nm). T he claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to know that the peak wavelength difference between the LEDs can be in a range from 2 5 nanometers (nm) to 30 0 nm from one another because the green LED having a wavelength in the middle of the range would be 532.5 nm and the blue LED having a wavelength in the middle of the range would be 467.5 nm would be in the range of 65 nm difference as an example, and also since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Also, Note that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff , 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim s 11-12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Application Publication No . 2024/0274586 Wang et al. 11. Referring to claim 11, Wang et al. teaches a light-emitting diode (LED) chip, comprising: a first active LED structure comprising a first n-type layer, a first active layer, and a first p-type layer , (Figure 1 lower #7, & 71-73) ; a second active LED structure comprising a second n-type layer, a second active layer, and a second p-type layer , (Figure 1 upper #7, & 71-73) ; and a first bonding layer , (Figure 1 #10 & the light transmitting layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), between the first n-type layer , (Figure 1 lower #73), and the second p-type layer , (Figure 1 upper #71) , the first bonding layer , (Figure 1 #10 & the light transmitting layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), comprising at least one electrically conductive via , (Figure 1 #91-93), between the first n-type layer , (Figure 1 lower #73), and the second p-type layer , (Figure 1 upper #71) . 12. Referring to claim 12, Wang et al. teaches a LED chip of claim 11, wherein the at least one electrically conductive via , (Figure 1 #91-93), comprises: a first sublayer with a first metal , (Figure 1 #91 & Paragraph 0097 Silver), that contacts the first n-type layer , (Figure 1 lower #73) ; and a second sublayer with a second metal , (Figure 1 #92 & Paragraph 0097 Gold), that contacts the second p-type layer , (Figure 1 upper #71) , wherein the second metal is different than the first metal. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 7, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No . 2024/0274586 Wang et al. in view of U.S. Patent Application Publication No . 2020/0403026 Li et al. 1 3 . Referring to claim 1, Wang et al. teaches a light-emitting diode (LED) chip, comprising: a first active LED structure comprising a first n-type layer, a first active layer, and a first p-type layer , (Figure 1 lower #7, & 71-73 ) ; a second active LED structure comprising a second n-type layer, a second active layer, and a second p-type layer , ( Figure 1 upper #7, & 71-73 ) ; and a bonding layer , (Figure 1 # 10 & the light transmitting layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), between the first n-type layer , ( Figure 1 lower #73 ), and the second p-type layer , ( Figure 1 upper #71 ) , but is silent to the bonding layer comprising a thickness of at least 100 nanometers (nm) . Wang et al. teaches that the thicknesses of the sublayers #91 and 92 in Figure 1 are not limited, and they may be determined according to the actual situation , (Paragraph 0092). Wang et al. also teaches in Figure 17 a similar device where the thickness es of the LED devices are in the microns, (Paragraph 0141), as shown in the examples of L1-L3. Li et al. teaches a similar device where the bonding layer comprising a thickness of at least 100 nanometers (nm) , (Figures 2A-B #216 or 226 0.1-5 microns), and the LED device’s thicknesses in the microns, (Figures 2A-B #210, 220, or 230 0.3-5 microns). T he claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teachings of Wang et al. with Li et al. because it is well known in the art that the layers of an LED devices and the bonding layers formed there between to be within the same range of dimensions to not inhibit the transfer of light between the devices, and also since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Also, Note that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff , 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). 14 . Referring to claim 2, Wang et al. in view of Li et al. teaches a LED chip of claim 1, wherein the bonding layer comprises a thickness in a range from 100 nm to 5000 nm , ( Li et al. Figures 2A-B #216 or 226 0.1-5 microns ) . Wang et al. teaches that the thicknesses of the sublayers #91 and 92 in Figure 1 are not limited, and they may be determined according to the actual situation , (Paragraph 0092). Wang et al. also teaches in Figure 17 a similar device where the thicknesses of the LED devices are in the microns, (Paragraph 0141), as shown in the examples of L1-L3. Li et al. teaches a similar device where the bonding layer comprising a thickness of at least 100 nanometers (nm) , (Figures 2A-B #216 or 226 0.1-5 microns), and the LED device’s thicknesses in the microns, (Figures 2A-B #210, 220, or 230 0.3-5 microns). T he claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teachings of Wang et al. with Li et al. because it is well known in the art that the layers of an LED devices and the bonding layers formed there between to be within the same range of dimensions to not inhibit the transfer of light between the devices, and also since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Also, Note that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff , 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). 15 . Referring to claim 3, Wang et al. in view of Li et al. teaches a LED chip of claim 1, wherein the bonding layer comprises an electrically insulating material , (Figure 1 #10), and at least one electrically conductive via , (Figure 1 #91-93), the at least one electrically conductive via , (Figure 1 #91-93), forming an electrically conductive path between the first n-type layer , (Figure 1 lower #73), and the second p-type layer , (Figure 1 upper #71) . 16 . Referring to claim 4, Wang et al. in view of Li et al. teaches a LED chip of claim 3, wherein the at least one electrically conductive via , (Figure 1 #91-93), comprises: a first sublayer with a first metal , (Figure 1 #91 & Paragraph 0097 Silver), that contacts the first n-type layer , (Figure 1 lower #73) ; and a second sublayer with a second metal , (Figure 1 #92 & Paragraph 0097 Gold), that contacts the second p-type layer , (Figure 1 upper #71) , wherein the second metal is different than the first metal. 1 7. Referring to claim 7, Wang et al. in view of Li et al. teaches a LED chip of claim 1, further comprising an n-contact pad and a p-contact pad , (Figure 1 #6 & 12) that are both on a same side of the first active LED structure , (top side on the plan view) . 1 8 . Referring to claim 16, Wang et al. teaches a method, comprising: providing a first active light-emitting diode (LED) structure comprising a first n-type layer, a first active layer, and a first p-type layer , (Figure 1 lower #7, & 71-73) ; providing a second active LED structure comprising a second n-type layer, a second active layer, and a second p-type layer , (Figure 1 upper #7, & 71-73) ; and bonding the first active LED structure , (Figure 1 lower #7, & 71-73), to the second active LED structure , (Figure 1 upper #7, & 71-73), with a bonding layer , (Figure 1 #10 & the light transmitting layer has the ability to function as a bonding layer, otherwise the lower layers and the upper layers would not be able to stay attached to each other), between the first n-type layer , (Figure 1 lower #73), and the second p-type layer , (Figure 1 upper #71) , but is silent to the bonding layer comprising a thickness of at least 100 nanometers (nm) . Wang et al. teaches that the thicknesses of the sublayers #91 and 92 in Figure 1 are not limited, and they may be determined according to the actual situation , (Paragraph 0092). Wang et al. also teaches in Figure 17 a similar device where the thicknesses of the LED devices are in the microns, (Paragraph 0141), as shown in the examples of L1-L3. Li et al. teaches a similar device where the bonding layer comprising a thickness of at least 100 nanometers (nm) , (Figures 2A-B #216 or 226 0.1-5 microns), and the LED device’s thicknesses in the microns, (Figures 2A-B #210, 220, or 230 0.3-5 microns). T he claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the teachings of Wang et al. with Li et al. because it is well known in the art that the layers of an LED devices and the bonding layers formed there between to be within the same range of dimensions to not inhibit the transfer of light between the devices, and also since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Also, Note that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff , 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). 1 9 . Referring to claim 17, Wang et al. in view of Li et al. teaches a method of claim 16, further comprising at least one electrically conductive via , (Figure 1 #91-93), in the bonding layer , (Figure 1 #10), that forms an electrically conductive path between the first n-type layer , (Figure 1 lower #73), and the second p-type layer , (Figure 1 upper #71) . Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: 2 0. Claim s 5 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 2 1. The prior art teaches the claimed matter in the rejections above, but is silent with respect to the above teachings in combination with the LED chip of claim 4, wherein the at least one electrically conductive via further comprises a third sublayer between the first sublayer and the second sublayer, and the third sublayer comprises a third metal that is different from both the first metal and the second metal ; and/or the LED chip of claim 12, wherein the at least one electrically conductive via further comprises a third sublayer between the first sublayer and the second sublayer, and the third sublayer comprises a third metal that is different from both the first metal and the second metal. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT VICTOR A MANDALA whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-1918 . The examiner can normally be reached on FILLIN "Work schedule?" \* MERGEFORMAT M-Th 8-6:30 EST . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration t ool. To schedule an interview, a pplicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Dale Page can be reached on FILLIN "SPE Phone?" \* MERGEFORMAT 571-270-7877 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VICTOR A MANDALA/ Primary Examiner, Art Unit 2899 3/25/26