Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
Claim 1 recites “…a first plug provided on a first electrode layer…”. “Provided on” is interpreted as physically formed on and contacting a top surface of the first electrode layer.
Claim 1 further recites “…a second insulator provided in the first plug and the first electrode layer …”. “Provided in” is interpreted as disposed within an opening through the referenced structure.
Claim 6 is also recites “provided in” and “provided on” and are interpreted the same way as explained above for claim 1.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “…having a tube shape…”, which introduces indefiniteness because it does not clarify whether “tube shape” includes solid cylinders, partially hallow structures, or only fully hallow annular structure. For the purpose of examination, “tube shape” is interpreted as hallow cylindrical structure having an inner sidewall and an outer sidewall.
Claim 5 recites “third insulator is formed of a kind of an insulating material that is different from a kind of an insulating material that forms the second insulator”. The claim is indefinite because the phrase “kind of” lacks objective boundaries- unclear whether “different” means different dopant content, different dielectric constant, different material class, etc. As a result, on of ordinary skill cannot determine the metes and bounds of the “different kind” with reasonable certainty. For the purpose of examination, “a kind of an insulating material that is different from a kind of an insulating material” is interpreted as a different chemical composition/material class.
Claims 2-10 inherit the indefiniteness of claim 1 which they depend. Thus claims 2-10 are rejected under 35 U.S.C. 112(b).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Fukuzumi (US 20100244119 A1) in view of Inatsuka (US 20170271256 A1).
Re: Independent Claim 1, Fukuzumi discloses a semiconductor device comprising:
a stacked film including a plurality of first insulators and a plurality of electrode layers that are alternately stacked in a first direction (Fukuzumi, in Fig. 11 and ¶ [0036], teaches a stacked structure unit ML including multiple insulating films 14 alternatively stacked with multiple electrode films WL (with topmost WL as a first electrode layer) in the first direction (z-axis));
a first plug … having a tube shape extending in the first direction (Fukuzumi, in Fig. 10C and ¶ [0039] and ¶ [0058], teaches semiconductor pillar SP piercing the stacked structure unit ML in the z-axis direction; and SP has a hollow cylindrical configuration, thus having tube shape).; and
a second insulator provided in the first plug and the first electrode layer (Fukuzumi, Fig. 10C and ¶ [0088], core unit insulating film 68f is buried in the inner side of semiconductor pillar SP, and having a columnar shape extending in the first direction (since core unit insulating film 68f is buried in semiconductor pillar SP that is hollow cylindrical, i.e., located inside the tube, the core unit insulating film 68f thus has a columnar shape),
wherein a diameter of a side face of the first plug enclosing the second insulator is larger than a diameter of a side face of the first electrode layer enclosing the second insulator (Fukuzumi, in Fig. 10C, teaches the diameter of the upper portion of semiconductor pillar SP enclosing core unit insulating film 68f is larger than the diameter of the first electrode layer WL that encloses core unit 68f).
Fukuzumi is silent regarding,
first plug provided on a first electrode layer among the plurality of electrode layers.
However, Inatsuka teaches first plug provided on a first electrode layer among the plurality of electrode layers (Inatsuka teaches, in Fig. 3 and ¶¶ [0052] - [0059], a staircase structure 13 including conductive layer 31-34 alternately laminated with first insulating layers 36-39, and teaches contacts/plugs 21-24 (plurality of contacts) formed to connect to selected conductive layers (31-34) at the staircase region).
Fukuzumi and Inatsuka both disclose three-dimensional memory devices, hence analogous art. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fukuzumi’s stacked device to implement the tubular “plug” structure in a way that is provided on/contacts a selected electrode layer (among electrode films WL) using Inatsuka’s known technique of providing contacts (21-24) to individual conductive/electrode layers (31-34) in a stacked structure, in order to facilitate electrical connection to selected stacked electrode layers while expanding process margin and controlling contact depth/protrusion (Inatsuka, ¶ [0123])
Re: Claim 2, Fukuzumi and Inatsuka disclose all the limitations of claim 1 on which this claim depends.
Inatsuka further teaches
wherein the stacked film includes a step structure portion having a step shape (Inatsuka teaches, in Fig. 3 and ¶ [0026], a staircase/stepped structure 13 formed by conductive layers 31-34 and insulating layers 36-39) alternately laminated, and
the first plug is provided on the first electrode layer included in the step structure portion (Inatsuka, in Fig. 3 and ¶ [0026], teaches that the step structure portion (staircase structure 13) includes the conductive layers 31-34 and that contacts/plugs 21-24 are provided to connect to those conductive layers at the staircase region. In particular, Inatsuka teaches first plug/contact 24 provided on first conductive (electrode) layer 34 included in the step structure portion.
Re: Claim 3, Fukuzumi and Inatsuka disclose all the limitations of claim 2 on which this claim depends.
Inatsuka further teaches
wherein the first electrode layer is a topmost electrode layer in the stacked film below the first plug (Inatsuka, in Fig. 3, teaches conductive layer 34 is the first elector delayer and it is the topmost electrode layer in the stacked film below the first contact/plug 24).
Re: Claim 4, Fukuzumi and Inatsuka disclose all the limitations of claim 1 on which this claim depends.
Fukuzumi further teaches,
further comprising a third insulator provided in the stacked film (Fukuzumi teaches, in Fig, 10C, the stacked film ML includes a plurality of insulating films 14 (inter-layer insulating films) alternately stacked with electrode films WL, thus one of the insulating films 14 corresponds to the recited “third insulator provided in the stacked film”), and positioned below the second insulator (Fukuzumi teaches, in Figs. 10B-10C, the core unit 68 (the second insulator as applied in claim 1 rejection) has an upper end disposed above the selection gate electrode SG in the first direction, while the stacked structural unit ML (including the insulating films 14) is formed below the selection gate stack region; accordingly, the insulating films 14 in the stacked film are positioned below the core unit 68 in the first direction, meeting the “positioned below the second insulator” limitation).
Re: Claim 5, Fukuzumi and Inatsuka disclose all the limitations of claim 4 on which this claim depends.
Fukuzumi further teaches,
wherein the third insulator is formed of a kind of an insulating material that is different from a kind of an insulating material that forms the second insulator (Fuluzumi teaches, in Fig. 10C, the “third insulator” in the stacked film as the insulating films 14 alternately stacked with the electrode films WL in the stacked structure unit ML, and explicitly teaches that silicon oxide may be used as the insulating film 14. Further Fuluzumi teaches forming the second insulator (core unit 68/68f) from a different kind of insulating material (e.g., SiN).
Re: Claim 6, Fukuzumi and Inatsuka disclose all the limitations of claim 1 on which this claim depends.
Fukuzumi further teaches,
further comprising a fourth insulator provided on the stacked film (Fukuzumi teaches, in Fig. 10A-10C, an insulating layer 16 stacked on the selection gate electrode (SG), and the selection gate electrode is stacked on the stacked structural unit. Thus, insulating layer 16 is the “fourth insulator” provided on the stacked film ML), wherein the first plug is provided in the fourth insulator (Fukuzumi further teaches, in Fig. 10C, the semiconductor pillar SP (“first plug” under claim 1 mapping) pierces the insulating layer 16 in the first direction. Thus, the plug is disposed in/through the insulating layer 16).
Re: Claim 7, Fukuzumi and Inatsuka disclose all the limitations of claim 6 on which this claim depends.
Fukuzumi further teaches,
wherein the first insulators and the fourth insulator include silicon and oxygen (Fukuzumi teaches, in ¶ [0070] and ¶ [0065], first insulator (insulating film 14) can be silicon oxide and fourth insulator (insulating layer 16) can be Silicon oxide as well, thus both first and fourth insulators include silicon and oxygen).
Re: Claim 10, Fukuzumi and Inatsuka disclose all the limitations of claim 1 on which this claim depends.
Fukuzumi further teaches,
further comprising: a charge storage layer provided in the stacked film (Fukuzumi teaches, in Fig. 1B and ¶ [0066], charge storage layer 63 that is formed as part of the memory unit stacked film 61 provided in the stack ML); and a semiconductor layer provided in the stacked film via the charge storage layer (Fukuzumi teaches, in fig. 1B a through-hole TH piercing the stacked structure unit ML and a semiconductor pillar SP provided in the stack (in/through the through-hole TH), with the memory unit stacked film 61 (including charge storage layer 63) interposed between the electrode films WL and the semiconductor pillar SP. Hence, Fukuzumi’s semiconductor pillar SP (semiconductor layer) is provided in the stacked film via the charge storage layer 63).
Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Fukuzumi (US 20100244119 A1) in view of Inatsuka (US 20170271256 A1) further in view of Otsu US 20200303398 A1)
Re: Claim 8, Fukuzumi and Inatsuka disclose all the limitations of claim 1 on which this claim depends.
Fukuzumi and Inatsuka are silent regarding,
further comprising a fifth insulator provided in the stacked film, having a columnar shape extending in the first direction, and separated from the first plug.
However, Otsu teaches further comprising a fifth insulator provided in the stacked film, having a columnar shape extending in the first direction, and separated from the first plug (Otsu teaches, in Figs. 4C/6A and ¶ [0110], dielectric core 62 located within support openings 19 that passes through the alternating stack (32,42), thus extending in the first direction. Since dielectric core 62 is formed by filling the support openings 19, the dielectric core 62 has a columnar shape. Otsu further teaches (Otsu, Fig. 13C and ¶ [0143]) that contact via structure 86 are formed at sites not occupied by support pillar structures 20 (support pillar structures 20 are formed within each support opening 19 as taught by Otsu in ¶ [0110]). Hence, the dielectric core 62 corresponds to the claimed columnar shaped fifth insulator extending in the first direction which is separated from the plug/contact structure 86).
Fukuzumi, Inatsuka and Otsu disclose three dimensional memory devices, hence analogous art. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fukuzumi’s stacked film device modified as taught by Inatsuka to include an additional columnar dielectric/ insulating feature (i.e., a support-opening fill dielectric core/support pillar structure as taught by Otsu) within the stacked film and spaced from the plug structures, in order to improve mechanical support/prevent deformation of the alternating stack during processing (Otsu, ¶ [0168]).
Re: Claim 9, Fukuzumi, Inatsuka and Otsu disclose all the limitations of claim 8 on which this claim depends.
Otsu further teaches,
wherein the stacked film includes a step structure portion having a step shape, and the fifth insulator is provided in the step structure portion (Otsu teaches, in Fig. 6A, step structure portion (staircase region 300) having step shape, and the support opening 19 are formed in the staircase region 300. Otsu further teaches that a support pillar structure 20 is formed in each support opening 19, and that each support pillar structure includes dielectric core 62 (and insulator). Hence, Otsu’s staircase region 300 reads on the recited “step structure portion having a step shape” and Otsu’s dielectric core 62 (within support pillar structure 20 in support opening 19 in staircase region 300) reads on the recited “fifth insulator provided in the step structure portion”).
Prior art made of record and not relied upon are considered pertinent to current application disclosure.
Oh (US 20210391350 A1) and Sim (US 20220045083 A1) disclose three-dimensional semiconductor memory device.
Conclusion
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/BIPANA ADHIKARI DAWADI/ Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898