DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/20/2024 and 04/22/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Election/Restrictions 2 The election was made to Species I (claims 1-4, 10, 11 and 1-18), with traverse. Applicant's election with traverse of Species I (claims 1-4, 10, 11 and 1-18) in the reply filed on 03/06/2026 is acknowledged. The traversal is on the ground(s) that Species II is the same as Species I . “ According to the Specification, … [f]igure1A includes system 100, which includes antenna 101, power amplifier 107, low-noise amplifier(LNA) sub-circuit 115, and wide-band tuning sub-circuit 130." Specification, Paragraph [0020] and FIG. 1A. Also, "[f] figure 1B also includes system 100, and more particularly, includes details of wide-band tuning sub-circuit 130, and includes control sub-circuit 141 and downstream sub-circuit 145." Specification, Paragraph [0020] and FIG. 1B. FIG. 1A and FIG. 1B both illustrate System 100. Additionally, FIG. 1B illustrates details of the wide-band tuning sub-circuit 130 illustrated in FIG. 1A. ” ” This is not found persuasive because the tuning sub-circuit as claimed in claim s 5-8 and 12-15 ( Species II ) distinct from claims 1-4 and 10-11 ( Species I). The Species I is not included LC circuit. Thus, as stated in Election/ Restriction Requirement mailed on 01/06/2026, there is a search and/or examination burden because: the Species are patentably distinct and have acquired a separate status in the art in view of their different classification, have acquired a separate status in the art due to their recognized divergent subject matter, and require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search strategies or search queries. For example, LC circuit . Restriction for examination purposes as indicated is proper because Species II pertains to the details of the structural elements of the wide-band tuning sub-circuit and prior art applicable to one Species would not likely be applicable to another Species . These groups are not obvious variants of each other based on the current record. The requirement is still deemed proper and is therefore made FINAL. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness . 3. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (U.S. Patent Pub. # US 2019/0074862 A1) in view of Rajendran et al (U.S. Patent Pub. # US 2016/0079946 A1). Regarding claim 1, Wang et al discloses a circuit (figures 4A-4B, RF front end 400) , comprising: a low-noise amplifier sub-circuit configured to couple to an antenna (figures 4A-4B, LNA450 and an antenna 470; paragraph 00 53 , “ … transistor 450 is coupled to the antenna 470” , wherein the low-noise amplifier sub-circuit comprises: a transistor that includes a gate, a source, and a drain (figure s 4A-4B, a transistor 450 includes a gate, a source, and a drain; paragraphs 0042-0043 and 0046 ) ; a first inductor that includes a first terminal configured to couple to the antenna and includes a second terminal (figure 4A-4B, a first inductor (i.e., an inductor 444 ) ; paragraph 0039 ) ; a second inductor that includes a first terminal coupled to the first terminal of the first inductor and includes a second terminal coupled to the gate of the transistor (figure 4A-4B, a second inductor (i.e., an inductor 452 ); paragraph 0042, the second inductor (i.e., the inductor 452) of a first terminal coupled to the first terminal of the first inductor (i.e., the inductor 444) and a second terminal coupled to the gate of the transistor (i.e., the t ransistor 450)) ; and a third inductor that includes a first terminal coupled to the source of the transistor and includes a second terminal (figure 4A-4B, a third inductor (i.e., an inductor 456); paragraph 0043, t he third inductor (i.e., the inductor 456) of a first terminal coupled to the source of the transistor (i.e., the t ransistor 450) and includes a second terminal) ; Wang et al does not disclose a tuning sub-circuit coupled to the drain of the transistor. Rajendran et al disclose a tuning sub-circuit coupled to the drain of LNA transistor (figure 5, a tuning circuit 520; paragraph s 0041 -0042 and 0045). Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to use the teachings of Rajendran et al in to the apparatus of Wang et al, such that a tuning sub-circuit coupled to the drain of the LNA transistor in order to tune the LNA circuit the desired frequency band as taught by Rajendran et al (paragraph 0023). 4. Claim(s) 2-4 and 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (U.S. Patent Pub. # US 2019/0074862 A1) in view of Rajendran et al (U.S. Patent Pub. # US 2016/0079946 A1) further in view of Yu et al (U.S. Patent Pub. # US 2014/0199951 A1). Regarding claim 2, Wang et al in view of Rajendran et al discloses the apparatus of claim 1. Wang et al discloses wherein the low-noise amplifier sub-circuit is configured to couple to the antenna (paragraph 0053). Wang et al in view of Rajendran et al does not disclose the low-noise amplifier sub-circuit is configured to couple to the antenna via a first capacitor configured to couple to the antenna and a second capacitor coupled to the first capacitor and to the low-noise amplifier sub-circuit. Yu et al discloses a low-noise amplifier sub-circuit is configured to couple to the antenna via a first capacitor configured to couple to the antenna and a second capacitor coupled to the first capacitor and to the low-noise amplifier sub-circuit (figure 5, LNA 508; paragraphs 0037 and 0039,the low-noise amplifier sub-circuit (i.e., the LNA 508) is configured to couple to the antenna via a first capacitor(i.e., a first capacitive circuit 5062) configured to couple to the antenna), and a second capacitor (i.e., a capacitive circuit 510) coupled to the first capacitor and to the low-noise amplifier sub-circuit Regarding claim 3 , Wang et al in view of Rajendran et al and Yu et al discloses the apparatus of claim 2. Yu et al discloses wherein the low-noise amplifier sub-circuit is further configured to couple to the antenna via a transmitter sub-circuit coupled to the first capacitor (paragraphs 0037 and 0039) , wherein the transmitter sub-circuit is coupled in parallel with the second capacitor and comprises a power amplifier and a balun ( see figure 5 , the second capacitor (i.e., a capacitive circuit 510) , a power amplifying circuit 502 and a Balun 50; paragraph 0037). . Regarding claim 4, Wang et al in view of Rajendran et al and Yu et al discloses the apparatus of claim 3. Wang et al discloses wherein the transmitter sub-circuit further comprises a switch, and wherein the low-noise amplifier sub-circuit is further configured to couple to the antenna via the transmitter sub-circuit based on a state of the switch, and wherein the switch enables port-combining based on the state of the switch ( paragraphs 0038 and 0047) . Regarding claim 10, Yu et al discloses a circuit (figure 5, a transceiver 500) , comprising: a first capacitor configured to couple to an antenna (figure 5, a first capacitor (i.e., a first capacitive circuit 5062); paragraphs 0037 and 0039) ; a second capacitor coupled to the first capacitor and to a low-noise amplifier sub-circuit (figure 5, a second capacitor (i.e., a capacitive circuit 510) ; a transmitter sub-circuit coupled to the first capacitor and to the low-noise amplifier sub-circuit (figure5, a power amplifier 502 and a Balun 504 are coupled to LNA 506; paragraph 0037) , wherein the transmitter sub-circuit is coupled in parallel with the second capacitor (see figure 5, the second capacitor (i.e., the capacitive circuit 510) is in parallel with the transmitter sub-circuit (i.e., a power amplifier 502 and a Balun 504)) , and wherein the transmitter sub-circuit comprises a power amplifier and a balun (paragraph 0037) Yu et al discloses the low-noise amplifier sub-circuit comprising: a transistor that includes a gate, a source, and a drain; a first inductor that includes a first terminal configured to couple to the antenna via the first capacitor and the second capacitor and includes a second terminal; a second inductor that includes a first terminal coupled to the first terminal of the first inductor and includes a second terminal coupled to the gate of the transistor; and a third inductor that includes a first terminal coupled to the source of the transistor and includes a second terminal; and a tuning sub-circuit coupled to the drain of the transistor. Wang et al discloses a low-noise amplifier sub-circuit (figures 4A-4B, LNA450; paragraph 0053) comprising: a transistor that includes a gate, a source, and a drain (figures 4A-4B, a transistor 450 includes a gate, a source, and a drain; paragraphs 0042-0043 and 0046) ; a first inductor that includes a first terminal configured to couple to the antenna (figure 4A-4B, a first inductor (i.e., an inductor 444); paragraph 0039); via the first capacitor and the second capacitor and includes a second terminal; a second inductor that includes a first terminal coupled to the first terminal of the first inductor and includes a second terminal coupled to the gate of the transistor (figure 4A-4B, a second inductor (i.e., an inductor 452); paragraph 0042, the second inductor (i.e., the inductor 452) of a first terminal coupled to the first terminal of the first inductor (i.e., the inductor 444) and a second terminal coupled to the gate of the transistor (i.e., the t ransistor 450)) and a third inductor that includes a first terminal coupled to the source of the transistor and includes a second terminal (figure 4A-4B, a third inductor (i.e., an inductor 456); paragraph 0043, t he third inductor (i.e., the inductor 456) of a first terminal coupled to the source of the transistor (i.e., the t ransistor 450) and includes a second terminal) . Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to use the teachings of Wang et al in to the apparatus of Yu et al , such that the LNA could be comprised a transistor that includes a gate, a source, and a drain; a first , second and third inductors by design preference. Yu et al in view of Wang et al does not discloses a tuning sub-circuit coupled to the drain of the transistor. Rajendran et al disclose a tuning sub-circuit coupled to the drain of LNA transistor (figure 5, a tuning circuit 520; paragraphs 0041-0042 and 0045). Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to use the teachings of Rajendran et al in to the apparatus of Yu et al in view of Wang et al, such that a tuning sub-circuit coupled to the drain of the LNA transistor in order to tune the LNA circuit the desired frequency band as taught by Rajendran et al (paragraph 0023). Regarding claim 11, Yu et al in view of Wang et al and Rajendran et al discloses the apparatus of claim 10. Yu et al discloses wherein the transmitter sub-circuit further comprises a switch, and wherein the low-noise amplifier sub-circuit is further configured to couple to the antenna via the transmitter sub-circuit based on a state of the switch, and wherein the switch enables port-combining based on the state of the switch (paragraphs 0037 and 0039). 5. Claim(s) 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (U.S. Patent Pub. # US 2019/0074862 A1) in view of Chan et al (U.S. Patent Pub. # US 2010/0259319 A1). Regarding claim 16, Wang et al discloses a low-noise amplifier circuit (figures 4A-4B, LNA450; paragraph 0053) , comprising: a first inductor (figure 4A-4B, a first inductor (i.e., an inductor 444); paragraph 0039) that includes a first set of conductive features arranged in rings; a second inductor (figure 4A-4B, a second inductor (i.e., an inductor 452); paragraph 0042) that includes a second set of conductive features arranged in rings that encircle the first set of conductive features; and a third inductor (figure 4A-4B, a third inductor (i.e., an inductor 456); paragraph 0043) that includes a third set of conductive features proximate to the second set of conductive features and disposed such that the second set of conductive features is between the first set of conductive features and the third set of conductive features; wherein the second set of conductive features comprises a first terminal configured to couple to an antenna and a second terminal coupled to a gate of a transistor (figure 4A-4B, a second inductor (i.e., an inductor 452); paragraph 0042) ; wherein the first set of conductive features comprises a first terminal configured to couple to the antenna and coupled to the first terminal of the second set of conductive features and a second terminal coupled to receive a bias voltage and coupled to a first ground node (figure 4A-4B, a second inductor (i.e., an inductor 452); paragraph 0042, ; and wherein the third set of conductive features comprises a first terminal coupled to a source of the transistor and a second terminal coupled to a second ground node (figure 4A-4B, a third inductor (i.e., an inductor 456); paragraph 0043). Wang et al does not discloses the first inductor that includes a first set of conductive features arranged in rings; the second that includes a second set of conductive features arranged in rings that encircle the first set of conductive features; and the third inductor that includes a third set of conductive features proximate to the second set of conductive features and disposed such that the second set of conductive features is between the first set of conductive features and the third set of conductive features. Chan et al discloses a first inductor that includes a first set of conductive features arranged in rings; a second that includes a second set of conductive features arranged in rings that encircle the first set of conductive features; and a third inductor that includes a third set of conductive features proximate to the second set of conductive features and disposed such that the second set of conductive features is between the first set of conductive features and the third set of conductive features (figure 9, inductors with features arranged in rings; paragraphs 0057-0060). Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to use the teachings of Chan et al in to the apparatus of Wang et al in order to provide impedance matching when the LNA is enabled as taught by Chan et al (paragraph 00 61 ). Regarding claim 17, Wang et al in view of Chan et al discloses the apparatus of claim 16. Chan et al discloses wherein the first set of conductive features and the second set of conductive features form a single-coupled inductor coil, and wherein the third set of conductive features comprises one or more inductor coils (paragraphs 0057-0058) . Regarding claim 18, Wang et al in view of Chan et al discloses the apparatus of claim 16. Wang et al discloses The low-noise amplifier circuit of claim 16, further comprising the transistor that includes the gate, the source, and a drain (figures 4A-4B, a transistor 450 includes a gate, a source, and a drain; paragraphs 0042-0043 and 0046); Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT FATUMA G SHERIF whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)270-7189 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT 10am - 6pm . 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Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FATUMA G SHERIF/ Examiner, Art Unit 2649 /YUWEN PAN/ Supervisory Patent Examiner, Art Unit 2649