Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I (claims 1-8) in the reply filed on 4/9/26 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akimoto (US 2022/0059518 will be used as the English translation of WO2020226044 which was published on 11/12/2020) in view of Kub et al. (US 2012/0141799).
The applied reference has a common applicant with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Akimoto disclose preparing a substrate (102), the substrate comprising a circuit (103, corresponds to transistor) and a first insulating film (112) covering the circuit; wherein: forming a semiconductor layer (1150) forming a second insulating film (156) forming a first via (161d) extending through the first and second insulating films; and forming a wiring layer(160) on the second insulating film, wherein: the first via is located between the wiring layer (fig. 1) and the circuit and electrically connects the wiring layer and the circuit, the light-emitting element (150) is electrically connected to the circuit (103) via the wiring layer (160).
Akimoto fails to explicitly disclose forming a graphene-including layer on the first insulating film; forming a semiconductor layer on the graphene-including layer, the semiconductor layer comprising a light-emitting layer; forming a light-emitting element by etching the semiconductor layer, the light-emitting element including a bottom surface on the graphene-including layer, and a light-emitting surface at a side opposite to the bottom surface; forming a second insulating film covering the graphene-including layer.
Kub et al. disclose forming a graphene-including layer (403); forming a semiconductor layer (401a, 401b, 401c) on the graphene-including layer, the semiconductor layer comprising a light-emitting layer (401b); forming a light-emitting element by etching the semiconductor layer[0156], the light-emitting element including a bottom surface on (above) the graphene-including layer (fig. 8a), and a light-emitting surface at a side opposite to the bottom surface (fig. 8a).
Akimoto shows the layer (130) over the first insulation layer (112) and the second insulation layer (156)covering. The combination of Akimoto and Kub would result in forming a graphene-including layer (Kub, 403) (in place of layer Akimo’s layer 130) on the first insulating film and forming a second insulating film (156) covering the graphene-including layer (Kub, 403) (which is taking the place of the Akimo’s 130).
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference
One of ordinary skill in the art could have combined the elements as claimed by known methods (using a graphene layer below the LED), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (a low graphene material layer sheet resistance can enable light-emitting devices and lasers with low forward voltage [Kub, 0005] graphene has extremely high intrinsic carrier (electron and hole) mobility and thus has extremely high electric conductivity and low sheet resistance [Kub, 0006]).
Regarding claim 3, the combination of Akimoto and Kub et al. disclose forming a second via (161k, Akimoto) extending through the second insulating film (156, Akimoto) , wherein: the light-emitting element comprises a connection part (106c Kub) formed on the graphene-including layer (Kub, 403), the second via is located between the wiring layer (160, Akimoto) and the connection part, and the light-emitting element is electrically connected to the circuit via the connection part (Kub fig 8A), the second via (Akimoto fig. 1), the wiring layer(Akimoto fig. 1), and the first via (Akimoto fig. 1).
Regarding claim 5, Akimoto disclose exposing the light-emitting surface [0090, transparent electrodes “exposed” to light emitting surface].
Regarding claim 6, Akimoto disclose forming a light-transmitting electrode on the exposed light-emitting surface [0090].
Regarding claim 7, Akimoto disclose the semiconductor layer comprises a gallium nitride compound semiconductor [0082].
Regarding claim 8, Akimoto disclose forming a wavelength conversion member (180, 182)[0092] on the light-emitting element.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akimoto (US 2022/0059518 will be used as the English translation of WO2020226044 which was published on 11/12/2020) in view of Kub et al. (US 2012/0141799) as applied to claim 1 and further in view of Liu et al. (US 2016/0197298).
The applied reference has a common applicant with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Akimoto and Kub disclose the invention supra.
Akimoto and Kub fail to explicitly disclose the forming of the semiconductor layer, the semiconductor layer is formed by sputtering.
Liu et al. disclose the forming of the semiconductor layer, the semiconductor layer is formed by sputtering [0017, 0022].
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference
One of ordinary skill in the art could have combined the elements as claimed by known methods (sputtering), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (sputtering will deposit the semiconductor layer).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akimoto (US 2022/0059518 will be used as the English translation of WO2020226044 which was published on 11/12/2020) in view of Kub et al. (US 2012/0141799) as applied to claim 1 and further in view of Wang (US 2020/0258866).
The applied reference has a common applicant with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Akimoto and Kub disclose the invention supra.
Akimoto and Kub fail to explicitly disclose the substrate comprises a plug electrically connected to the circuit, and in the forming of the graphene-including layer, the graphene-including layer is formed on the plug and the first insulating film.
Wang disclose the substrate comprises a plug (60) electrically connected to the circuit (transistor, 20), and a contact/electrode (35) layer is formed on the plug (60)(fig. 1)[0027-0033].
The combination of Akimoto Kub et al. and Liu disclose the forming of the graphene-including layer (Kub, 403) (in place of electrode 35 in Liu), the graphene-including layer is formed on the plug (60 Liu) and the first insulating film (112, Akimoto).
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference
One of ordinary skill in the art could have combined the elements as claimed by known methods (using a plug), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the plug would electrically connect the LED to the circuit/transistor).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY K SMITH whose telephone number is (571)272-1884. The examiner can normally be reached Monday-Friday, 10am-6pm.
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/BRADLEY SMITH/Primary Examiner, Art Unit 2817
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