DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
In view of applicant’s amendments and arguments filed on March 27, 2026, the objections of claims 4 and 5 as stated in the Office Action mailed on January 6, 2026 have been withdrawn.
The rejections of claims 1-5, 7, 15, 16 and 20 under 35 U.S.C. 102 or 103 are maintained. See below for the applicable rejections and the response to Applicant’s argument.
Claim Objections
Claims 2 and 15-20 are objected to because of the following informalities:
In claim 2, line 3, substitute “galReznicekm” with --gallium-- before “arsenide.”
In claim 15, line 3, add --nanosheet-- after “wherein the.”
In claim 15, line 3, add --the-- before “gate channel.”
In claim 15, line 4, add --gate-- before “channel.”
In claim 18, line 3, substitute “galReznicekm” with --gallium-- before “arsenide.”
Claims 16, 17, 19 and 20 depend from claim 15, so they are objected for the same reason.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites “a source/drain (S/D) channel comprising isotropic silicon grown around a thinned silicon layer and annealed to form a single continuous material between the first gate and the second gate”; however, the specification does not provide support for this limitation. The newly added limitation appears to correspond to formation of gate channels 152, rather than the source/drain channel 150 (see figs. 15-17), and the specification does not reasonably convey possession of such structure for the claimed S/D channel. Accordingly, the claim lacks adequate written description support.
Claims 2-7 depend from claim 1, so they are rejected for the same reason.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Reznicek et al. (US Pub. 2019/0221638; hereinafter “Reznicek”).
Regarding Claim 1, Reznicek discloses a semiconductor structure comprising: a first gate (left gate structure; see fig. 10) comprising nanosheet layers (nanosheet layers 34 formed after removing recessed sacrificial semiconductor material nanosheets 12R) of high-κ metal gate (HKMG) (32, 34) (a high-k dielectric layer 32 and a metal gate electrode 34; page 6, paragraphs 65 and 67; see fig. 10) and nanosheet layers of gate channel 14P (page 4, paragraph 44); a second gate (right gate structure; see fig. 10) comprising nanosheet layers (nanosheet layers 34 formed after removing recessed sacrificial semiconductor material nanosheets 12R) of HKMG (32, 34) (the high-k dielectric layer 32 and a metal gate electrode 34; page 6, paragraphs 65 and 67; see fig. 10) and nanosheet layers of gate channel 14P (page 4, paragraph 44); a source/drain (S/D) channel 26 (page 5, paragraph 57) comprising isotropic silicon grown around a thinned silicon layer and annealed to form a single continuous material (a doped silicon germanium alloy; page 6, paragraph 59) between the first gate (left gate structure) and the second gate (right gate structure) (see fig. 10); and inner spacers 20S (page 5, paragraph 56) between the HKMG (32, 34) and the S/D channel 26 (see fig. 10).
The underlined limitation is interpreted as a product-by-process limitation. The claim is directed to the resulting structure, not the method of formation. Reznicek discloses the S/D channel 26 comprising a single continuous material between the left gate structure and the right gate structure (see fig. 10). Applicant has not demonstrated that the claimed process imparts structural differences distinguishing over Reznicek. Therefore, the claimed product is not patentably distinct.
“Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) (citations omitted). Furthermore, “because validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes.” Amgen Inc. v. F. Hoffman-La Roche Ltd., 580 F.3d 1340, 1370 n 14, 92 USPQ2d 1289, 1312, n 14 (Fed. Cir. 2009). However, in the context of an infringement analysis, a product-by-process claim is only infringed by a product made by the process recited in the claim. Id. at 1370 (see MPEP § 2113).
Regarding Claim 2, Reznicek discloses wherein the single continuous material comprises a selection from the group consisting of: silicon-germanium (SiGe), III-V materials, gallium arsenide, and indium gallium arsenide (a doped silicon germanium alloy; page 6, paragraph 59).
Regarding Claim 3, Reznicek discloses wherein the single continuous material comprises a dopant (page 6, paragraph 59).
Regarding Claim 4, Reznicek discloses wherein the nanosheet layers of gate channel 14P comprise a single continuous silicon material (page 3, paragraph 27; see fig. 10).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 5, 15, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Reznicek in view of Lee et al. (US Pub. 2020/0357931; hereinafter “Lee”).
Regarding Claim 5, Reznicek fails to disclose explicitly wherein the nanosheet layers of gate channel comprise a silicon-germanium (SiGe) material that varies in SiGe percentage along the gate channel.
However, Lee discloses multi-segmented channel nanosheets having low-Ge-content (10%; page 4, paragraph 37) SiGe end regions (112B, 114B, 116B) and high-Ge-content (40%; page 5, paragraph 45) SiGe central regions (112A, 114A, 116A) (page 5, paragraph 46; see fig. 11).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a gate channel having a SiGe material that varies in SiGe percentage along the gate channel, as taught by Lee, in order to improve hole mobility, gate stack reliability, and negative bias temperature instability (NBTI) (Lee; pages 2-3, paragraph 27).
Regarding Claim 15, Reznicek discloses a semiconductor structure comprising: a first gate (left gate structure; see fig. 10) comprising nanosheet layers (nanosheet layers formed after removing recessed sacrificial semiconductor material nanosheets 12R) of high-κ metal gate (HKMG) (32, 34) (a high-k dielectric layer 32 and a metal gate electrode 34; page 6, paragraphs 65 and 67; see fig. 10) and gate channel 14P (page 4, paragraph 44); a second gate (right gate structure; see fig. 10) comprising nanosheet layers (nanosheet layers formed after removing recessed sacrificial semiconductor material nanosheets 12R) of HKMG (32, 34) (a high-k dielectric layer 32 and a metal gate electrode 34; page 6, paragraphs 65 and 67; see fig. 10) and gate channel 14P (page 4, paragraph 44); and a source/drain (S/D) channel 26 (page 5, paragraph 57) between the first gate (left gate structure) and the second gate (right gate structure) (see fig. 10).
Reznicek fails to disclose explicitly wherein the nanosheet layers of the gate channel comprise isotropic silicon grown around a thinned and annealed to form a silicon-germanium (SiGe) material that varies in SiGe percentage along the gate channel.
However, Lee discloses multi-segmented channel nanosheets having low-Ge-content (10%; page 4, paragraph 37) SiGe end regions (112B, 114B, 116B) and high-Ge-content (40%; page 5, paragraph 45) SiGe central regions (112A, 114A, 116A) (page 5, paragraph 46; see fig. 11).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form a gate channel having a SiGe material that varies in SiGe percentage along the gate channel, as taught by Lee, in order to improve hole mobility, gate stack reliability, and negative bias temperature instability (NBTI) (Lee; pages 2-3, paragraph 27).
The underlined limitation is interpreted as a product-by-process limitation. The claim is directed to the resulting structure, not the method of formation. Lee discloses the nanosheet layers of the gate channel comprising a SiGe material that varies in SiGe percentage along the gate channel (page 4, paragraph 37; page 5, paragraphs 45 and 46). Applicant has not demonstrated that the claimed process imparts structural differences distinguishing over Reznicek in view of Lee. Therefore, the claimed product is not patentably distinct.
“Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) (citations omitted). Furthermore, “because validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes.” Amgen Inc. v. F. Hoffman-La Roche Ltd., 580 F.3d 1340, 1370 n 14, 92 USPQ2d 1289, 1312, n 14 (Fed. Cir. 2009). However, in the context of an infringement analysis, a product-by-process claim is only infringed by a product made by the process recited in the claim. Id. at 1370 (see MPEP § 2113).
Regarding Claim 16, Reznicek discloses wherein the S/D channel 26 comprises a dopant (page 6, paragraph 59).
Regarding Claim 20, Reznicek discloses further comprising inner spacers 20S (page 5, paragraph 56) between the HKMG (32, 34) and the S/D channel 26 (see fig. 10).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Reznicek.
Regarding Claim 7, Reznicek discloses wherein the single continuous material comprises silicon-germanium (page 6, paragraph 59).
Reznicek fails to disclose explicitly wherein the silicon-germanium at a germanium percentage of 15 percent.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range (see MPEP 2144.05; In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969)).
Furthermore, forming a SiGe source/drain region with a certain germanium percentage provides channel strain enhancement and mobility improvement.
Allowable Subject Matter
Claims 6 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 6 recites a third gate comprising nanosheet layers of HKMG and gate channel; and a second S/D channel comprising a single continuous silicon-germanium (SiGe) material between the second gate and the third gate.
Claim 17 recites a third gate comprising nanosheet layers of HKMG and gate channel; and a second S/D channel comprising a single continuous material between the second gate and the third gate.
These features in combination with the other elements of the base claim are neither disclosed nor suggested by the prior art of record.
Claims 18 and 19 depend from claim 17, so they are objected for the same reason.
Claims 8-14 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim 8 recites growing buffer silicon on lateral sides of a first dummy gate and a second dummy gate; growing a source/drain (S/D) epi on the buffer silicon; annealing the S/D epi and the buffer silicon into a single continuous material.
These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Claims 9-14 depend from claim 8, so they are allowed for the same reason.
Response to Arguments
Applicant’s arguments with regard to the rejections under 35 U.S.C. 102 have been fully considered, but they are not deemed to be persuasive for at least the following reasons.
With regard to the pending 35 USC § 102 rejection, applicant presents the following arguments:
Applicant respectfully asserts that Reznicek does not disclose the features of claim 1, as amended. For example, Reznicek does not disclose the feature of “a source/drain (S/D) channel comprising isotropic silicon grown around a thinned silicon layer and annealed to form a single continuous material between the first gate and the second gate” as required by claim 1 (emphasis added).
In contrast to these features, Reznicek discloses: Each S/D region 26 includes a semiconductor material and a dopant. The semiconductor material that provides each S/D region 26 can be selected from one of the semiconductor materials mentioned above for the semiconductor substrate 10. In some embodiments of the present application, the semiconductor material that provides each S/D region 26 may comprise a same semiconductor material as that which provides each semiconductor channel material nanosheet 14P. In other embodiments of the present application, the semiconductor material that provides each S/D region 26 may comprise a different semiconductor material than that which provides each semiconductor channel material nanosheet 14P. For example, the semiconductor material that provides each S/D regions may comprise a silicon germanium alloy, while each semiconductor channel material nanosheet 14P may comprise silicon. Reznicek, [0058].
Thus, Reznicek discloses at least two materials: 1) “a semiconductor material and a dopant” in each “S/D region 26”; and 2) a “semiconductor channel material nanosheet 14P.” So, even in instances where “the semiconductor material that provides each S/D region 26 may comprise a same semiconductor material as that which provides each semiconductor channel material nanosheet 14P,” the growth of the S/D region 26 means that the two materials are not “a single continuous material” as recited in claim 1. And there is certainly not a disclosure of “isotropic silicon grown around a thinned silicon layer and annealed to form a single continuous material.” For at least this reason, Reznicek does not disclose all of the features of independent claim 1.
However, Reznicek discloses a single, continuous material for the source/drain (S/D) region 26, which may comprise a silicon germanium alloy, with portions contacting the sidewalls of the gate channels 14P forming the interface to the gate channel. The semiconductor channel material nanosheet 14P itself is not part of the S/D region 26, but serves as the gate channel, and thus the S/D region 26 consists of one continuous material, as illustrated in Figure 10.
And the newly amended limitation, “isotropic silicon grown around a thinned silicon layer and annealed to form a single continuous material,” is to be interpreted as a product-by-process limitation, as explained in the rejections above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHEUNG LEE whose telephone number is (571)272-5977. The examiner can normally be reached 9 AM - 5:30 PM.
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/CHEUNG LEE/Primary Examiner, Art Unit 2812 April 7, 2026