Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4 and 7 are rejected under 35 U.S.C. 102a as being anticipated by Haga et al. (US 2017/0294400, hereinafter Haga).
With respect to claim 1, Haga discloses a semiconductor device (Fig. 3), comprising: a conductive member (3/4 – Para 0026; copper thin plate to form a lead); a solder layer (11) located on the conductive member; a chip (2) located on the solder layer; a coating film (29) located on the chip, the coating film being insulative (Para 0046; silicon nitride film 29), the coating film including a first covering part (top part of 29), the first covering part covering an outer perimeter edge of an upper surface of the chip (Fig. 4); an insulating part (16) located on the coating film; and a sealing resin (6 of Fig. 3) sealing the solder layer, the chip, the coating film, and the insulating part (6 covers solder layer 11, chip 2, the coating layer and the insulating part is a part of the chip as shown in Fig. 4).
With respect to claim 2, Haga discloses wherein the coating film further includes a second covering part covering a side surface of the chip (side part of 29).
With respect to claim 4, Haga discloses that the coating film includes at least one of silicon nitride, silicon oxide, or silicon oxynitride (Para 0045; silicon nitride film 29).
With respect to claim 7, Haga discloses a method for manufacturing a semiconductor device (Fig. 0005), the method comprising:
a preparation process of preparing a stacked body (Fig. 11A-AAC) in which a coating film (16 of Fig. 11A) is formed on a wafer (45), and an insulating part (17 of Fig. 11C -Para 0067) is formed on the coating film; a dicing process of obtaining a chip by dicing the stacked body at a position at which the coating film is located (Fig. 11B-11C; Para 0064), the coating film and the insulating part being stacked in the chip (Fig. 4 – 16 &17 are stacked in the chip); a connection process of connecting the chip on a conductive member (3 of Fig. 3) via a solder layer (11); and a sealing process of sealing the solder layer, the chip, the coating film, and the insulating part with a sealing resin (6 of Fig. 3 - 6 covers solder layer 11, chip 2, the coating layer and the insulating part is a part of the chip as shown in Fig. 4).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Haga in view of Morita et al. (US 5,414,297, hereinafter Morita).
With respect to claim 3, Haga discloses the device according to claim 2.
Haga does not explicitly disclose wherein the side surface of the chip includes: a first side surface connected with the upper surface of the chip; a second side surface positioned below the first side surface and further outward than the first side surface; and a step portion connecting the first and second side surfaces, and the second covering part covers the first side surface.
In an analogous art, Morita discloses wherein the side surface of the chip includes: a first side surface connected with the upper surface of the chip; a second side surface positioned below the first side surface and further outward than the first side surface (Fig. 1); and a step portion connecting the first and second side surfaces, and the second covering part covers the first side surface (10 covers the first side surface).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga’s device by having Morita’s disclosure in order to improve the dicing process.
Claims 5, 9, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Haga in view of Jungnickel et al. (US 2007/0123020, hereinafter Jungnickel).
With respect to claim 5, Haga discloses the device according to claim 1.
Haga does not explicitly disclose wherein the solder layer includes: a first solder part; and a second solder part positioned outward of the first solder part, the second solder part including a side surface of the solder layer, the first solder part includes lead, and the second solder part includes lead oxide.
In an analogous art, Jungnickel discloses wherein the solder layer includes: a first solder part (102A of Fig. 1c); and a second solder part (107) positioned outward of the first solder part (107 is outward of 102A), the second solder part including a side surface of the solder layer (Fig. 1c), the first solder part includes lead (Para 0005; 0011 and 0022 – solder material comprises of lead), and the second solder part includes lead oxide (Para 0070; 0010; 0027 – oxidizing 102A to form lead oxide).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga’s device by having Jungnickel’s disclosure in order to protect the solder layer during further processing.
With respect to claim 9, Haga discloses the method for manufacturing the device according to claim 7.
Haga does not explicitly disclose an oxidation process of forming a second solder part outward of a first solder part by oxidizing the solder layer from a side surface, the first solder part including lead, the second solder part including lead oxide.
In an analogous art, Jungnickel discloses an oxidation process (Para 0016) of forming a second solder part (107) outward of a first solder part (102A) by oxidizing the solder layer from a side surface (Para 0027), the first solder part including lead (Para 0005; 0011 and 0022 – solder material comprises of lead), the second solder part including lead oxide (Para 0070; 0010; 0027 – oxidizing 102A to form lead oxide).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga’s device by having Jungnickel’s disclosure in order to protect the solder layer during further processing.
With respect to claim 10, Haga discloses a semiconductor device (Fig. 3), comprising: a conductive member (3/4 – Para 0026; copper thin plate to form a lead); a solder layer (11) located on the conductive member; a chip (2) located on the solder layer; and a sealing resin (6 of Fig. 3) sealing the solder layer, and the chip (6 covers solder layer 11, and chip 2).
Haga does not explicitly disclose wherein the solder layer including a first solder part; and a second solder part, the second solder part being positioned outward of the first solder part, the second solder part including a side surface; the first solder part including lead, the second solder part including lead oxide.
In an analogous art, Jungnickel discloses wherein the solder layer including a first solder part (102A of Fig. 1c); and a second solder part (107), the second solder part being positioned outward of the first solder part (107 is outward of 102A), the second solder part including a side surface (Fig. 1c), the first solder part including lead (Para 0005; 0011 and 0022 – solder material comprises of lead), the second solder part including lead oxide (Para 0070; 0010; 0027 – oxidizing 102A to form lead oxide).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga’s device by having Jungnickel’s disclosure in order to protect the solder layer during further processing.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Haga/Jungnickel in view of Kaplan et al. (US 2016/0045841, hereinafter Kaplan).
With respect to claim 6, Haga/Jungnickel discloses the device according to claim 5.
Haga/Jungnickel does not explicitly disclose wherein the second solder part includes at least one of Pb₂O₃ or Pb₃O₄.
In an analogous art, Kaplan discloses wherein the second solder part includes at least one of Pb₂O₃ or Pb₃O₄ (Para 1049 – Pb3O4).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga/Jungnickel’s device by having Kaplan’s disclosure in order to protect the solder layer during further processing.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Haga in view of Seddon (US 2013/0337633, hereinafter Seddon).
With respect to claim 8, Haga discloses the method for manufacturing the device according to claim 7.
Haga does not explicitly disclose wherein the dicing process comprises a first step, a second step, and a third step, in the first step, the stacked body is diced partway at a position at which the coating film is located to form a trench, in the second step, a covering part is formed at a side
surface of the trench, the covering part including same material as the coating film, and in the third step, the stacked body is diced to a lower end at the position of the trench to obtain the chip.
In an analogous art, Seddon discloses wherein the dicing process comprises a first step, a second step, and a third step, in the first step, the stacked body is diced partway at a position at which the coating film (33 of Fig. 7) is located to form a trench (15), in the second step, a covering part (81) is formed at a side surface of the trench, the covering part including same material as the coating film (Para 0017 and 0026; 33 and 81 comprises of an oxide material), and in the third step, the stacked body is diced to a lower end at the position of the trench to obtain the chip (Para 0025). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Haga’s method by having Seddon’s disclosure in order to control the crack during dicing process.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday.
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/MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899