DETAILED ACTION
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed.
Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable Choung et al. (US 2022/0077257 A1; hereinafter “Choung”) and further in view of Yoda et al. (JP 2010033936 A; hereinafter “Yoda”).
In regard to claim 1, Choung teaches a display apparatus (a sub-pixel circuit 100) (Fig. 1D and paragraph 27), comprising:
a substrate (a substrate 102) comprising a display area (the area annotated as DA that contains the pixel opening 124A in annotated Fig. 1C below) in which a plurality of pixels are arranged and a non-display area (the area annotated as NDA in Fig. 1C below) disposed adjacent to the display area (Fig. 1A, annotated Fig. 1C, and paragraph 27);
a pixel electrode (a metal layer 104) disposed on the display area of the substrate (the metal layer 104 is deposited in the pixel openings 124A) (Fig. 1A and paragraph 28);
a metal bank layer (inorganic overhang structures 110) disposed in the display area and the non-display area and defining a pixel opening exposing a portion of the pixel electrode and a hole (a hole exposing the top surface of the inorganic overhang structures 110) spaced apart from the pixel opening and extending in a first direction (the inorganic overhang structures 110 are shown containing a hole exposing a surface that extends in a “Y” direction in Fig. 1C) (Fig. 1C and paragraphs 30 and 33).
However, Choung doesn’t explicitly teach a horizontal voltage line disposed in the display area inside the hole in a plan view.
Yoda teaches a display apparatus (an organic EL device having a top emission structure) (Fig. 1 and paragraph 12), wherein a horizontal voltage line (a common wiring 3) disposed in the display area inside a hole in a plan view (the common wiring is shown between the hole of the bank side wall part 4b in the horizontal direction in Fig. 10) (Fig. 1, Fig. 10 and paragraph 17).
It would be obvious to one skilled in the art to combine the teachings of Choung with the teachings of Yoda to have a horizontal voltage line disposed in the display area inside the hole in a plan view since this layout prevents subpixel area reduction and deterioration of display quality can be prevented as taught by Yoda.
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In regard to claim 2, Choung teaches wherein the metal bank layer comprises a first sub-metal layer (a lower portion 110A) and a second sub-metal layer (an upper portion 110B) disposed on the first sub-metal layer (the lower portion 110A is shown below the upper portion 110B in Fig. 1A) (Fig. 1A and paragraph 30), and the second sub-metal layer has a tip (the tip of the upper portion of the side wall 113) extending from an upper surface of the first sub-metal layer toward a center of the pixel opening (the tip of the upper surface of the side wall 113 is shown extending towards the pixel opening 14A in Fig. 1A).
In regard to claim 3, Choung teaches the display apparatus, further comprising:
an intermediate layer (OLED material 112) disposed on the pixel electrode in the pixel opening (Fig. 1A and paragraph 33); and
an opposite electrode (a cathode 114) disposed on the intermediate layer in the pixel opening (Fig. 1A and paragraph 33).
In regard to claim 4, Choung teaches wherein the opposite electrode is directly connected to the first sub-metal layer (the cathode 114 is shown contacting the lower portion 110A in Fig. 1A).
Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable Choung in view of Yoda as applied to claim 2 above, and further in view of Lee (US 2016/0203765 A1).
In regard to claim 5, Choung in view of Yoda wherein the first sub-metal layer is directly connected to a common power supply line (the lower portion 110A is directly connected to an assistant cathode 202 which is known in the art functions as a common power supply line) (Fig. 2 and paragraph 30).
However, Choung in view of Yoda don’t explicitly teach a common power supply line disposed in the non-display area and surrounding at least a portion of the display area in a plan view.
Lee teaches a display apparatus (an OLED display 100) (Fig. 1 and paragraph 54), comprising:
a common power supply line (first power supply wires 160 and auxiliary common electrode 144 function as the common power supply line) disposed in a non-display area (area outside of the display area DA) and surrounding at least a portion of the display area in a plan view (the first power supply wires 160 is shown surrounding the display area DA in Fig. 1) (Fig.1 and paragraphs 78-79).
It would be obvious to one skilled in the art to combine the teachings of Choung in view of Yoda with the teachings of Lee to have a common power supply line disposed in the non-display area and surrounding at least a portion of the display area in a plan view since this layout is well known in the art to allow for connections at multiple points within the device while allowing for a larger display area.
In regard to claim 6, Choung in view of Yoda and lee teach wherein the metal bank layer has a first boundary and a second boundary facing the first boundary (the upper and lower boundaries of the upper and lower portions 110B and 110A are shown facing each other in Fig. 2), and the first boundary and the second boundary overlap the common power supply line in a plan view (the upper and lower boundaries of the upper and lower portions are shown overlapping the assistant cathode 202 in Fig. 2).
In regard to claim 7, Choung in view of Lee doesn’t explicitly teach wherein the horizontal voltage line has a first end and a second end, and the first end and the second end of the horizontal voltage line are disposed between the first boundary and the second boundary of the metal bank layer.
Yoda teaches wherein the horizontal voltage line has a first end and a second end (the left and right sides of the common wiring 3 function as the first and second end as shown in Yoda Fig. 10), and the first end and the second end of the horizontal voltage line are disposed between the first boundary and the second boundary of a metal bank layer (the common wiring 3 is shown between the left and right ends of the bank side wall part 4b in Fig. 10).
It would be obvious to one skilled in the art to combine the teachings of Choung in view of Lee with the teachings of Yoda to have the horizontal voltage line has a first end and a second end, and the first end and the second end of the horizontal voltage line are disposed between the first boundary and the second boundary of the metal bank layer since this prevents poor contacts from occurring within the device as taught by Yoda (paragraph 21).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable Choung in view of Yoda as applied to claim 1 above, and further in view of Ozawa (US 2008/0287028 A1).
In regard to claim 9, Choung in view of Yoda don’t explicitly teach the display apparatus, further comprising:
a driving voltage line disposed between the substrate and the horizontal voltage line and extending in a second direction intersecting the first direction,
wherein the horizontal voltage line is electrically connected to the driving voltage line.
In regard to claim 9, Ozawa teaches a display apparatus (a substrate 11 as shown in Fig. 1) (Fig. 1 and paragraph 39), further comprising:
a driving voltage line (a pixel driving circuit 140 containing driving transistor Tr1) disposed between a substrate (the substrate 11) and a horizontal voltage line (an auxiliary electrode 14) and extending in a second direction intersecting a first direction (the pixel driving circuit is shown extending in the “Y” direction while the auxiliary electrode 14 is shown extending in the “X” direction) (Fig. 1, Fig. 3 and paragraphs 40 and 43),
wherein the horizontal voltage line is electrically connected to the driving voltage line (the driving transistor Tr1 is electrically connected to the first electrode 13, which is also electrically connected to auxiliary electrode 14 as shown in Fig. 4) (Fig. 4 and paragraph 45).
It would’ve been obvious to one skilled in the art to combine the teachings of Choung in view of Yoda with the teachings of Ozawa to have a driving voltage line disposed between the substrate and the horizontal voltage line and extending in a second direction intersecting the first direction, wherein the horizontal voltage line is electrically connected to the driving voltage line since this layout prevents a large difference in voltage drop according to the distance from a power source to the respective organic light emitting devices as taught by Ozawa (paragraph 48).
In regard to claim 10, Choung in view of Yoda and Ozawa teach wherein the driving voltage line includes a plurality of driving voltage lines, the horizontal voltage line includes a plurality of horizontal voltage lines (a plurality of auxiliary electrodes lines 14 and pixel driving circuits 140 are shown in Fig. 1 and Fig. 3), and in a plan view, the plurality of driving voltage lines and the plurality of horizontal voltage lines form a mesh shape (sine the auxiliary electrode lines 14 and pixel driving circuits 140 are orientated in intersecting directions, the mesh shape would be apparent in a plan view).
Claim Objections
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Choung is considered a close prior art of record. However, Choung fails to teach or suggest the horizontal voltage line comprises a first horizontal line and a second horizontal line disposed on the first horizontal line, the first horizontal line and the first sub-metal layer comprise a same material, and the second horizontal line and the second sub-metal layer comprise a same material. Choung is silent to the regard of multi-layered horizontal voltage line.
Yoda is considered another close prior art of record. However, Yod fails to teach the horizontal voltage line comprises a first horizontal line and a second horizontal line disposed on the first horizontal line, the first horizontal line and the first sub-metal layer comprise a same material, and the second horizontal line and the second sub-metal layer comprise a same material. Yoda is silent to the regard of multi-layered horizontal voltage line.
Allowable Subject Matter
Claims 11-20 are allowed.
The following is the Office's statement of reasons for allowance:
Regarding claim 11, the prior art of record, taken alone or in combination, fails to teach or suggest:
“a horizontal voltage line disposed in the display area and the non-display area between the first sub-hole and the second sub-hole in a plan view”
Choung is considered a close prior art of record. However, Choung fails to teach or suggest a horizontal voltage line disposed in the display area and the non-display area between the first sub-hole and the second sub-hole in a plan view. Choung is silent regarding the existence of a component that could be a horizontal voltage line between a first sub-hole and the second sub-hole.
Yoda is considered another close prior art of record. However, Yod fails to teach a horizontal voltage line disposed in the display area and the non-display area between the first sub-hole and the second sub-hole in a plan view. Yoda is silent regarding the existence of a component that could be a horizontal voltage line between a first sub-hole and the second sub-hole.
Moreover, none of the prior arts of record, taken either alone or in combination, anticipate nor render obvious the claimed inventions. Hence, claims 11-20 are allowable over the prior arts of record.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEYON ALI-SIMAH PUNCHBEDDELL whose telephone number is (571)270-0078. The examiner can normally be reached Mon-Thur: 7:30AM-3:30 PM.
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/SEYON ALI-SIMAH PUNCHBEDDELL/Examiner, Art Unit 2893
/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893