DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4 & 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US Pub no. 2014/0197376 A1) in view of Nakayama (US Pub no. 2018/0040726 A1)
Regarding claim 1, Ma et al discloses a method comprising: epitaxially growing a Ge1-x Snx channel layer (5) over a substrate(1)[0023][0027] ; epitaxially growing a Ge1-ySny barrier layer(6)([0035- states SiGeSn can be used) over the Ge1-xSnx channel layer(5) to form a two-dimensional hole gas in the Ge1-xSnx channel layer(5) [0028][0035]; etching the Ge1-xSnx channel layer(5) and the Ge1-ySny barrier layer(6) to form a first opening and a second opening in the Ge1-xSnx channel layer(5) and the Ge1-ySny barrier layer(6)[0032] and forming a first gate electrode (7/7b)over the Ge1-ySny barrier layer(6)[0029][0035] fig. 1.
Ma et al teaches the Ge1-xSnx channel layer(5)[0027] but is silent to “in a metastable state” . Since Ma et al teaches the same or similar composition as applicant’s invention [Applicant’s specification-0025] , a prima facie case of anticipation or obviousness exists that the Ge1-xSnx channel layer in Ma et al would necessarily possess the characteristics of “metastable state, In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433-34 (CCPA 1977). Furthermore, Ma et al fails to teach depositing a first source/drain electrode and a second source/drain electrode in the first opening and the second opening, respectively.
Nakayama et al discloses a field effect transistor comprising a source electrode(105) and drain electrode(106) in the first opening and the second opening formed in the channel (102)and barrier layer(103) [0098]. Since depositing first source/drain electrode and a second source/drain electrode in first and second openings is one of finite solutions to improve ohmic contact resistance as taught by Nakayama et al, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to try in Ma et al because a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely the product not of innovation but of ordinary skill and common sense (KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (U.S. 2007))
Regarding claim 2, Ma et al discloses x [0027] and y[0028][0031][0035] but fails teach wherein x > y. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the concentration of x and y such that x>y is achieved through routine experimentation to optimize carrier mobility. [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Regarding claim 3, Ma et al discloses wherein 0 < x < 30%[0027].
Regarding claim 4, Ma et al discloses wherein the Ge1-ySny barrier layer 6[0028][0031][0035] but is silent to “in a metastable state” . Since Ma et al teaches the same or similar composition(Ma et al teaches cap 6 can be the same material as element 8 (SiGeSn)[0028][0031][0035] as applicant’s invention [Applicant’s specification-0025] , a prima facie case of anticipation or obviousness exists that the Ge1-xSnx channel layer in Ma et al would necessarily possess the characteristics of “metastable state”. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433-34 (CCPA 1977).
Regarding claim 6, Ma et al discloses further comprising: further comprising: epitaxially growing a Ge1-zSnz, buffer layer(2) over the substrate[0023-0024], and the Ge1-xSnx channel layer(5) is epitaxially grown and in contact with the Ge1-zSnzbuffer layer[0025]0027] (Examiner notes the buffer layer is in contact with the channel layer by way of element 4[0023-0027]). Ma et al fails to teach wherein x>z. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the concentration of x and z such that x>z is achieved through routine experimentation to optimize carrier mobility. [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US Pub no. 2014/0197376 A1) in view Nakayama (US Pub no. 2018/0040726 A1) as applied to claim 1 and further in view of Sriram (US Pub no. 2014/0361343 A1).
Regarding claim 5, Ma et al as modified by Nakayama et al discloses all the claim limitations of claim 1 but fails to teach further comprising forming a second gate electrode over the Ge1-ySny barrier layer, wherein the second gate electrode is between the first gate electrode and the first source/drain electrode.
However, Sriram et al teaches a transistor device comprising forming a second gate electrode (48)over the barrier layer(38) wherein the second gate electrode (48)is between a first gate electrode(46) and first source/drain electrode(42,44)[0086]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to further modify Ma et al and Nakayama et al with the teachings of Siriram et al such that forming a second gate electrode over the Ge1-ySny barrier layer, wherein the second gate electrode is between the first gate electrode and the first source/drain electrode results since adding a second gate acts as a shield for the first gate and reduces the feedback capacitance between the drain and first gate.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US Pub no. 2014/0197376 A1) in view Nakayama (US Pub no. 2018/0040726 A1) as applied to claim 6 and further in view of Moutanabbir (US Pub no. 2022/0310793 A1).
Regarding claim 7, Ma et al as modified by Nakayama et al discloses all the claim limitations of claim 6 but fails to teach wherein a Sn atomic percentage of the Ge1-zSnz buffer layer is decreased in a depth direction of the Ge1-zSnz buffer layer.
However, Moutanabbir et al discloses a quantum well structure wherein a Sn atomic percentage of the Ge1-zSnz buffer layer is decreased in a depth direction of the Ge1-zSnz buffer layer[0175]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to further modify Ma et al and Nakayama et al with the teachings of Moutanabbir et al to facilitate the incorporation of Sn in the growing layer.
Claim(s) 8 -11, 13, & 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Moutanabbir (US Pub no. 2022/0310793 A1) in view of Koo (US Pub no. 2008/0308844 A1)
Regarding claim 8, Moutanabbir et al discloses A method comprising:
receiving a substrate(42) [0143]; performing a first epitaxy process to form a channel layer (26)over the substrate(42 or 38) [0143][0169], wherein the channel layer (26)comprises Sn and Ge and has a first Sn atomic percentage[0143][0169] (Examiner notes since at least one Group IV material[0124] is used and the Sn precursor is not discontinued during the channel layer formation, therefore Sn and Ge exist in the channel layer) ; determining a second Sn atomic percentage in a barrier layer(28) based on the first Sn atomic percentage of the channel layer for increasing a spin-orbit coupling effect of the channel layer(26) [0132][0143][0169]; performing a second epitaxy process to form the barrier layer (28)with the second Sn atomic percentage over and in contact with the channel layer(26)[0143][0169].
Moutanabbir et al teaches that the device can act as a building block for a broad variety of devices such as ultrafast transistors that may find applications in spintronics [0152] but fails to clearly express the structural limitations of forming a first source/drain electrode and a second source/drain electrode in the channel layer and the barrier layer; and forming a gate electrode to cover the barrier layer and between the first source/drain electrode and the second source/drain electrode.
However, Koo et al teaches a spintronics transistor forming a first source/drain electrode(22) and a second source/drain electrode(23) in a channel layer(7) and barrier layer(5’)[0038-0039]; and forming a gate electrode (15)to cover the barrier layer(5’) and between the first source/drain electrode (22)and the second source/drain electrode(23) fig. 1/fig.3a [0026]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Moutanabbir et al with the teachings of Koo et al to implement a spin transistor device.
Regarding claim 9, Moutanabbir et al discloses wherein the barrier layer(28) is substantially free of N- type dopants and P-type dopants[0169].
Regarding claim 10, Moutanabbir et al discloses wherein the second Sn atomic percentage of the barrier layer(28) is higher than the first Sn atomic percentage of the channel layer(26) [0169].
Regarding claim 11, Moutanabbir et al discloses wherein the barrier layer (28)further comprises Ge[0169].
Regarding claim 13, Moutanabbir et al discloses further comprising:
performing a third epitaxy process to form a buffer layer(22) over the substrate (38)and prior to performing the first epitaxy process[0168-0169].
Regarding claim 14, Moutanabbir et al discloses wherein the buffer layer (22)comprises Sn and Ge[0168-0169].
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Moutanabbir (US Pub no. 2022/0310793 A1) in view of Koo (US Pub no. 2008/0308844 A1) as applied to claim 11 and further in view of Ma (US Pub no. 2014/0197376 A1).
Regarding claim 12, Moutanabbir et al as modified by Koo et al discloses all the claim limitation of claim 11 but fails to teach wherein a Ge atomic percentage in the channel layer is lower than a Ge atomic percentage in the barrier layer.
However, Ma et al discloses a Ge atomic percentage in a channel layer(5) [0027] and a Ge atomic percentage in the barrier layer(6) [0028][0031][0035] but fails to teach wherein a Ge atomic percentage in the channel layer is lower than a Ge atomic percentage in the barrier layer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a Ge atomic percentage in the channel layer lower than a Ge atomic percentage in the barrier layer through routine experimentation to optimize stress through lattice mismatch. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. "In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to further modify Moutanabbir et al and Koo et al with the teachings of Ma et al to optimize carrier mobility.
Claim(s) 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US Pub no. 2014/0197376 A1)
Regarding claim 15, Ma et al discloses A method comprising: epitaxially growing a channel stack(2-6) over a substrate(1)[0023-0028], wherein the channel stack(2-6) is a heterostructure and comprises: a channel layer(5) comprising a first metal-containing binary compound(GeSn)[0027] and a barrier layer (6)in contact with the channel layer and comprising a second metal-containing binary compound material(SiGeSn)[0028][0031][0035]; forming source/drain electrodes(9) over the substrate (1)and in contact with the channel layer(5)[0034]; depositing a gate dielectric layer (7a)to cover the channel stack(2-6)[0029]; and forming a gate electrode (7b)over the gate dielectric layer(7a) and the channel stack(2-6)[0029] fig. 1.
Ma et al fails to teach wherein a metal atomic percentage of the first metal-containing binary compound material is higher than a metal atomic percentage of the second metal-containing binary compound material. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the metal atomic percentage of the first metal-containing binary compound material being higher than a metal atomic percentage of the second metal-containing binary compound material through routine experimentation to optimize lattice mismatch to influence carrier mobility. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation."In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Regarding claim 16, Ma et al discloses wherein the metal atomic percentage of the first metal-containing binary compound material (GeSn)is not higher than about 30%[0027].
Regarding claim 17, Ma et al discloses wherein the metal atomic percentage of the second metal-containing binary compound material(SiGeSn) is not higher than about 30%[0031][0035].
Regarding claim 18, Ma et al discloses wherein the channel layer(5) [0027]but is silent to “in a metastable state” . Since Ma et al teaches the same or similar composition as applicant’s invention [Applicant’s specification-0025] , a prima facie case of anticipation or obviousness exists that the Ge1-xSnx channel layer in Ma et al would necessarily possess the characteristics of “metastable state”. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433-34 (CCPA 1977).
Regarding claim 19, wherein the channel stack further comprises a buffer layer (2) under the channel layer and comprising a third metal-containing binary
compound material (SiGeSn)[0024][0027] but fails to teach wherein the metal atomic percentage of the first metal-containing binary compound material is higher than a metal atomic percentage of the third metal- containing binary compound material. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the metal atomic percentage of the first metal-containing binary compound material is higher than a metal atomic percentage of the third metal- containing binary compound material through routine experimentation to optimize lattice mismatch to influence carrier mobility. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. "In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Regarding claim 20, Ma et al discloses wherein the first metal-containing binary compound material is GeSn[0027].
Conclusion
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/LATANYA N CRAWFORD EASON/Primary Examiner, Art Unit 2813
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