Prosecution Insights
Last updated: August 18, 2026
Application No. 18/465,376

CIRCULAR-SHAPED RESISTOR

Final Rejection §103
Filed
Sep 12, 2023
Examiner
KIELIN, ERIK J
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
2 (Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
72%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
427 granted / 635 resolved
-0.8% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
43 currently pending
Career history
668
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.9%
+6.9% vs TC avg
§102
24.8%
-15.2% vs TC avg
§112
25.5%
-14.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 635 resolved cases

Office Action

§103
DETAILED ACTION Table of Contents I. Notice of Pre-AIA or AIA Status 3 II. Claim Objections 3 III. Claim Rejections - 35 USC § 103 3 A. Claims 1-7 are rejected under 35 U.S.C. 103 as being unpatentable over US 2014/0062578 (“Chan”) in view of US 2012/0091529 (“Cheng”). 4 C. Claims 8 and 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Chan in view of Cheng and US 2013/0221487 (“Park”). 9 IV. Response to Arguments 12 Conclusion 12 [The rest of this page is intentionally left blank.] I. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . II. Claim Objections Claims 1, 7, and 8 are objected to because of the following informalities: In claim 1, either (1) in line 5 remove “wherein” or (2) in line 6 replace “being” with “is” and in line 8, replace “including” with “includes” for correct grammar. In claim 7, either (1) replace “further comprising:” with “wherein” or (2) remove “is” for correct grammar. In claim 8, either (1) in line 6 remove “wherein” or (2) in line 6 replace “being” with “is” and in line 8, replace “including” with “includes” for correct grammar. In claim 8, either (1) in line 19 remove “wherein” or (2) in line 19 replace “being” with “is” and in line 22, replace “including” with “includes” for clarity. Appropriate correction is required. III. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. A. Claims 1-7 are rejected under 35 U.S.C. 103 as being unpatentable over US 2014/0062578 (“Chan”) in view of US 2012/0091529 (“Cheng”). Claim 1 reads, 1. (Currently Amended) A structure comprising: [1] a substrate including a layer of dielectric material; and [2a] a circular resistor embedded in the layer of dielectric material, wherein the circular resistor comprises: [2b] a plurality of circular metal elements that are concentrically arranged, [2c] wherein each of the plurality of circular metal elements being physically separated from adjacent circular metal elements by one of a plurality of dielectric rings, and [2d] each of the plurality of circular metal elements including an opening; and [2e] a plurality of metal connectors that electrically connect the plurality of circular metal elements in series across the openings, [2f] wherein the plurality of circular metal elements and the plurality of dielectric rings are alternately stacked in a radial direction to define a radial, alternating metal-dielectric multilayer structure embedded within the dielectric layer. With regard to claim 1, Chan discloses, generally in Figs. 1 and 2A-2E, [1] a substrate 100 [¶ 15] including a layer of dielectric material [shown in Fig. 1 covering the substrate 100 but not given a reference character]; and [2a] a circular resistor 102 [¶¶ 18-19] embedded in the layer of dielectric material, wherein the circular resistor 102 comprises: [2b] a plurality of circular …[resistive polysilicon]… elements 102 that are concentrically arranged [¶¶ 19, 23; Figs. 2A-2E], [2c] wherein each of the plurality of circular …[resistive polysilicon]… elements 102 being physically separated from adjacent circular …[resistive polysilicon]… elements by one of a plurality of dielectric rings [i.e. the portion of the dielectric material shown between the concentric polysilicon rings 102 in Fig. 1], and [2d] each of the plurality of circular …[resistive polysilicon]… elements including an opening [where metal connectors 1028 (¶ 25, infra) are formed]; and [2e] a plurality of metal connectors 1028 that electrically connect the plurality of circular …[resistive polysilicon]… elements in series across the openings [as shown in Figs. 2A-2E], [2f] wherein the plurality of circular …[resistive polysilicon]… elements and the plurality of dielectric rings are alternately stacked in a radial direction to define a radial, alternating …[resistive polysilicon]… -dielectric multilayer structure embedded within the dielectric layer [as shown in Fig. 1]. With regard to features [1], [2]a, and [2c] of claim 1, specifically the claimed “dielectric material”, as indicated above, Fig. 1 shows a layer of material forming concentric rings between each of the concentric rings of the resistor 102, as well as embedding the resistor 102, but the material is neither given a reference character nor discussed in Chan. However, if the material were other than dielectric, then the layers of the resistor would be electrically shorted to each other as well as to the other device layers shown in Fig. 1, rather than being serially connected by the metal connectors 1028. As such, it is held, absent evidence to the contrary, that the unlabeled material layer is a dielectric material. As such, the burden of proof is shifted to Applicant to prove the contrary. (See MPEP 2112(I)-(V).) Even if Applicant were to provide proof that the material layer is not a dielectric material, then it would still be obvious for the following reasons. Cheng, like Chan, teaches a spiral resistor 200 embedded in a dielectric material (again, shown but not given a reference character), the dielectric material forming a corresponding dielectric spiral between each ring of the resistor spiral (Cheng: ¶¶ 22, 25; Figs. 4-5). Cheng further teaches that the spiral resistor is formed in the interconnect structure 150 which includes specifically a plurality of dielectric layers, stating in this regard, [0018] Referring now to FIG. 4, an interconnect structure 150 is formed over the doped regions 60 and 70 and the isolation structures 90-91. The interconnect structure 150 includes a plurality of patterned dielectric layers and conductive layers that provide interconnections (e.g., wiring) between circuitries, inputs/outputs, and various doped features, for example, the doped regions 60, 70, and 110-111. [0020] The interconnect structure 150 includes an interlayer dielectric (ILD) that provides isolation between the interconnect layers. The ILD may include a dielectric material such as a low-k material or an oxide material. (Cheng: ¶¶ 18, 20; emphasis added) Thus, to the extent that Applicant were to provide proof that the material shown in Fig. 1 of Chan is not dielectric, then, it would have been at least obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to make the material from a dielectric material, in order to electrically isolate all of the components of the interconnect, including the concentric rings of the resistor, as taught in Cheng (¶¶ 18, 20). With regard to feature [2b] of claim 1, specifically the material forming the concentric rings of the resistor being metal, Chan uses polysilicon (Chan: ¶¶ 19, 23), rather than metal. Cheng further teaches that the material of the resistor 200 can be the same material as the interconnect lines, stating in this regard, [0021] A resistor 200 is formed in one of the interconnect layers of the interconnect structure 150. The resistor 200 may be formed at the same time as other metal lines in the interconnect layer, and may include the same materials as the metal lines, such as aluminum or copper. [0025] Referring to FIG. 5, a top level view of an embodiment of the resistor 200 is illustrated. As is shown, the resistor 200 has a substantially spiral shape. From the top level view, the resistor 200 is a continuous metal line, but it may be conceptually divided into a plurality of portions or segments. (Cheng: ¶¶ 21, 25; emphasis added) Other materials for the metal lines of the interconnect structure including polysilicon, as in Chan: [0019] In more detail, the interconnect structure 150 may include a plurality of interconnect layers, also referred to as metal layers. Each of the interconnect layers includes a plurality of interconnect features, also referred to as metal lines. The metal lines may be aluminum interconnect lines or copper interconnect lines, and may include conductive materials such as aluminum, copper, aluminum alloy, copper alloy, aluminum/silicon/copper alloy, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, polysilicon, metal silicide, or combinations thereof. (Cheng: ¶ 19) It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to make the circular elements 102 of Chan from metal because Cheng teaches that metal is a suitable alternative to the polysilicon that Chan uses. As such, the selection of metal amounts to obvious material choice. (See MPEP 2144.07.) With regard to feature [2e] of claim 1, specifically the claimed plurality of metal connectors, Chan states, [0025] In this embodiment, the poly-silicon resistor 102-1 can have a plurality of half circular structures, half-ring shaped structures, irregular semicircle structures, a plurality of concentric circle structures, a plurality of concentric circular structures or a plurality of octagon surrounding the drain. The poly-silicon resistor 102-1 has an opening area 1028. The opening area comprises a plurality of conductivity layer[s]. The conductivity layer can comprise metal segments or poly-silicon segments for connecting each ring of the poly-silicon resistor 102-1 to the next ring of the poly-silicon resistor 102-1. (Chan: ¶ 25; emphasis added) This is all of the limitations of claim 1. With regard to claims 2-5 and 7, Chan modified according to Cheng to make the circular elements 102 from metal, further teaches, 2. (Currently Amended) The structure of claim 1, wherein each of the plurality of circular metal elements 102 [of Chan/Cheng] includes the opening at one location where each of the plurality of circular metal elements 102 [of Chan/Cheng] is connected [by metal connectors 1028] to one of the adjacent circular metal element 102 [of Chan/Cheng] of the plurality of circular metal elements 102 [of Chan/Cheng] through one of the plurality of metal connectors 1028. 3. (Original) The structure of claim 2, wherein a distance between each of the plurality of circular metal elements and each of the adjacent circular metal elements is the same [as shown in each of Figs. 2A-2E of Chan]. 4. (Original) The structure of claim 1, wherein a thickness of each of the plurality of circular metal elements is the same [as shown in Fig. 1 of Chan]. 5. (Original) The structure of claim 1, wherein each of the plurality of circular metal elements 102 [of Chan/Cheng] includes a same metal material [because they are simultaneously patterned from the same layer (Chan: ¶ 23)]. 7. (Original) The structure of claim 1, further comprising: at least one electrode 102a each attached to one of the plurality of metal connectors [Chan: ¶¶ 19, 24; Figs. 1, 2A]. With regard to claim 6, Chan in view of Cheng further teaches, 6. (Original) The structure of claim 1, wherein each of the plurality of metal connectors 1028 has a thickness that is greater than a thickness of each of the plurality of circular metal elements 102 [of Chan/Cheng]. In this regard, the connection of the metal rings in Fig. 2E of Chan is the same as shown in Fig. 1A of the Instant Application. The thickness of each of the metal connectors is shown to be twice the thickness of each ring plus the thickness of the dielectric layer between adjacent rings, in order to connect said adjacent rings together as shown in each of Fig. 2E of Chan and Fig. 1A of the Instant Application. C. Claims 8 and 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Chan in view of Cheng and US 2013/0221487 (“Park”). Claim 8 reads, 8. (Currently Amended) A device comprising: [1] a substrate including a layer of dielectric material; [2a] a first circular resistor embedded in the layer of dielectric material, wherein the first circular resistor comprises: [2b] a first plurality of circular metal elements that are concentrically arranged, [2c] wherein each of the first plurality of circular metal elements being physically separated from adjacent circular metal elements by one of a first plurality of dielectric rings, and [2d] each of the first plurality of circular metal elements including a first opening; and [2e] a first plurality of metal connectors that electrically connect the first plurality of circular metal elements in series across the first openings, [2f] wherein the first plurality of circular metal elements and the first plurality of dielectric rings are alternately stacked in a radial direction to define a first radial, alternating metal-dielectric multilayer structure embedded within the dielectric layer; [3a] a second circular resistor embedded in the layer of dielectric material, wherein the second circular resistor comprises: [3b] a second plurality of circular metal elements that are concentrically arranged, [3c] wherein each of the second plurality of circular metal elements being physically separated from adjacent circular metal elements by one of a second plurality of dielectric rings, and [3d] each of the second plurality of circular metal elements including a second opening; and [3e] a second plurality of metal connectors that electrically connect the second plurality of circular metal elements in series across the second openings, [3f] wherein the second plurality of circular metal elements and the second plurality of dielectric rings are alternately stacked in a radial direction to define a second radial, alternating metal-dielectric multilayer structure embedded within the dielectric layer; and [4] an electrode connecting the first circular resistor and the second circular resistor. The prior art of Chan in view of Cheng, as explained above, teaches each of features [1] through [2f] of claim 8. Neither of Chan and Cheng teaches a second circular resistor embedded in the dielectric layer. Park, like each of Chan and Cheng, teaches a semiconductor device including a spiral resistor 200, 400 (Figs. 4 and 6, respectively) formed in interconnect (Park: ¶¶ 49, 60). Park further teaches that the resistors 200, 400 include at least a first and second resistors that can be formed (1) in the same layer, i.e. resistors 204 and 206 in Fig. 4, with a “a contact for electrically connecting the two resistors is formed at the center 202 where the two resistors 204 and 206 meet each other” (Park: ¶ 47) or (2) stacked one above the other, i.e. 402 and 404 in Fig. 6 connected by a contact 406 (Park: ¶¶ 56-62). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include a second resistor having the same configuration as the first resistor of Chan/Cheng above and connected by an electrode contact to said first resistor and embedded within the dielectric layer of Chan or Chan/Cheng, in order to either increase the overall resistance of the resistor or to form a resistor of the same resistance in one half the chip area, as taught by Park (Park: ¶¶ 61-62). As such, Park may be seen as an improvement to Chan in this aspect. (See MPEP 2143.) Because features [3a]-[3f] for the second circular resistor are the same as features [2a]-[2f] of the first circular resistor, each of features [3a]-[3f] are taught by Chan in view of Cheng as explained under claim 1. The electrode connecting the first and second resistors is taught in Park, as explained above, as required by feature [4] of claim 8. This is all of the limitations of claim 8. With regard to claim 10, Chan modified according to Cheng and Park further teaches, 10. (Currently Amended) The device of claim 9, wherein the first circular resistor and the second circular resistor are on different levels in the substrate and are stacked with the first circular resistor on top of the second circular resistor. Claims 11-14 and 16 read, 11. (Currently Amended) The device of claim 8, wherein each of the first plurality of circular metal elements includes the first opening at one location where each of the first plurality of circular metal elements is connected to the adjacent circular metal element of the first plurality of circular metal elements through one of the first plurality of metal connectors. 12. (Currently Amended) The device of claim 11, wherein a distance between each of the first plurality of circular metal elements and each of the adjacent circular metal elements is the same. 13. (Currently Amended) The device of claim 8, wherein a thickness of each of the first plurality of circular metal elements is the same. 14. (Currently Amended) The device of claim 8, wherein each of the first plurality of circular metal elements includes a same metal material. 16. (Currently Amended) The device of claim 8, further comprising: at least one electrode each attached to one of the first plurality of metal connectors. Each of the limitations of claims 11-14 and 16 have been addressed under claims 2-5 and 7, respectively. Those explanations are incorporated here. Claim 15 reads, 15. (Currently Amended) The device of claim 8, wherein each of the first plurality of metal connectors has a thickness that is greater than a thickness of each of the first plurality of circular metal elements. See the discussion under claim 6, which applies equally here. IV. Response to Arguments Applicant’s arguments filed 07/01/2026 have been fully considered but they are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant’s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIK KIELIN whose telephone number is (571)272-1693. The examiner can normally be reached Mon-Fri: 10:00 AM-7:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Signed, /ERIK KIELIN/ Primary Examiner, Art Unit 2814
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Prosecution Timeline

Sep 12, 2023
Application Filed
Apr 06, 2026
Non-Final Rejection mailed — §103
May 06, 2026
Interview Requested
May 20, 2026
Examiner Interview Summary
May 20, 2026
Applicant Interview (Telephonic)
Jul 01, 2026
Response Filed
Jul 21, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
72%
With Interview (+4.5%)
2y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 635 resolved cases by this examiner. Grant probability derived from career allowance rate.

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