DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 03/05/2026 have been fully considered but they are not persuasive.
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Jeon discloses a third pad electrode above the second pad electrode, and comprising a same material as the connection electrode (par [0153] – the third conductive layer CL3 may include the same or similar material as the connection electrode CM), having a concave shape in a direction away from the substrate (as labeled by examiner above); and
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JEON et al. 20210335986.
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Regarding claim 1, fig. 5B of Jeon discloses a display device comprising:
a substrate 100 comprising a display area DA, and a pad area PA adjacent to the display area;
a transistor TFT comprising:
an active pattern Act in the display area above the substrate;
a gate electrode GE above the active pattern; and
a source electrode SE and a drain electrode DE coupled to the active pattern;
a connection electrode CM above the transistor, and coupled to the transistor;
a touch layer 400 above the connection electrode, and comprising an upper touch electrode 420;
pads P (fig. 6 and par [0091]) above the substrate in the pad area, and comprising:
a first pad electrode comprising a same material as the gate electrode (par [0151] – the first conductive layer CL1 may include the same or similar material as the gate electrode GE of the thin film transistor TFT);
a second pad electrode above the first pad electrode, and comprising a same material as the source electrode and the drain electrode (par [0152] – the second conductive layer CL2 may include the same or similar material as the source electrode SE or the drain electrode DE of the thin film transistor TFT);
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a third pad electrode above the second pad electrode, and comprising a same material as the connection electrode (par [0153] – the third conductive layer CL3 may include the same or similar material as the connection electrode CM), having a concave shape in a direction away from the substrate (as labeled by examiner above); and
a fourth pad electrode above the third pad electrode, and comprising a same material as the upper touch electrode (par [0160] – he fourth conductive layer CL4 may include the same or similar material as the second touch electrode layer 420 of the touch sensing layer 400); and
an additional insulating layer IIL2/IL above the substrate in the pad area, covering an edge (top edge) of the third pad electrode, and having an upper surface directly contacting the fourth pad electrode.
Regarding claim 2, fig. 5B of Jeon discloses wherein an entirety of a lower surface of the fourth pad electrode directly contacts the additional insulating layer or the third pad electrode.
Regarding claim 3, fig. 5B of Jeon discloses further comprising: a first insulating layer 203 above the active pattern, and covering (the bottom of) the gate electrode and an edge of the first pad electrode (see fig. 5B showing 203 covering bottom side of right edge of Cl1); and
a second insulating layer 205/207/IIL1/IL above the first insulating layer, and covering an edge of the first insulating layer (see 205 above 203 covering 203 edges in in TFT region), wherein the first and second insulating layers expose a central portion of the first pad electrode in the pad area.
Regarding claim 4, fig. 5B of Jeon disclose wherein the second pad electrode directly contacts the central portion of the first pad electrode.
Regarding claim 5, fig. 7A of Jeon discloses wherein openings OP1/CNT2 (2 openings) are respectively defined in the additional insulating layer between adjacent ones of the pads, and expose an upper surface of the second insulating layer (OP1 expose top surface of IL1).
Regarding claim 6, fig. 6 of Jeon discloses wherein the pads are repeatedly arranged along a first direction X and a second direction Y, which crosses the first direction, and wherein first openings OP1s among the openings are respectively positioned between ones of the pads arranged along the first direction X, and extend in the second direction Y.
Regarding claim 7, fig. 6 of Jeon discloses wherein second openings CNT2s of the openings are respectively positioned between ones of the pads respectively arranged in a first row and in a second row, which is adjacent to the first row, and extend in the first direction (CNT2 also extends in X direction).
Regarding claim 8, Zhang discloses wherein the additional insulating layer comprises an organic material (par [0155] - the insulating layer IL may include the same or similar material as the second organic insulating layer 211).
Regarding claim 9, fig. 5B of Jeon discloses further comprising: a first organic insulating layer 209 covering the source electrode and the drain electrode; and a second organic insulating layer 211 above the first organic insulating layer, and covering the connection electrode, wherein the additional insulating layer comprises a same material (organic material of IL) as the second organic insulating layer (which is organic).
Regarding claim 10, fig. 5B of Jeon discloses wherein the touch layer further comprises a touch insulating layer 401 between the connection electrode and the upper touch electrode.
Regarding claims 11, fig. 5B-6 of Jeon discloses wherein the pad area comprises a first area R1 and a second area R2 in which the pads are located, and wherein the touch insulating layer is omitted from the first area or the second area.
Regarding claim 12, figs. 5B-6 of Jeon discloses wherein the first area or the second area comprises sub-areas (CNT2 areas) spaced apart from each other along a first direction X, and extending in a second direction Y crossing the first direction, and wherein the touch insulating layer is omitted from the sub-areas (see fig. 5B).
Regarding claim 13, fig. 5B of Jeon discloses wherein the touch insulating layer 401 covers a side surface of the additional insulating layer (IIL1), and is omitted from between the third pad electrode and the fourth pad electrode.
Regarding claim 14, fig. 5B of Jeon discloses wherein the touch insulating layer 401 is separated from the third pad electrode Cl3.
Regarding claim 15, fig. 5A of Jeon discloses wherein the third pad electrode comprises a first conductive layer CL3a, a second conductive layer CL3b, and a third conductive layer CL3c sequentially stacked, the first and third conductive layers protruding more than the second conductive layer in a direction toward the additional insulating layer (see fig. 5B showing top surface of Cl3 is on top and CL3c is on top therefore protruding upward more and CL3 showing bottom side is pointed and since CL3a is at bottom therefore bottom pointed edge is protruding more as claimed).
Regarding claim 16, fig. 5B of Jeon discloses wherein the third pad electrode directly contacts the second pad electrode, and wherein the fourth pad electrode directly contacts the third pad electrode.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jeon.
Regarding claim 17 (see rejection of claim 1), fig. 5B of Jeon discloses a method for manufacturing a display device, the method comprising:
forming an active pattern in a display area above a substrate comprising the display area and a pad area, which is adjacent to the display area;
forming a gate electrode in the display area above the active pattern, and a first pad electrode in the pad area above the substrate;
forming a source electrode and a drain electrode coupled to the active pattern, and a second pad electrode above the first pad electrode;
forming a connection electrode coupled to the drain electrode, and a third pad electrode above the second pad electrode; forming
an additional insulating layer covering an edge of the third pad electrode;
forming a touch insulating layer above the connection electrode, the additional insulating layer, and the third pad electrode;
forming an upper touch electrode above the touch insulating layer, and a fourth pad electrode above the third pad electrode.
Jeon does not explicitly disclose exposing a portion of an upper surface of the third pad electrode by removing a portion of the touch insulating layer in an area in which the first pad electrode, the second pad electrode, and the third pad electrode are positioned in the pad area.
However, [0091] The pad portion PD may be arranged or disposed on one or a side of the substrate 100. The pad portion PD may include pads P. The pads P may be exposed and electrically connected to the printed circuit board PCB by not being covered or overlapped by an insulating layer.
As such it would have been obvious to form a method of Jeon further comprising exposing a portion of an upper surface of the third pad electrode by removing a portion of the touch insulating layer in an area in which the first pad electrode, the second pad electrode, and the third pad electrode are positioned in the pad area in order that the pads P may be exposed and electrically connected to the printed circuit board PCB.
Jeon does not disclose of concurrently forming a gate electrode in the display area above the active pattern, and a first pad electrode in the pad area above the substrate;
concurrently forming a source electrode and a drain electrode coupled to the active pattern, and a second pad electrode above the first pad electrode;
concurrently forming a connection electrode coupled to the drain electrode, and a third pad electrode above the second pad electrode; and
concurrently forming an upper touch electrode above the touch insulating layer, and a fourth pad electrode above the third pad electrode.
However, Jeon discloses that the first pad electrode comprising a same material as the gate electrode (par [0151] – the first conductive layer CL1 may include the same or similar material as the gate electrode GE of the thin film transistor TFT);
the second pad electrode above the first pad electrode, and comprising a same material as the source electrode and the drain electrode (par [0152] – the second conductive layer CL2 may include the same or similar material as the source electrode SE or the drain electrode DE of the thin film transistor TFT);
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the third pad electrode above the second pad electrode, and comprising a same material as the connection electrode (par [0153] – the third conductive layer CL3 may include the same or similar material as the connection electrode CM), having a concave shape in a direction away from the substrate (as labeled by examiner above); and
the fourth pad electrode above the third pad electrode, and comprising a same material as the upper touch electrode (par [0160] – he fourth conductive layer CL4 may include the same or similar material as the second touch electrode layer 420 of the touch sensing layer 400).
As such it would have been obvious to form a method of Jeon comprising concurrently forming a gate electrode in the display area above the active pattern, and a first pad electrode in the pad area above the substrate; concurrently forming a source electrode and a drain electrode coupled to the active pattern, and a second pad electrode above the first pad electrode; concurrently forming a connection electrode coupled to the drain electrode, and a third pad electrode having a concave shape in a direction away from the substrate above the second pad electrode; and concurrently forming an upper touch electrode above the touch insulating layer, and a fourth pad electrode above the third pad electrode in order to use the same material from the same processing steps.
Regarding claim 18, fig. 5B of Jeon discloses wherein the additional insulating layer covers the edge of the third pad electrode, and has an upper surface directly contacting the fourth pad electrode.
Regarding claim 19, fig. 5B of Jeon discloses wherein an entirety of a lower surface of the fourth pad electrode directly contacts the additional insulating layer or the third pad electrode.
Regarding claim 20 (see rejection of claim 13 above), fig. 5B of Jeon discloses wherein the touch insulating layer covers a side surface of the additional insulating layer, is omitted from between the third pad electrode and the fourth pad electrode, and is separated from the third pad electrode.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/VONGSAVANH SENGDARA/ Primary Examiner, Art Unit 2893