DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see Remarks, filed 09 June 2026, with respect to the rejection(s) of the claim(s) in the previous Office action have been fully considered and are persuasive. The newly amended limitations of the independent claims overcome the prior art of record (Hokazono) as a 35 USC §102 rejection. Therefore, the previous §102 rejection(s) have been withdrawn. However, upon further search and consideration, the limitations do not overcome Hokazono in view of newly discovered reference Ning Tang et al. (US 20240038611).
Claim 1 has been amended to recite: “a control terminal provided on the semiconductor chip, wherein the control terminal controls drive of the semiconductor chip, and the control terminal is non-contact with the conductive sheet and the metal sheet, and … the step portion or the groove is located diagonally above the control terminal.” According to the instant specification (¶0017), the control terminal is connected to the gate of the chip.
Hokazono is silent regarding explicitly showing the configuration of the three terminals of the power semiconductor chip (Hokazono ¶0041), but does show the configuration of at least two of the terminals in figures 2 and 5, wherein the power semiconductor chip (1) has a top electrode layer (Fig. 2; 1B/1C) and bottom electrode layer (Fig. 5; 1D/1E).
However, Tang teaches these newly amended limitations in view of Fig. 1 and Fig. 4, wherein a control terminal (325U; ¶0031) connected to the gate of the semiconductor chip (155; ¶0032) is provided laterally to the side of the semiconductor chip, wherein a metal plate (430; ¶0036) comprising a step portion is located diagonally above the control terminal (as shown in view of Figures 1, 2, and 4), and wherein the metal plate (430) is the top emitter connection (¶0032), and a second conductor plate (431) is the bottom collector connection (¶0032). This is equivalent/compatible to/with the configuration of Hokazono mentioned above.
Absent evidence of criticality, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the configuration of the gate terminal of Tang in the device of Hokazono in order to provide appropriate connections for Hokazono’s three-terminal power semiconductor device while ensuring proper heat dissipation to improve device reliability (Tang; ¶0006-0008).
The rejections have been updated below according to the new amendments. Claims 1-5, 7-14, and 16 are pending in the application. Claims 6 and 15 have been cancelled. Claims 3-4, 8-10, and 12-13 are withdrawn from consideration in view of the election without traverse in the reply filed 02/17/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-2, 5, 7, 11, 14, and 16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding Claim 1, it recites “the control terminal is non-contact with the conductive sheet and the metal sheet” in line 7. Support cannot be found in the figures or the specification for “the metal sheet” in addition to the previously recited “metal plate” of line 4. For at least this reason, claims 2, 5, and 7 are also rejected based on their dependency from claim 1.
Regarding Claim 11, it recites “the control terminal is non-contact with the conductive sheet and the metal sheet” in line 10. Support cannot be found in the figures or the specification for “the metal sheet” in addition to the previously recited “metal plate”. For at least this reason, claims 14 and 16 are also rejected based on their dependency from claim 11.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 5, 7, 11, 14, and 16 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 1, it recites “the control terminal is non-contact with the conductive sheet and the metal sheet” in line 7. It is unclear if “the metal sheet” in is meant to refer to the previously recited “metal plate” of line 4. This leaves the renders the claim unclear. For at least this reason, claims 2, 5, and 7 are also rejected based on their dependency from claim 1. For the purpose of applying prior art, “the metal sheet” will be interpreted as “the metal plate”.
Regarding Claim 11, it recites “the control terminal is non-contact with the conductive sheet and the metal sheet” in line 10. It is unclear if “the metal sheet” in is meant to refer to the previously recited “metal plate”. This leaves the renders the claim unclear. For at least this reason, claims 14 and 16 are also rejected based on their dependency from claim 11. For the purpose of applying prior art, “the metal sheet” will be interpreted as “the metal plate”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Hiroaki Hokazono et al. (US 20210280534 A1; hereinafter Hokazono) in view of Ning Tang et al. (US 20240038611; hereinafter Tang).
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Regarding Claim 1, Hokazono discloses a semiconductor device (Fig. 1 and Fig. 2) comprising:
a semiconductor chip (1; ¶0040);
a conductive sheet (2; which comprises 3,4a,4b and is a conductive sintered silver sheet; ¶0042 ¶0046) provided on the semiconductor chip (1); and
a metal plate (7; which is a metal plate; ¶0041) provided on the conductive sheet (2), wherein
the metal plate (7) has a step portion that is provided on a lateral surface, or a groove portion that is provided on a bottom surface (7 has a step and/or groove as pointed to in annotated Hokazono Fig. 1).
Hokazono is silent regarding explicitly showing the configuration of the three terminals of the power semiconductor chip (Hokazono ¶0041); including the limitations of:
a control terminal provided on the semiconductor chip,
wherein the control terminal controls drive of the semiconductor chip (this is interpreted in light of the instant specification at ¶0017, wherein the control terminal is connected to the gate of the chip), and the control terminal is non-contact with the conductive sheet and the metal sheet (plate), and
the step portion or the groove is located diagonally above the control terminal.
Hokazono is silent regarding explicitly showing the configuration of the three terminals of the power semiconductor chip (Hokazono ¶0041), but does show the configuration of at least two of the three terminals in figures 2 and 5, wherein the power semiconductor chip (1) has a top electrode layer (Fig. 2; 1B/1C) and bottom electrode layer (Fig. 5; 1D/1E).
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In the same field of endeavor, Tang teaches (in view of Fig. 1, Fig. 2, and Fig. 4; ¶0042) a control terminal (325U; ¶0031) connected to the gate of the semiconductor chip (155; ¶0032) that is provided laterally to the side of the semiconductor chip, wherein a step portion of a metal plate (430; ¶0036) is located diagonally above the control terminal (as shown in view of Figures 1, 2, and 4), and wherein the metal plate (430) is the top emitter connection (¶0032), and a second conductor plater (431) is the bottom collector connection (¶0032). This is equivalent/compatible to/with the configuration of Hokazono mentioned above.
Absent evidence of criticality, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the configuration of the gate terminal of Tang in the device of Hokazono in order to provide appropriate connections for Hokazono’s three-terminal power semiconductor device while ensuring proper heat dissipation to improve device reliability (Tang; ¶0006-0008).
Regarding Claim 2, modified Hokazono discloses the semiconductor device according to claim 1, wherein
the metal plate (7) has the step portion, and
a lower end corner portion of the step portion has an angular shape (as shown in annotated Fig. 1 wherein the lower end corner portion has an angular shape).
Regarding Claim 11, Hokazono teaches a manufacturing method of a semiconductor device (Fig. 1 and Fig. 2), comprising:
forming a step portion on a lateral surface of a metal plate, or forming a groove portion on a bottom surface of the metal plate (as shown in annotated Fig. 1; a step and/or groove portion is formed in a metal plate 7; ¶0041);
by pressing the metal plate (7) onto a conductive sheet (2; which comprises 3,4a,4b and is a conductive sintered silver sheet; ¶0042 ¶0046), bonding the conductive sheet (2) onto the bottom surface of the metal plate (bottom of 7) (as described in ¶0061); and
mounting the metal plate (7) on a semiconductor chip (1; ¶0040) via the conductive sheet (2) (as shown in Fig. 1 in view of Fig. 22).
Hokazono is silent regarding explicitly showing the configuration of the three terminals of the power semiconductor chip (Hokazono ¶0041); including the limitations of:
forming a control terminal provided on the semiconductor chip,
wherein the control terminal controls drive of the semiconductor chip (this is interpreted in light of the instant specification at ¶0017, wherein the control terminal is connected to the gate of the chip), and the control terminal is non-contact with the conductive sheet and the metal sheet (plate), and
the step portion or the groove is located diagonally above the control terminal.
Hokazono is silent regarding explicitly showing the configuration of the three terminals of the power semiconductor chip (Hokazono ¶0041), but does show the configuration of at least two of the three terminals in figures 2 and 5, wherein the power semiconductor chip (1) has a top electrode layer (Fig. 2; 1B/1C) and bottom electrode layer (Fig. 5; 1D/1E).
In the same field of endeavor, Tang teaches (in view of Fig. 1, Fig. 2, and Fig. 4; ¶0042) a control terminal (325U; ¶0031) connected to the gate of the semiconductor chip (155; ¶0032) that is provided laterally to the side of the semiconductor chip, wherein a step portion of a metal plate (430; ¶0036) is located diagonally above the control terminal (as shown in view of Figures 1, 2, and 4), and wherein the metal plate (430) is the top emitter connection (¶0032), and a second conductor plater (431) is the bottom collector connection (¶0032). This is equivalent/compatible to/with the configuration of Hokazono mentioned above.
Absent evidence of criticality, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the configuration of the gate terminal of Tang in the device of Hokazono in order to provide appropriate connections for Hokazono’s three-terminal power semiconductor device while ensuring proper heat dissipation to improve device reliability (Tang; ¶0006-0008).
Claims 5, 7, 14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Hiroaki Hokazono et al. (US 20210280534 A1; hereinafter Hokazono) in view of Ning Tang et al. (US 20240038611; hereinafter Tang) and Yoshimitsu Kuwahara et al. (US 20160111554 A1; hereinafter Kuwahara).
Regarding Claim 5, modified Hokazono discloses the semiconductor device according to claim 1, wherein
the conductive sheet (2) is a sintered sheet of silver (¶0042 ¶0046) or copper.
Hokazono is silent regarding wherein the metal plate (7) is a molybdenum plate, but states in ¶0041 that the metal plate may include various metals and in ¶0045 that the semiconductor chip comprises silicon.
In the same field of endeavor, Kuwahara teaches a similar semiconductor device (Fig. 1A) wherein molybdenum (¶0025) is used as a metal plate for a semiconductor element comprising silicon (¶0025).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the molybdenum as the metal of the metal plate of Kuwahara as the metal of the metal plate in Hokazono in order to provide a thermal expansion coefficient for the metal plate close to a thermal expansion coefficient of the silicon-comprising semiconductor chip (Kuwahara; ¶0025).
Regarding Claim 7, modified Hokazono discloses the semiconductor device according to claim 1, wherein the semiconductor chip having a gate electrode electrically connected to the control terminal (as modified by Tang).
However, Hokazono is silent regarding wherein the semiconductor chip is an IEGT (Injection Enhanced Gate Transistor) chip.
In the same field of endeavor, Kuwahara teaches a similar semiconductor device (Fig. 1A) including an IEGT chip (10; ¶0015). Kuwahara discloses in ¶0015 that an IEGT chip is an IGBT (as in Hokazono).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the IEGT of Kuwahara replace the IGBT of Hokazono in order to enhance the electron injection (as disclosed in ¶0015 of Kuwahara).
Regarding Claim 14, modified Hokazono discloses the manufacturing method of a semiconductor device according to claim 11, wherein the conductive sheet (2) is a sintered sheet of silver (¶0042 ¶0046) or copper.
Hokazono is silent regarding wherein the metal plate (7) is a molybdenum plate, but states in ¶0041 that the metal plate may include various metals and in ¶0045 that the semiconductor chip comprises silicon.
In the same field of endeavor, Kuwahara teaches a similar semiconductor device (Fig. 1A) wherein molybdenum (¶0025) is used as a metal plate for a semiconductor element comprising silicon (¶0025).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the molybdenum as the metal of the metal plate of Kuwahara as the metal of the metal plate in Hokazono in order to provide a thermal expansion coefficient for the metal plate close to a thermal expansion coefficient of the silicon-comprising semiconductor chip (Kuwahara; ¶0025).
Regarding Claim 16, modified Hokazono discloses the manufacturing method of a semiconductor device according to claim 11, wherein the semiconductor chip having a gate electrode electrically connected to the control terminal (as modified by Tang).
However, Hokazono is silent regarding wherein the semiconductor chip is an IEGT (Injection Enhanced Gate Transistor) chip.
In the same field of endeavor, Kuwahara teaches a similar semiconductor device (Fig. 1A) including an IEGT chip (10; ¶0015). Kuwahara discloses in ¶0015 that an IEGT chip is an IGBT (as in Hokazono).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the IEGT of Kuwahara replace the IGBT of Hokazono in order to enhance the electron injection (as disclosed in ¶0015 of Kuwahara).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN PRIDEMORE whose telephone number is (703)756-4640. The examiner can normally be reached Monday - Friday 8:00am - 4:00pm EST.
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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