Prosecution Insights
Last updated: July 17, 2026
Application No. 18/468,092

CLEANING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM

Non-Final OA §102§103
Filed
Sep 15, 2023
Priority
Mar 17, 2021 — continuation of PCTJP2021010933 +1 more
Examiner
BERGNER, ERIN FLANAGAN
Art Unit
1713
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Kokusai Electric Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
499 granted / 652 resolved
+11.5% vs TC avg
Strong +30% interview lift
Without
With
+30.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
36 currently pending
Career history
687
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
83.6%
+43.6% vs TC avg
§102
5.6%
-34.4% vs TC avg
§112
2.9%
-37.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 652 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 19-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected apparatus, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 4-3-26. Applicant’s election without traverse of claims 1-18 in the reply filed on 4-3-26 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4 and 12-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu et al. JP 10-176272 (JP’272) (machine translation provided in the IDS filed 3-14-25 used for citation). Regarding claim 1, JP’272 teaches a method of cleaning a process chamber in which a film-forming process is performed on a substrate (a method for determining the end point of dry cleaning of a quartz reactor in a low-pressure CVD (chemical vapor deposition) apparatus, para. 1-2), comprising: dividing an inside of the process chamber, into which a cleaning gas is to be supplied, into three or more zones in a gas flow direction and heating the inside of the process chamber (the reactor is heated by a plurality of heater zones which are set along the axial direction of the reactor and whose heating characteristics can be independently controlled, para. 42, see fig. 5) such that, in the process chamber, a temperature difference between a zone positioned on an upstream side in the gas flow direction and a zone adjacent to the zone positioned on the upstream side is greater than a temperature difference between a zone positioned on a downstream side in the gas flow direction and a zone adjacent to the zone positioned on the downstream side (The figure shows a case of dividing into four divided zones 14 (1), 14 (2), 14 (3), and 14 (4). Hereinafter, these are called L zone, CL zone, CU zone, and U zone from a lower part, respectively. At the time of cleaning, after the processed substrate W is taken out from the reactor the temperature is set for each divided zone 14 by the temperature controller 27, U zone:615°C, CU zone:613°C, CL zone: 607 °C, L zone: 597°C, gas inlet 8 for introducing a CIF3 gas into the reactor 1. L zone corresponding to the lower portion of the reactor 1 the upstream side of the gas flow and U zone corresponds to the upper portion, para. 60-63 and 8-82, fig. 5); and supplying the cleaning gas into the process chamber after the act of heating (CIF3 gas is introduced for cleaning from inlet 8, para. 60 and 80-82, see fig. 5). Regarding claims 2-4, JP’272 teaches the method of claim 1 of cleaning a process chamber. JP’272 further teaches wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, a temperature of the zone positioned on the upstream side in the gas flow direction is lower than a temperature of the zone positioned on the downstream side in the gas flow direction, with regard to claim 2, wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, a temperature of the zone positioned on the upstream side in the gas flow direction is lower than a temperature of a zone positioned on a midstream side in the gas flow direction, with regard to claim 3 and wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, the temperature of the zone positioned on the upstream side in the gas flow direction is lower than a temperature of a zone positioned on a midstream side in the gas flow direction, with regard to claim 4 (the temperature is set for each divided zone 14 by the temperature controller 27, U zone:615°C, CU zone:613°C, CL zone: 607 °C, L zone: 597°C, gas inlet 8 for introducing a CIF3 gas into the reactor 1. L zone corresponding to the lower portion of the reactor 1 the upstream side of the gas flow and U zone corresponds to the upper portion, para. 60-63 and 8-82, fig. 5. Therefore, the temperature upstream is lower than the temperature downstream from each zone). Regarding claims 12 and 13, JP’272 teaches the method of claim 1 of cleaning a process chamber. JP’272 further teaches wherein the cleaning gas is supplied from the upstream side toward the downstream side of the process chamber, with regard to claim 12 and wherein a gas supply nozzle configured to be capable of supplying the cleaning gas is connected to the upstream side of the process chamber, and wherein the cleaning gas is supplied to the upstream side of the process chamber via the gas supply nozzle, with regard to claim 13 (see fig. 5 gas inlet 8 is in the upstream side of the process chamber). Regarding claim 14, JP’272 teaches the method of claim 13 of cleaning a process chamber. JP’272 further teaches wherein a second gas supply nozzle configured to be capable of supplying the cleaning gas to the downstream side of the process chamber compared to a first gas supply nozzle as the gas supply nozzle is connected to the process chamber, and wherein the cleaning gas is supplied via the first gas supply nozzle to the upstream side of the process chamber and is supplied via the second gas supply nozzle to the downstream side of the process chamber compared to the first gas supply nozzle (CIF3 gas is introduced into the inner tube 11 through the gas introduction hole, the gas introduction holes of the nozzles 51 (1), 51 (2), 51 (3), and 51 (4) are positioned so as to introduce the CIF3 gas from the upstream side of the L-zone 14 (1), the CL-zone 14 (2), the CU-zone 14 (3), and the U-zone 14 (4), respectively, para. 128-128, see fig. 11) Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over JP’272 as applied to claim 1-3 above, and further in view of Oikawa et al. US 2021/0104421 (US’421). Regarding claim 5-8, JP’272 teaches the method of cleaning a process chamber of claims 1-3. JP’272 does not teach wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, an etching rate of a deposit adhered to an inner surface of the process chamber is lower on the upstream side in the gas flow direction than on the downstream side in the gas flow direction, with regard to claims 5-7 and wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, an etching rate of a deposit adhered to an inner surface of the process chamber is substantially the same on the downstream side in the gas flow direction and on a midstream side in the gas flow direction, with regard to claim 8. US’421 teaches a processing apparatus used for a semiconductor process, when a film is formed on a substrate the film is also deposited inside the apparatus. Thus, in the processing apparatus, a cleaning process is performed for removing the film deposited inside the apparatus by supplying a cleaning gas into a processing container heated to a predetermined temperature (para. 3, see fig. 1). when a cleaning process is performed for removing a film deposited inside a processing container the etching rate changes due to the difference in temperature of the processing container, which may cause an over-etching or a film residue. in an embodiment, an etching time is calculated based on an actually measured temperature inside a processing container, relationship information indicating a relationship between a temperature and an etching rate, and a cumulative film thickness of a deposited film, and the cleaning process is performed based on the calculated etching time. As a result, it is possible to suppress the over-etching or film residue caused from the cleaning process performed in a temperature range (para. 18-19).Therefore, one of ordinary skill in the art would understand that the etch rate in the process of JP’272 would be dependent on temperature, that each zone of the process of JP’272 would have a different etch rate including an upstream etch rate (L zone: 597°C) and downstream etch rate (U zone:615°C) and the necessity to control that etch rate to prevent over etch of the reactor. Further, the downstream zone U zone:615°C is maintained at a temperature of only 2 degrees from the a midstream zone CU zone:613°C. therefore, based on the teachings of US’421 one of ordinary skill in the art would understand that the etch rates would substantially the same even if they are not identical. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of JP’272 to include wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, an etching rate of a deposit adhered to an inner surface of the process chamber is lower on the upstream side in the gas flow direction than on the downstream side in the gas flow direction, with regard to claims 5-7 and wherein in the act of heating, the inside of the process chamber is heated such that, in the process chamber, an etching rate of a deposit adhered to an inner surface of the process chamber is substantially the same on the downstream side in the gas flow direction and on a midstream side in the gas flow direction, with regard to claim 8 because US’421 teaches the etch rate in the process of JP’272 would be dependent on temperature, that each zone of the process of JP’272 would have a different etch rate including an upstream etch rate (L zone: 597°C) and downstream etch rate (U zone:615°C) and the necessity to control that etch rate to prevent over etch of the reactor and it is not inventive to discover the optimum or workable ranges by routine experimentation, see MPEP 2144.05. Claim(s) 9-11 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over JP’272 as applied to claim 1 above, and further in view of Cook et al. US 2003/0049372 (US’372). Regarding claim 9-11, JP’272 teaches the method of cleaning a process chamber of claim 1. JP’272 does not teach wherein a deposit adhered to an inner surface of the process chamber include a nitride film, and the cleaning gas contains a halogen element, with regard to claim 9, wherein a deposit adhered to an inner surface of the process chamber include a film containing Si and N, and the cleaning gas contains a fluorine element, with regard to claim 10 and wherein the cleaning gas contains at least one or more selected from the group of F2, HF, NF3, and CF4, with regard to claim 11. US’372 teaches chemical vapor deposition reactor including a wafer boat with a vertical stack of horizontally oriented susceptors (abstract). US’372 further teaches CVD reactors, such as the reactor of JP’272, which deposits Si-based CVD films, can be used to deposit silicon nitride films (para. 17 and 69) and can be cleaned with cleaning gases such as CIF3, NF3 or CF4 (para. 78-83). Therefore, the method of JP’272 can be easily modified to include the features of claims 9-11 by simple substitution. It would have been obvious to one of ordinary skill in the art before the effective fling date of the claimed invention to modify the method of JP’272 to include wherein a deposit adhered to an inner surface of the process chamber include a nitride film, and the cleaning gas contains a halogen element, with regard to claim 9, wherein a deposit adhered to an inner surface of the process chamber include a film containing Si and N, and the cleaning gas contains a fluorine element, with regard to claim 10 and wherein the cleaning gas contains at least one or more selected from the group of NF3, and CF4, with regard to claim 11 because US’372 teaches these are known alternatives for the Si-based CVD deposited film and the cleaning gas and simple substitution of one known element for another to obtain predictable results is obvious, see MPEP 2141 III (B). Regarding claims 16-17, JP’272 teaches the method of cleaning a process chamber of claim 1. JP’272 does not teach after the act of supplying, performing a pre-coating process of supplying a first gas containing a first element and a second gas containing a second element to form, on an inner surface of the process chamber, a film with a ratio of the first element to the second element being equal to or more than a ratio of the first element to the second element of a film formed on the substrate by the film-forming process, with regard to claim 16 and wherein an internal pressure of the process chamber when performing the pre-coating process is set to be lower than an internal pressure of the process chamber when performing the film-forming process, with regard to claim 17. US’372 teaches the in-situ clean is usually followed by pre-coating the chamber with 0.5-2 µm of poly-Si that passivates all cleaned surfaces, restores the deposition rate to a stable value, and getters any residual gaseous or metallic contamination that may be present. Poly silicon can also be deposited on a substrate in the ractor and be deposited with a gas including reactant gas is silane or a similar precursor such as disilane, dichlorosilane, silicon tetrachloride and the like, with or without other gases. Typically diluent gases such as N2, Ar or H2 (para. 70 and 82-84). Therefore the same deposition process can be performed for the substrate and the rector walls and can include two gases including a silicon source and a diluent gas where the ratio of 100% silicon in the poly silicon on the substrate and the reactor coating. Generally in prior art systems, the poly-Si film morphology changes from a fine grained columnar microstructure at low deposition pressures to a random or equiaxed microstructure at higher pressures. In single wafer prior art reactors, higher pressures are used in combination with higher temperatures to enhance the deposition rate which compromises the columnar microstructure that is desirable for most poly-Si application (para. 72). Therefore one of ordinary skill in the art would know to control the pressure of the cleaning process and the film forming process based of the different needs of the film, protecting the reactor vs. providing a microelectronic device film to achieve the desired grain size as well as control the deposition rates and higher pressures produce the columnar microstructure that is desirable for most substrate poly-Si application. It would have been obvious to one of ordinary skill in the art before the effective fling date of the claimed invention to modify the method of JP’272 to include after the act of supplying, performing a pre-coating process of supplying a first gas containing a first element and a second gas containing a second element to form, on an inner surface of the process chamber, a film with a ratio of the first element to the second element being equal to or more than a ratio of the first element to the second element of a film formed on the substrate by the film-forming process, with regard to claim 16 and wherein an internal pressure of the process chamber when performing the pre-coating process is set to be lower than an internal pressure of the process chamber when performing the film-forming process, with regard to claim 17 because US’372 teaches passivates all cleaned surfaces, restores the deposition rate to a stable value, and getters any residual gaseous or metallic contamination that may be present and to control the pressure to achieve the desired grain size as well as control the deposition rates and it is not inventive to discover the optimum or workable ranges by routine experimentation, see MPEP 2144.05. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over JP’272 as applied to claim 14 above, and further in view of Nakashima et al. US 2009/0305517 (US’517). Regarding claim 15, JP’272 teaches the method of cleaning a process chamber of claim 14. JP’272 does not teach wherein the second gas supply nozzle includes an extending portion which extends from the upstream side toward the downstream side of the process chamber, and a plurality of injection ports formed to be spaced apart in the extending portion in a direction where the extending portion extends, and wherein the cleaning gas is supplied to the process chamber via the plurality of injection ports from the extending portion of the second gas supply nozzle. US’517 teaches a method of manufacturing a semiconductor device and a substrate processing apparatus for processing semiconductor wafers, including a CVD processing furnace 202 similar to the reactor of JP’272 (abstract, para. 47, see fig. 1). FIG. 13 shows a first modification of the nozzle used in the substrate processing apparatus according to the first through fourth embodiments described above. In the first through fourth embodiments described above, the first film deposition gas nozzles 270a, 270b, and 270c (so-called multi-nozzle) formed of plural long nozzles are used in part of the supply portion to supply the first film deposition gas inside the process chamber 201 During the cleaning, NF3 as the first cleaning gas is supplied to the first film deposition gas nozzle 270a, F2 as the second cleaning gas is supplied to the gas nozzle 272, and N2 is supplied to the first film deposition gas nozzle 270d and the second film deposition gas nozzle 270e the additional gas nozzles/injection ports delivers the gas more homogeneously (para. 56-61 and 169-170, see fig. 13). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of JP’272 to include wherein the second gas supply nozzle includes an extending portion which extends from the upstream side toward the downstream side of the process chamber, and a plurality of injection ports formed to be spaced apart in the extending portion in a direction where the extending portion extends, and wherein the cleaning gas is supplied to the process chamber via the plurality of injection ports from the extending portion of the second gas supply nozzle because US’517 teaches it can deliver the gas more homogeneously and use of known technique to improve similar methods in the same way is obvious, see MPEP 2141 III (C). Claim(s) 18 is rejected under 35 35 U.S.C. 103 as being unpatentable over Liu et al. JP 10-176272 (JP’272) (machine translation provided in the IDS filed 3-14-25 used for citation) in view of Cook et al. US 2003/0049372 (US’372). Regarding claim 1, JP’272 teaches a method of cleaning a process chamber in which a film-forming process is performed on a substrate (a method for determining the end point of dry cleaning of a quartz reactor in a low-pressure CVD (chemical vapor deposition) apparatus, para. 1-2), comprising: dividing an inside of the process chamber, into which a cleaning gas is to be supplied, into three or more zones in a gas flow direction and heating the inside of the process chamber (the reactor is heated by a plurality of heater zones which are set along the axial direction of the reactor and whose heating characteristics can be independently controlled, para. 42, see fig. 5) such that, in the process chamber, a temperature difference between a zone positioned on an upstream side in the gas flow direction and a zone adjacent to the zone positioned on the upstream side is greater than a temperature difference between a zone positioned on a downstream side in the gas flow direction and a zone adjacent to the zone positioned on the downstream side (The figure shows a case of dividing into four divided zones 14 (1), 14 (2), 14 (3), and 14 (4). Hereinafter, these are called L zone, CL zone, CU zone, and U zone from a lower part, respectively. At the time of cleaning, after the processed substrate W is taken out from the reactor the temperature is set for each divided zone 14 by the temperature controller 27, U zone:615°C, CU zone:613°C, CL zone: 607 °C, L zone: 597°C, gas inlet 8 for introducing a CIF3 gas into the reactor 1. L zone corresponding to the lower portion of the reactor 1 the upstream side of the gas flow and U zone corresponds to the upper portion, para. 60-63 and 8-82, fig. 5); and supplying the cleaning gas into the process chamber after the act of heating (CIF3 gas is introduced for cleaning from inlet 8, para. 60 and 80-82, see fig. 5). A method of manufacturing a semiconductor device, comprising: loading a substrate into a process chamber (the boat 4 in which the plurality of substrates W are accommodated is carried into the reaction furnace 1, para. 67); performing a film-forming process of supplying a process gas into the process chamber to form a film on the substrate (The process gas introduced in to the reaction furnace 1 flows through the inner tube 11 in the axial direction of the reaction furnace 1. As a result, a chemical reaction occurs on the surface of the substrate W accommodated in the boat 4, and a predetermined film is formed on the surface, para. 67); unloading a processed substrate from the process chamber; and performing the method of Claim 1 to remove a deposit containing a film-forming material adhered to an inner surface of the process chamber (after the processed substrate W is taken out from the reactor 1 the cleaning of claim 1 is performed, as discussed above with regard to claim 1). JP’272 does not teach heating an inside of the process chamber during the film-forming process. US’372 teaches chemical vapor deposition reactor including a wafer boat with a vertical stack of horizontally oriented susceptors (abstract). CVD reactors, such as the reactor of JP’272, which deposits Si-based CVD films, can be used to deposit a variety of silicon based film by hearting the process chamber to perform the deposition process. Heating is necessary for the uniform deposition of high quality films (para. 17 and 69-75, see fig. 5). It would have been obvious to one of ordinary skill in the art before the effective fling date of the claimed invention to modify the method of JP’272 to include heating an inside of the process chamber during the film-forming process because US’372 teaches heating is necessary for the uniform deposition of high quality films and use of known technique to improve similar methods in the same way is obvious, see MPEP 2141 III (C). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIN FLANAGAN BERGNER whose telephone number is (571)270-1133. The examiner can normally be reached M-F 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Allen can be reached at 571-270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIN F BERGNER/Primary Examiner, Art Unit 1713
Read full office action

Prosecution Timeline

Sep 15, 2023
Application Filed
Apr 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12678836
METHOD AND DEVICE FOR REMOVING IMPURITIES IN GRANULES
3y 3m to grant Granted Jul 14, 2026
Patent 12685065
UNIFIED RINSE AND DRY CLEANING APPARATUS AND METHODS
2y 2m to grant Granted Jul 14, 2026
Patent 12672504
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD USING THE SAME
2y 5m to grant Granted Jun 30, 2026
Patent 12643130
APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME
2y 11m to grant Granted Jun 02, 2026
Patent 12644645
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
2y 1m to grant Granted Jun 02, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+30.4%)
2y 6m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 652 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month