Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on September 18, 2023, December 2, 2025, and May 22, 2026, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
The Amendment filed June 23, 2026, has been entered. Claims 2-7 & 11-16 remain pending in the application. Claims 2-4 are currently amended, claims 1 & 8-10 are canceled, and claims 11-16 are new. Applicant’s amendments to the Claims have overcome each and every objection previously set forth in the Non-Final Office Action mailed March 23, 2026, hereafter referred to as the Non-Final Office Action.
Response to Arguments
Applicant’s arguments, see Applicant remarks pp. 8-10, filed June 23, 2026, with respect to the rejection(s) of independent claim 2, and dependent claims 4-7 & 15, under 35 U.S.C. § 103 have been fully considered and are persuasive. Therefore, the rejections have been withdrawn. However, upon further consideration, a new grounds of rejection are made in view of Koudar (US 2016/0173981 A1), in view of Hayashi (US 2004/0240628), and in light of the amendments, further in view of new prior art reference, Kitamura et al. (US 2018/0375457 A1, Pub. Date Dec. 27, 2018, hereinafter, Kitamura).
In response to the Applicant’s arguments, see pp. 8-10 of Applicant remarks, with respect to the rejection of independent claim 2, under U.S.C. § 103, that prior art references, Koudar (US 2016/0173981 A1, hereinafter, Koudar), in view of Hayashi (US 2004/0240628 A1, hereinafter, Hayashi), in view of Heppekausen (WO 2014/166835 A1, hereinafter, Heppekausen) as cited by the Applicant, and further in view of new prior art reference Kitamura (US 2018/0375457 A1), fail to disclose, teach, and/or suggest individually or in combination, the amended feature(s) in independent claim 2. Koudar, in view of Hayashi, in view of Heppekausen, and further in view of Kitamura, further disclose the additional limitation(s) that have been amended and included in independent claim 2, and meet these requirements. By substituting Kitamura for Heppekausen to teach the separation switch, the rejection is fully supported. The motivation to combine Kitamura, integrating Kitamura’s separation switches into the primary inverter circuit reliably isolates the bridge from the power or ground lines during braking, preventing unwanted zero-phase currents and reducing power loss. Therefore, Applicant’s arguments are unconvincing and the rejections of amended independent claim 2, dependent claims 4-7 & 15, which depend from and incorporate the limitations of claim 2, are respectively maintained. Rejections based on the newly cited reference follow below.
Applicant’s arguments, see Applicant remarks pp. 10-13, filed June 23, 2026, with respect to the rejection(s) of independent claim 3, and dependent claims 11-14 & 16, under 35 U.S.C. § 103 have been fully considered and are persuasive. Therefore, the rejections have been withdrawn. However, upon further consideration, a new grounds of rejection are made in view of Koudar (US 2016/0173981 A1), in view of Hayashi (US 2004/0240628), and in light of the amendments, further in view of new prior art reference, Kitamura et al. (US 2018/0375457 A1, Pub. Date Dec. 27, 2018, hereinafter, Kitamura).
In response to the Applicant’s arguments, see pp. 10-13 of Applicant remarks, with respect to the rejection of independent claim 3, under U.S.C. § 103, that prior art references, Koudar (US 2016/0173981 A1, hereinafter, Koudar), in view of Hayashi (US 2004/0240628 A1, hereinafter, Hayashi), in view of Heppekausen (WO 2014/166835 A1, hereinafter, Heppekausen) as cited by the Applicant, and further in view of new prior art reference Kitamura (US 2018/0375457 A1), fail to disclose, teach, and/or suggest individually or in combination, the amended feature(s) in independent claim 3. Koudar, in view of Hayashi, in view of Heppekausen, and further in view of Kitamura, disclose the additional limitation(s) that have been amended and included in independent claim 3, and meet these requirements. By substituting Kitamura for Heppekausen and Hayashi to teach the separation switch, the rejection is fully supported. Kitamura discloses the high-side separation switch configuring and control timing. The motivation to combine Kitamura, integrating Kitamura’s high-side separation switch into the primary inverter circuit reliably isolates the bridge from the power line during braking or damping modes, preventing unwanted zero-phase currents from entering the neutral point and reducing power loss. Therefore, Applicant’s arguments are unconvincing and the rejections of amended independent claim 3, dependent claims 11-14 & 16, which depend from and incorporate the limitations of claim 3, are respectively maintained. Rejections based on the newly cited reference(s) follow.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 2-7 & 11-16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 2 recites, “wherein a first end of the first switch and a first end of the third switch are connected together at an upper common node,” in ll. 26-27, “a first end of the second switch and a first end of the fourth switch are connected together at a lower common node,” in ll. 28-29, and “the first series circuit and the second series circuit are both between the upper common node and the lower common node,” in ll. 30-31, “at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together, in ll. 32-33, and “at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together,” in ll. 34-35. The claim limitations are not previously disclosed, present in the disclosure or drawings, or disclosed in the paragraphs indicated by the Applicant remarks, pp. 8-13, and a POSITA would need to know which first end of a first switch and first end of the third switch connect to create the upper common node, the first end of the second switch and the first end of the fourth switch connect to create the lower common node, and the first series circuit and second series circuit location between the upper and lower common nodes and/or whether there is a specific purpose for upper and lower placement of the nodes , and there is no specific mention of the first connection node between the first switch and the second switch or the second connection node between the third switch and the fourth switch, or mention of their connection together. Claims 4-7 & 15 are rejected by virtue of dependence on claim 2, which do not rectify the defect.
Claim 3 recites, “wherein a first end of the first switch and a first end of the third switch are connected together at an upper common node,” in ll. 26-27, “a first end of the second switch and a first end of the fourth switch are connected together at a lower common node,” in ll. 28-29, “the first series circuit and the second series circuit are both between the upper common node and the lower common node,” in ll. 30-31, “at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together, in ll. 32-33, and “at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together,” in ll. 34-35. The claim limitations are not previously disclosed, present in the disclosure or drawings, or disclosed in the paragraphs indicated by the Applicant remarks, pp. 8-13, and a POSITA would need to know which first end of a first switch and first end of the third switch connect to make up the upper common node, the first end of the second switch and the first end of the fourth switch connect to make up the lower common node, the first series circuit and second series circuit location between the upper and lower common nodes and/or whether there is a specific purpose for upper and lower placement of the nodes, and there is no specific mention of the first connection node between the first switch and the second switch or the second connection node between the third switch and the fourth switch, or mention of their connection together. Claims 11-14 & 16 are rejected by virtue of dependence on claim 3, which do not rectify the defect.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-7 & 11-16 are rejected under 35 U.S.C. 103 as being unpatentable over Koudar et al. (US 2016/0173981 A1, Pub. Date Jun. 16, 2016, hereinafter, Koudar) in view of Hayashi (US 2004/0240628 A1, Pub. Date Dec. 02, 2004, hereinafter, Hayashi), in view of Heppekausen (WO 2014166835 A1, Pub. Date Oct. 16, 2014, hereinafter, Heppekausen), and further in view of Kitamura et al. (US 2018/0375457 A1, hereinafter, Kitamura).
Regarding independent claim 2, Koudar, teaches:
A semiconductor device comprising (Figs. 1 & 15; [0002]-[0003], [0025], [0027]-[0028], [0035], & [0086]):
a drive circuit (Fig. 1; [0003], [0025]-[0028], & [0086]: controller 203 & 205) configured to be capable of supplying a drive signal in an ultrasonic band to a piezoelectric element (Fig. 1; [Abstract], [0025]-[0029], & [0086]: discloses a transmitter circuit that drives an ultrasonic transducer), and to supply, after the drive signal is stopped (Fig. 2; [Abstract], [0026]-[0027], [0029], & [0034]), a damping signal to the piezoelectric element ([0026]-[0027], [0029], & [0034]) wherein the damping signal has a signal different from a phase of the drive signal (Figs. 1-2; [Abstract], [0026]-[0027], [0029], [0034], & [0039]: discloses applying an active damping signal with an opposite polarity (out-of-phase) by the controller to stop ringing); and
a control circuit (Figs. 1-3; [0027]-[0028] & [0034]: 203 & 205 control circuit) configured to control the drive circuit (Figs. 1-2; [0026]-[0028] & [0034]: discloses controller issuing control signals),
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Koudar, is silent in regard to:
wherein the drive circuit includes a full bridge circuit between a first line and a second line to which a potential higher than the first line is to be applied, and wherein the drive circuit is configured to use the full bridge circuit to supply the drive signal and the damping signal to the piezoelectric element based on a potential difference between the first line and the second line,
wherein the full bridge circuit includes a first series circuit including a first switch on a side of the second line and a second switch provided on a side of the first line, and a second series circuit including a third switch on the side of the second line and a fourth switch provided on the side of the first line, wherein the full bridge circuit connects a first connection node between the first switch and the second switch to a first end of the piezoelectric element and connects a second connection node between the third switch and the fourth switch to a second end of the piezoelectric element,
the first series circuit and the second series circuit are both between the upper common node and the lower common node,
at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together,
at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together,
However, Hayashi, further teaches:
wherein the drive circuit includes a full bridge circuit between a first line and a second line to which a potential higher than the first line is to be applied (Fig. 6; [Abstract], [0008]-[0010], [0024], & [0030]), and wherein the drive circuit is configured to use the full bridge circuit to supply the drive signal and the damping signal to the piezoelectric element based on a potential difference between the first line and the second line (Fig. 6; [Abstract], [0008]-[0010], [0030], [0073], [Claim 1], [Claim 2], [Claim 5], & [Claim 6]: teaches the full H-bridge driving circuit situated between a high potential line and a ground line),
wherein the full bridge circuit includes a first series circuit including a first switch on a side of the second line and a second switch provided on a side of the first line, and a second series circuit including a third switch on the side of the second line and a fourth switch provided on the side of the first line (Fig. 6; [0008]-[0009], [0024], & [0073]: details the first and second series circuits comprising the four switches), wherein the full bridge circuit connects a first connection node between the first switch and the second switch to a first end of the piezoelectric element and connects a second connection node between the third switch and the fourth switch to a second end of the piezoelectric element (Fig. 6; [0009]: maps the exact structural connection nodes between the series circuit switches leading to the respective ends of the load element),
the first series circuit and the second series circuit are both between the upper common node and the lower common node (Fig. 6; [0009], [Claim 2], & [Claim 9]: teaches both series circuits are positioned in parallel between the common voltage and ground nodes),
at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together ([0009], [0013], [Claim 2], & [Claim 9]: teaches the switches join at a connection node for the first leg),
at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together ([0009], [0013], [Claim 2], & [Claim 9]: teaches the switches join at a connection node for the second leg),
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the drive circuit of Koudar to incorporate the full bridge circuit taught by Hayashi. Koudar discloses the piezoelectric drive and damping control but does not detail the drive circuit as a full bridge circuit between a first and second line having first and second series circuits with four switches and respective connection nodes to the piezoelectric element. Hayashi teaches an ultrasonic transmitter drive circuit configured as a full-bridge circuit having first and second series circuits with four switches (FET11, FET12, FET21, FET22) that connect via first and second connection nodes to ends of a piezoelectric element (XD) to supply drive and damping signals based on a potential difference between a higher voltage line (VB) and a ground line. This modification represents a substitution of one known drive circuit topology for another, employing a known technique to improve similar devices. A POSITA would be motivated to make this combination to improve the efficiency and amplitude control of the ultrasonic driving and damping pulses applied to the piezoelectric element, ensuring reduced power loss and better resonance compensation (KSR).
Koudar, and Hayashi, are silent in regard to:
wherein the control circuit is configured to, after the supply of the drive signal to the piezoelectric element is stopped, and during a brake period in which a brake operation is performed, supply the damping signal to the piezoelectric element using the drive circuit,
wherein the control circuit is configured to, in the brake operation, turn off the first switch and the third switch and turn on the second switch and the fourth switch, or turn on the first switch and the third switch and turn off the second switch and the fourth switch,
wherein a first end of the first switch and a first end of the third switch are connected together to an upper common node,
a first end of the second switch and a first end of the fourth switch are connected together at a lower common node,
wherein the semiconductor device further comprises a separation switch between the lower common node and the first line, and
wherein the control circuit is configured to keep the separation switch on in a period during which the drive signal is supplied to the piezoelectric element and in a period during which the damping signal is supplied to the piezoelectric element, and keeps the separation switch off in at least a part of a period during which the first switch and the third switch are turned off and the second switch and the fourth switch are turned on by the brake operation.
However, Kitamura, further teaches:
The Examiner is combining Koudar in view of Kitamura by implementing applying the damping signal after the drive signal stops of Koudar ([0026], [0029], & [0034]: teaches applying the damping signal during a specific non-driving damping/braking period).
wherein the control circuit is configured to, after the supply of the drive signal to the piezoelectric element is stopped, and during a brake period in which a brake operation is performed, supply the damping signal to the piezoelectric element using the drive circuit ([0114]-[0115]: teaches stopping normal drive supply to execute a brake operation utilizing the bridge circuit),
wherein the control circuit is configured to, in the brake operation, turn off the first switch and the third switch and turn on the second switch and the fourth switch, or turn on the first switch and the third switch and turn off the second switch and the fourth switch ([0113]-[0115] & [0135]-[0136]: teaches turning off the upper (first/third) switches and turning on the lower (second/fourth) switches during a braking /neutral point operation),
wherein a first end of the first switch and a first end of the third switch are connected together to an upper common node ([0006], [0052], [0066], [0072]-[0073], & [0136]: teaches a standard full-bridge topology where upper switches connect to a high-side node and lower switches connect to a low-side node),
a first end of the second switch and a first end of the fourth switch are connected together at a lower common node ([0006], [0052], [0066], [0072]-[0073], & [0136]),
wherein the semiconductor device further comprises a separation switch between the lower common node and the first line (Fig. 1; [0054]-[0057]: teaches a separation switch SW11 connecting the lower common node N1 to the ground line, located between the lower common node of the bridge and ground), and
wherein the control circuit is configured to keep the separation switch on in a period during which the drive signal is supplied to the piezoelectric element and in a period during which the damping signal is supplied to the piezoelectric element, and keeps the separation switch off in at least a part of a period during which the first switch and the third switch are turned off and the second switch and the fourth switch are turned on by the brake operation ([0082], [0084]-[0085], & [0114]-[0115]: teaches keeping the separation switch ON during normal signal driving, but turning it OFF during a braking/neutral point operation where upper switches are OFF and lower switches are ON).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the separation switch and associated control scheme taught by Kitamura into the full bridge circuit of Koudar and Hayashi. The combination of Koudar and Hayashi teaches a full-bridge circuit but does not detail a separation switch between the lower common node and the first line that is kept on during drive periods and turned off during a brake operation where the first/third switches are off and second/fourth switches are on. Kitamura discloses a semiconductor device featuring a separation switch SW11 between a lower common node N1 of an inverter and a first ground line, wherein a control circuit keeps the separation switch on during normal drive periods and turns it off during a brake operation (first state) where upper switches are turned off and lower switches are turned on. This modification represents the application of a known technique to improve similar devices, yielding a predictable variation of the base inverter circuit. A POSITA would be motivated to include this separation switch to isolate the bridge circuit from the ground line during braking and damping modes, preventing unwanted zero-phase currents and reducing unnecessary power loss in the device (KSR).
Regarding independent claim 3, Koudar, teaches:
A semiconductor device comprising (Figs. 1 & 15; [0002]-[0003], [0025], [0027]-[0028], [0035], & [0086]):
a drive circuit (Fig. 1; [0003], [0025]-[0028], & [0086]: controller 203 & 205) configured to be capable of supplying a drive signal in an ultrasonic band to a piezoelectric element (Fig. 1; [Abstract], [0025]-[0029], & [0086]: discloses a transmitter circuit that drives an ultrasonic transducer), and to supply, after the drive signal is stopped (Fig. 2; [Abstract], [0026]-[0027], [0029], & [0034]), a damping signal to the piezoelectric element ([0026]-[0027], [0029], & [0034]) wherein the damping signal has a phase different from a phase of the drive signal (Figs. 1-2; [Abstract], [0026]-[0027], [0029], [0032]-[0034], [0037], & [0039]: discloses the damping signal utilizes a phase/polarity different from the drive/circulating current); and
a control circuit (Figs. 1-3; [0027]-[0028] & [0034]: 203 & 205 control circuit) configured to control the drive circuit (Figs. 1-2; [0026]-[0028] & [0034]: discloses controller issuing control signals),
Koudar, is silent in regard to:
wherein the drive circuit includes a full bridge circuit between a first line and a second line to which a potential higher than the first line is to be applied, and wherein the drive circuit is configured to use the full bridge circuit to supply the drive signal and the damping signal to the piezoelectric element based on a potential difference between the first line and the second line,
wherein the full bridge circuit includes a first series circuit including a first switch on a side of the second line and a second switch on a side of the first line, and a second series circuit including a third switch on the side of the second line and a fourth switch provided on the side of the first line, wherein the full bridge circuit respectively connects a first connection node between the first switch and the second switch to a first end of the piezoelectric element and a second connection node between the third switch and the fourth switch to a second end of the piezoelectric element,
the first series circuit and the second series circuit are both between the upper common node and the lower common node,
at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together,
at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together,
However, Hayashi, further teaches:
wherein the drive circuit includes a full bridge circuit between a first line and a second line to which a potential higher than the first line is to be applied (Fig. 6; [Abstract], [0008]-[0010], [0024], [0030], [Claim 2], & [Claim 6]: teaches the ultrasonic drive circuit constructed as a full bridge circuit between a voltage line and a ground line), and wherein the drive circuit is configured to use the full bridge circuit to supply the drive signal and the damping signal to the piezoelectric element based on a potential difference between the first line and the second line (Fig. 6; [Abstract], [0008]-[0010], [0024], [0030], [0073], [Claim 1], [Claim 2], [Claim 5], & [Claim 6]: teaches the full bridge driving circuit comprising first/second series circuits with four respective switches),
wherein the full bridge circuit includes a first series circuit including a first switch on a side of the second line and a second switch on a side of the first line, and a second series circuit including a third switch on the side of the second line and a fourth switch provided on the side of the first line (Fig. 6; [0008]-[0009], [0024], & [0073]: details the first and second series circuits comprising the four switches), wherein the full bridge circuit respectively connects a first connection node between the first switch and the second switch to a first end of the piezoelectric element and a second connection node between the third switch and the fourth switch to a second end of the piezoelectric element (Fig. 6; [0009]: teaches nodes between the respective circuit switches connecting to both ends of the load element),
the first series circuit and the second series circuit are both between the upper common node and the lower common node (Fig. 6; [0009], [Claim 2], & [Claim 9]: teaches both series circuits are positioned in parallel between the common voltage and ground nodes),
at the first connection node between the first switch and the second switch, a second end of the first switch and a second end of the second switch are connected together ([0009], [0013], [Claim 2], & [Claim 9]: teaches the switches join at a connection node for the first leg),
at the second connection node between the third switch and the fourth switch, a second end of the third switch and a second end of the fourth switch are connected together ([0009], [0013], [Claim 2], & [Claim 9]: teaches the switches join at a connection node for the second leg),
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the drive circuit of Koudar by substituting it with the full bridge circuit topology taught by Hayashi. Koudar discloses the piezoelectric drive and damping control device but does not detail the full bridge circuit topology operating between a higher potential second line and a first line via first and second series circuits comprising four switches and respective connection nodes. Hayashi discloses an ultrasonic transmitter utilizing a full-bridge drive circuit having first and second series circuits, each having upper and lower switches connected at respective nodes to a piezoelectric element to supply drive and damping signals based on a potential difference between a power supply and ground. This modification represents a substitution of one known drive circuit topology for another, employing a known technique to improve similar devices. A POSITA would be motivated to make this combination to improve the efficiency and amplitude control of the ultrasonic driving and damping pulses applied to the piezoelectric element, ensuring reduced power loss and better resonance compensation (KSR).
Koudar, and Hayashi, are silent in regard to:
wherein the control circuit is configured to, after the supply of the drive signal to the piezoelectric element is stopped, and during a brake period in which a brake operation is performed, supply the damping signal to the piezoelectric element using the drive circuit,
wherein the control circuit is configured to, in the brake operation, turn off the first switch and the third switch and turn on the second switch and the fourth switch, or turn on the first switch and the third switch and turn off the second switch and the fourth switch,
wherein a first end of the first switch and a first end of the third switch are connected together to an upper common node,
a first end of the second switch and a first end of the fourth switch are connected together at a lower common node,
wherein the semiconductor device further comprises a separation switch between the lower common node and the first line, and
wherein the control circuit is configured to keep the separation switch on in a period during which the drive signal is supplied to the piezoelectric element and in a period during which the damping signal is supplied to the piezoelectric element, and to keep the separation switch off in at least a part of a period during which the first switch and the third switch are turned on and the second switch and the fourth switch are turned off by the brake operation.
However, Kitamura, further teaches:
The Examiner is combining Koudar in view of Kitamura by implementing applying the damping signal after the drive signal stops of Koudar ([0026], [0029], & [0034]: teaches applying the damping signal during a specific non-driving damping/braking period).
wherein the control circuit is configured to, after the supply of the drive signal to the piezoelectric element is stopped, and during a brake period in which a brake operation is performed, supply the damping signal to the piezoelectric element using the drive circuit ([0114]-[0115]: teaches stopping normal drive supply to execute a brake operation utilizing the bridge circuit),
wherein the control circuit is configured to, in the brake operation, turn off the first switch and the third switch and turn on the second switch and the fourth switch ([0113]-[0115] & [0135]-[0136]: teaches turning on the upper (first/third) switches and turning on the lower (second/fourth) switches during a braking /neutral point operation), or turn on the first switch and the third switch and turn off the second switch and the fourth switch ([0113]-[0115] & [0135]-[0136]: teaches turning on the upper (first/third) switches and turning off the lower (second/fourth) switches during a high-side braking /neutral point operation),
wherein a first end of the first switch and a first end of the third switch are connected together to an upper common node ([0006], [0052], [0066], [0072]-[0073], & [0136]: teaches a standard full-bridge topology where upper switches connect to a high-side node and lower switches connect to a low-side node),
a first end of the second switch and a first end of the fourth switch are connected together at a lower common node ([0006], [0052], [0066], [0072]-[0073], & [0136]),
wherein the semiconductor device further comprises a separation switch between the upper common node and the second line (Fig. 1; [0054]-[0057] & [0136]: teaches a separation switch SW113 connecting the upper common node N3 to the power supply/second line), and
wherein the control circuit is configured to keep the separation switch on in a period during which the drive signal is supplied to the piezoelectric element and in a period during which the damping signal is supplied to the piezoelectric element, and to keep the separation switch off in at least a part of a period during which the first switch and the third switch are turned on and the second switch and the fourth switch are turned off by the brake operation ([0082], [0084]-[0085], [0114]-[0115], [0134]-[0136], & [0141]-[0142]: teaches keeping the separation switch ON during normal signal driving, but turning it OFF during a braking/neutral point operation where upper switches are ON and lower switches are OFF).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the upper separation switch and its associated control logic taught by Kitamura into the full bridge circuit of Koudar and Hayashi. The combination of Koudar and Hayashi teaches a full-bridge piezoelectric drive circuit but does not detail a separation switch between the upper common node and the second line that remains on during active drive periods and turned off during a brake operation where the first and third upper switches are on and second and fourth lower switches are off. Kitamura discloses a semiconductor device featuring a separation switch SW113 between a power supply and an upper common node N3 of an inverter, wherein a control circuit keeps this separation switch on during normal driving periods but turns it off during a brake/neutral point operation (third state) where upper switches are turned on and lower switches are turned off. This modification represents the application of a known technique to improve similar devices, yielding a predictable variation of the base inverter circuit architecture. A POSITA would be motivated to include this high-side separation switch to isolate the bridge circuit’s upper common node from the power supply line when forming a high-side neutral point during braking and damping modes, preventing unwanted currents from flowing into the neutral point and reducing unnecessary power loss in the device (KSR).
Regarding dependent claim 4, Koudar, teaches:
The semiconductor device according to claim 2 further comprising (Figs. 1 & 15; [0002]-[0003], [0025], [0027]-[0028], [0035], & [0086]):
a damping circuit (Fig. 1; [0027]: active damping circuit 213) which includes a resistive load (236) and an inductive load ([0027]-[0028]: discloses the damping circuit (218 passive damping circuit) comprises an inductor 235 and resistor 236)), wherein the control circuit (203) causes, after the supply of the drive signal to the piezoelectric element (transducer 12) is stopped ([0026]-[0029]: discloses ending the drive (transmission) phase before initiating damping, where the transducer 12 is the piezoelectric element), the drive circuit (207) to supply the damping signal to the piezoelectric element (12) through the brake operation (Fig. 1; [Abstract], [0025]-[0029], [0034] & [0086]: as mapped in independent claim 1 Koudar teaches applying an active damping signal/voltage to the transducer and Heppekausen teaches executing this active damping in conjunction with the bridge-shorting brake operation), and thereafter can connect the damping circuit to the piezoelectric element (Fig. 1; [Abstract], [0026], [0029], [0034], [0037] & [0044]: teaches connecting the passive damping circuit (R+L) to the transducer after the active damping phase has conclude to continue draining the remaining stored energy).
Regarding dependent claim 5, Koudar, teaches:
The semiconductor device according to claim 4 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]), wherein the control circuit (203) can perform damper connection control after the supply of the damping signal to the piezoelectric element is stopped ([0042]-[0044]: teaches transitioning from the active damping phase (damper connection control) after the active signal has sufficiently reduced the energy), stops the brake operation after the damping circuit is connected to the piezoelectric element ([0105]-[0107] & [0131]-[0133]) and turns off all the first to fourth switches ([0037]-[0039]: placing the drive bridge in a high-impedance state/closed-loop damping phase).
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Koudar, is silent in regard to:
starts the brake operation in the damper connection control before the damping circuit is connected to the piezoelectric element,
However, Heppekausen, further teaches
starts the brake operation in the damper connection control before the damping circuit is connected to the piezoelectric element (Fig. 1; [0033]-[0034] & [0037]-[0039]: teaches the brake operation (closing the bottom bridge switches 22 & 26 to short the transducer) to safely recirculate current),
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to sequence the switch operations taught by Koudar, Hayashi, and Heppekausen, which is a textbook application of “make-before-break” (MBB) switching. Where the sequence starts the brake operation (short the bridge as taught by Heppekausen), connect the damping circuit while the current is safely freewheeling, and stop the brake operation and turn “off” all bridge switches after the passive damper is connected, forcing the reaming recirculating energy out of the short-circuit, into the passive damper, according to knows methods, and yield predictable results (KSR). The switching sequence is a standard, and predictable engineering solution that is used to protect semiconductor devices from inductive/piezoelectric voltage transients.
Regarding dependent claim 6, Koudar, teaches:
The semiconductor device according to claim 5 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]),
wherein the control circuit can perform, after the supply of the damping signal to the piezoelectric element is stopped ([0026]: teaches that after the damping phase is complete, the controller moves to a “distance measuring phase” to receive the faint echo signals. Receiving an echo inherently requires disconnecting the passive damping circuit, otherwise the signal would be dissipated),
and stops the brake operation after the damping circuit is interrupted from the piezoelectric element ([0026], [0034] & [0037]-[0039]: “controller 203” manages the “damping phase” to “reduce the energy stored in transducer 12.”, includes applying a “damping signal”, and later terminating the damping phase when energy is below a threshold, part of the damper disconnection control and the high-impedance state is required so the receiver circuit (210) can detect incoming ultrasonic echoes without the bridge or brake circuit loading down the signal).
Koudar, is silent in regard to:
damper disconnection control after connecting the damping circuit and the piezoelectric element by the damper connection control, starts the brake operation before the damping circuit is interrupted from the piezoelectric element in the damper disconnection control,
However, Heppekausen, further teaches
damper disconnection control after connecting the damping circuit and the piezoelectric element by the damper connection control (Figs. 5 & 7; [0036]-[0039]: teaches “damper disconnection control” by monitoring the transducer voltage and opening the damping switch once the ringing drops below a threshold), starts the brake operation before the damping circuit is interrupted from the piezoelectric element in the damper disconnection control (Fig. 1; [0033]-[0034] & [0037]-[0039]: teaches the brake operation (closing the bottom bridge switches 22 & 26 to short the transducer). Applying this short before opening the switch to the passive damping circuit is a standard “make-before-break” strategy to provide a safe freewheeling path for the current stored in the damping circuit’s inductor),
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to sequence the switch operations taught by Koudar, Hayashi, and Heppekausen, which is a textbook application of “make-before-break” (MBB) switching. Where the sequence starts the brake operation (short the bridge as taught by Heppekausen) to safely trap and recirculate the remaining inductive current, interrupt the damping circuit (open switch 219) while the current is safely freewheeling through the shorted bridge, preventing a voltage spike, and stop the brake operation (open the bridge switches to enter a high-impedance state, as taught by Hayashi) after the passive damper is disconnected, preparing the transducer to act as a receiver for the incoming echo signal without the signal being shorted out by the brake operation, according to knows methods, representing an obvious application of known techniques to yield predictable results (KSR). The switching sequence is a standard, and predictable engineering solution that is used to mitigate inductive flyback during load disconnection, to protect semiconductor devices from inductive/piezoelectric voltage transients.
Regarding dependent claim 7, Koudar, teaches:
The semiconductor device according to claim 4 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]),
wherein in the damping circuit ([0027]-[0028] & [0036]), the resistive load (Fig. 1: 36) and the inductive load (Fig. 1: 235) are connected in parallel (Fig. 1; [0027]-[0028] & [0036]: teaches that the passive damping circuit comprises an inductor connected in parallel with a resistor).
Regarding dependent claim 11, Koudar, teaches:
The semiconductor device according to claim 3 further comprising (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]):
a damping circuit which includes a resistive load and an inductive load (Fig. 1; [0027]-[0028] & [0036]: discloses a passive damping circuit comprising an inductor (inductive load) and a resistors (resistive load)),
and thereafter can connect the damping circuit to the piezoelectric element ([0037] & [0044]: discloses connecting the passive damping circuit to the transducer after the initial active damping phase is complete (i.e., after the threshold is reached)).
Koudar, is silent in regard to:
wherein the control circuit causes, after the supply of the drive signal to the piezoelectric element is stopped, the drive circuit to supply the damping signal to the piezoelectric element through the brake operation,
However, Kitamura, further teaches
The Examiner is combining Koudar in view of Kitamura by implementing applying an active damping signal after the drive signal stops to reduce stored energy of Koudar ([0026], [0029], & [0034]).
wherein the control circuit causes, after the supply of the drive signal to the piezoelectric element is stopped, the drive circuit to supply the damping signal to the piezoelectric element through the brake operation ([0114]-[0115]: teaches supplying the damping via a brake operation (e.g., forming a neutral point using the bridge circuit switches) once normal driving is stopped),
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the active damping phase of Koudar by employing the specific bridge circuit brake operation taught by Kitamura, prior to connecting Koudar’s passive damping circuit. Koudar teaches a semiconductor device configured to apply an active damping signal followed by connecting a passive damping circuit containing a resistive and inductive load but fails to detail supplying the initial active damping signal through a brake operation utilizing bridge circuit switching. Kitamura teaches a method of supplying a damping/braking signal via a brake operation where switches in a bridge circuit are turned on and off to form a neutral point after normal driving stops. This modification represents the application of a known technique to improve similar devices, yielding predictable variations in how the active damping signal is electrically applied using existing inverter hardware. A POSITA would be motivated to make this combination to improve electrical efficiency and reduce component counts by utilizing the bridge circuit’s switching states to perform the initial active braking before transitioning to the passive inductive-resistive damping phase to dissipate residual energy (KSR).
Regarding dependent claim 12, Koudar, teaches:
The semiconductor device according to claim 11 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]),
wherein the control circuit can perform damper connection control after the supply of the damping signal to the piezoelectric element is stopped ([0037] & [0044]: discloses performing a damper connection control (transitioning to a passive damping phase) after the active damping signal stops),
Koudar, is silent in regard to:
starts the brake operation in the damper connection control before the damping circuit is connected to the piezoelectric element, stops the brake operation after the damping circuit is connected to the piezoelectric element and turns off all the first to fourth switches.
However, Kitamura, further teaches
The Examiner is combining Koudar in view of Kitamura by applying the active braking state of the bridge switches initiates prior to the physical connection of the passive damping circuit (closing switch 219) to manage residual energy of Koudar ([0026], [0029], & [0034]).
starts the brake operation in the damper connection control before the damping circuit is connected to the piezoelectric element ([0114]-[0115]: teaches utilizing the bridge switches to perform a brake operation (e.g., forming a neutral point)),
The Examiner is combining Koudar in view of Kitamura by implementing the transitioning control to the passive damper of Koudar ([0044]).
stops the brake operation after the damping circuit is connected to the piezoelectric element and turns off all the first to fourth switches ([0125], [0142], [0154], [0163], [0166], & [0187]: teaches stopping bridge braking and turning off all switching elements to open the circuit. Overlapping the connection before turning off all switches ensures continuity).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Koudar by incorporating Kitamura’s overlapping bridge braking sequence, ensuring the brake operation starts before and stops after the damping circuit connection, followed by turning off all four switches. Koudar teaches performing damper connection control after active damping stops but does not detail the specific timing of starting a brake operation before connecting the damping circuit, stopping the brake operation after connection, and turning off all first to fourth switches. Kitamura teaches executing bridge brake operations and turning off all switching elements to open the circuit. This modification represents the application of a known technique to improve similar devices, yielding a predictable variation in inverter switch timing. A POSITA would be motivated to make this combination to ensure a smooth electrical handoff to the passive damping circuit, improving circuit safety and energy dissipation efficiency (KSR).
Regarding dependent claim 13, Koudar, teaches:
The semiconductor device according to claim 12 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]),
wherein the control circuit can perform, after the supply of the damping signal to the piezoelectric element is stopped ([0026], [0037], [0044], & [0068]: discloses the controller executing subsequent operations after the active damping phase is terminated), damper disconnection control after connecting the damping circuit and the piezoelectric element by the damper connection control ([0026], [0044], & [0076]: teaches connecting the passive damping circuit (switch 219) and subsequently disconnecting it to transition into the distance measuring phase, necessitates disconnecting the damper to receive signals),
Koudar, is silent in regard to:
starts the brake operation before the damping circuit is interrupted from the piezoelectric element in the damper disconnection control and stops the brake operation after the damping circuit is interrupted from the piezoelectric element.
However, Kitamura, further teaches
The Examiner is combining Koudar in view of Kitamura by applying the starting of a brake operation before entirely breaking a current path to provide a safe route for remaining currents and prevent overvoltage of Kitamura, applying this to Koudar, the bridge brake operation initiates before the physical disconnection of the passive damper ([0044] & [0076]).
starts the brake operation before the damping circuit is interrupted from the piezoelectric element in the damper disconnection control ([0116]-[0118]: teaches starting a brake operation (e.g., forming a neutral point) before entirely breaking a current path to provide a safe route for remaining currents and prevent overvoltage) and stops the brake operation after the damping circuit is interrupted from the piezoelectric element ([0116], [0118], [0125], [0130], [0142], & [0164]: teaches stopping the brake operation (e.g., turning off the relevant bridge switches) only after the current path transition is safely completed).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the overlapping brake operation timing taught by Kitamura to the damper disconnection control of Koudar, ensuring the brake operation starts before and stops after the damping circuit is interrupted. Koudar discloses a semiconductor device performing damper connection and disconnection control after an active damping signal is stopped to transition to a measuring phase but lacks the specific timing of starting a brake operation before interrupting the damping circuit and stopping the brake operation after the interruption. Kitamura teaches coordinating brake operations, such as forming a neutral point with bridge switches, to overlap with the breaking of current paths to prevent overvoltage and protect electronic components from zero-phase current spikes. This modification represents the application of a known technique to improve similar devices, yielding a predictable variation in inverter switch timing during load transitions. A POSITA would be motivated to make this combination to ensure a safe electrical transition when disconnecting the passive inductive-resistive damper, preventing voltage spikes and improving overall circuit reliability (KSR).
Regarding dependent claim 14, Koudar, teaches:
The semiconductor device according to claim 11 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]),
wherein in the damping circuit ([0027]-[0028] & [0036]), the resistive load (Fig. 1: 36) and the inductive load (Fig. 1: 235) are connected in parallel (Fig. 1; [0027]-[0028] & [0036]: teaches that the passive damping circuit comprises an inductor connected in parallel with a resistor).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the parallel resistive-inductive damping circuit of Koudar with the full-bridge drive circuit of Hayashi and the separation switch braking control of Kitamura. Koudar teaches a damping circuit having a resistive load and an inductive load connected in parallel, passive damping circuit 218, and inductor 235, resistor 236, and relies on Hayashi and Kitamura to supply the full-bridge braking control architecture. This combination represents a predictable variation utilizing a known technique to improve similar devices, optimizing the transition from active bridge-circuit braking to passive electrical damping. A POSITA would be motivated to retain Koudar’s parallel resistive and inductive loads within this combined architecture to efficiently tune the damping resonance and dissipate any remaining transducer energy after the active braking operation concludes (KSR).
Regarding dependent claims 15 & 16, Koudar, teaches:
An ultrasonic sensor comprising ([0003] & [0025]: teaches the system in an ultrasonic measuring sensor): the semiconductor device of claims 2 & 3 (Figs. 1 & 5; [0002]-[0003], [0020], [0025], [0027]-[0028], [0035], & [0086]), and the piezoelectric element ([0025] & [0086]: teaches a semiconductor device that utilizes a piezoelectric element and refers to the overall controller as an “embodiment of a semiconductor device or integrated circuit 100”), wherein the piezoelectric element is connected to the semiconductor device (Fig. 1; [0028] & [0053]: teaches that the piezoelectric element (transducer) is electrically coupled/connected to the semiconductor device (controller) to receive drive and damping signals).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the ultrasonic sensor system and connected piezoelectric element of Koudar with the full-bridge circuit of Hayashi and the separation switch braking control of Kitamura. Koudar teaches an ultrasonic sensor comprising the semiconductor device connected to the piezoelectric element but relies on Hayashi and Kitamura to supply the specialized full-bridge drive and braking control architecture. Koudar further discloses the ultrasonic sensor system and piezoceramic element, while Hayashi contributes the full bridge circuit connecting to both ends of the element, and Kitamura provides the separation switch for the breaking operation. This combination represents a substitution of known drive circuit components within an established acoustic sensor system utilizing a known technique to improve similar devices. A POSITA would be motivated to integrate these components into Koudar’s ultrasonic sensor to achieve improved resonance control and safely manage residual energy during the system’s distance measuring phase (KSR).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/HUGO NAVARRO/ Examiner, Art Unit 2858 September 9, 2026
/A.A/Primary Examiner, Art Unit 2858
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