DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-13 and 20-24, in the reply filed on January 8, 2026 is acknowledged.
Accordingly, claims 14-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on January 8, 2026.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on September 18, 2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shanmugam et al (US Pub 2022/0093522).
Shanmugam et al discloses an electronic package comprising: a first-level routing layer (i.e. 250); a first-level electronic component (i.e. 120 or 140) on the first-level routing layer; a first-level molding compound layer (i.e. 160) that encapsulates the first-level electronic component on the first-level routing layer, the first-level molding compound layer including a top surface (i.e. 162), a lower step surface (i.e. 164) and a sidewall (i.e. 166) spanning between the top surface and the lower step surface; a second-level wiring layer (i.e. 150) on the first-level molding compound layer and spanning the lower step surface, the sidewall, and the top surface of the first-level molding compound layer; and a second-level electronic component (i.e. 170 or 180) mounted on the second-level wiring layer (i.e. see at least Figure 7).
Allowable Subject Matter
Claims 2-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 20-24 are allowed.
The following is an examiner’s statement of reasons for allowance: The prior arts of record do not disclose or suggest at least the limitation of “an electronic package comprising a first-level via opening extending through the top surface of the first-level molding compound layer to the vertical interconnect” as recited in claim 20.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTHONY HO/Primary Examiner, Art Unit 2817