Prosecution Insights
Last updated: October 02, 2026
Application No. 18/469,351

SEMICONDUCTOR DEVICE

Final Rejection §103
Filed
Sep 18, 2023
Priority
May 14, 2021 — JP 2021-082077 +2 more
Examiner
RAMIREZ, ALEXANDRE XAVIER
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., Ltd.
OA Round
2 (Final)
95%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
41 granted / 43 resolved
+27.3% vs TC avg
Minimal -2% lift
Without
With
+-2.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
16 currently pending
Career history
61
Total Applications
across all art units

Statute-Specific Performance

§103
56.5%
+16.5% vs TC avg
§102
25.5%
-14.5% vs TC avg
§112
14.4%
-25.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 43 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on 06/17/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner. Claim Objections Applicant’s amendments to claim 8 have overcome the Examiner’s objection to claim 8. Therefore, the objection to claim 8 is withdrawn. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 7, 9, 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Victor et al US 20070114352 A1 in view of Noquil et al US 20070114352 A1. Victor et al and Noquil et al will be referenced to as Victor and Noquil respectively henceforth. Regarding Claim 1, Victor teaches: “A semiconductor device comprising (FIG. 1): a semiconductor element (semiconductor die 16, [0016]) including a first electrode (first surface 16(a), [0034], [0038]: 16(a) comprises a source region which may have a source metal.); a conductive member (clip structure 14, [0038]) including a first bonding part (major portion 14(a), [0043]) facing the first electrode (FIG. 1); a bonding layer (solder 24, [0046]) interposed between the first electrode and the first bonding part (FIG. 1); and a regulator bonded to at least one of the first electrode and the first bonding part (pedestal 14(a)-1, [0046]: 14(a)-1 may be formed by plating or placing conductive columns on a flat surface of a clip structure.), the semiconductor element further includes a gate electrode located on a same side as the first electrode in the thickness direction (Victor: [0038], [0048], FIG. 1: 16(a) may also include a gate region which may include a gate clip structure.), and the regulator is disposed along an edge of the bonding layer that is closest to the gate electrode as viewed in the thickness direction (annotated FIG. 1 #2, FIG. 3: 14(a)-1 is disposed along an edge of the bonding layer as 14(a)-1 is on the same horizontal line as the edge of the bonding layer as seen in annotated FIG. 1 #2. This edge is closest to the gate electrode as viewed in the thickness direction because, as seen in FIG. 3, 28 is in direct contact with a top surface of 16, that is 16(a). Therefore, because the edge of 24 is in a same plane as 16(a), the edge of 24 is in a same plane as a bottom surface of 28 and therefore could not be closer to 28 with respect to a thickness direction.)” Victor doesn’t substantially teach: “wherein the regulator faces the bonding layer in a direction orthogonal to a thickness direction of the semiconductor element. ” However, Noquil teaches: “wherein the regulator faces the bonding layer in a direction orthogonal to a thickness direction of the semiconductor element (Noquil: protruding standoffs 162, FIG. 2A). ” It would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Victor is modifiable in view of Noquil by changing the shapes of the regulators of Victor for those of Noquil. This is because Victor teaches regulators which encapsulate a soldering material. Victor doesn’t substantively teach regulators facing the bonding layer in a direction orthogonal to a thickness direction of the semiconductor element. Noquil teaches regulators which encapsulate a soldering material. Noquil further teaches regulators facing the bonding layer in a direction orthogonal to a thickness direction of the semiconductor element. Because both Victor and Noquil have regulators which encapsulate a soldering material, one of ordinary skill in the art would have deemed it obvious to substitute the regulators of Victor for the regulators of Noquil for the predictable result of regulators which encapsulate a soldering material and therefore also control the amount solder between a clip and a semiconductor die. PNG media_image1.png 528 1306 media_image1.png Greyscale Annotated FIG. 1 #2 Regarding Claim 2, Victor/Noquil teaches: “The semiconductor device according to claim 1, wherein the regulator contains a metallic element (Victor: [0044]: 14 may comprise aluminum. One of ordinary skill in the art would understand that 14(a)-1 may be made of the same material as 14 because 14(a)-1 may have been formed by etching 14.).” Regarding Claim 3, Victor/Noquil teaches: “The semiconductor device according to claim 2, wherein the metallic element is aluminum (Victor: [0044]: 14 may comprise aluminum. One of ordinary skill in the art would understand that 14(a)-1 may be made of the same material as 14 because 14(a)-1 may have been formed by etching 14.).” Regarding Claim 7, Victor/Noquil teaches: “The semiconductor device according to claim 2, wherein the first bonding part includes a bonding surface facing the first electrode (Victor: annotated FIG. 1 #1), the regulator is bonded to the bonding surface (Victor: annotated FIG. 1 #1), and the regulator is in contact with the first electrode (Victor: [0046], FIG. 2).” PNG media_image2.png 396 934 media_image2.png Greyscale Annotated FIG. 1 #1 Regarding Claim 9, Victor/Noquil teaches: “The semiconductor device according to claim 1, wherein the regulator is in contact with the bonding layer (Victor: FIG. 1).” Regarding Claim 13, Victor/Noquil teaches: “The semiconductor device according to claim 1, further comprising a support member located on a side opposite the first bonding part with respect to the semiconductor element in the thickness direction (Victor: leadframe structure 18, [0031], FIG. 1 ), wherein the semiconductor element is mounted on the support member (Victor: FIG. 1). ” Regarding Claim 14, Victor/Noquil teaches: “The semiconductor device according to claim 13, further comprising a sealing resin covering the semiconductor element, the conductive member and a part of the support member (Victor: molding material 20, [0031], FIG. 1: an epoxy in a type of resin.).” Regarding Claim 15, Victor/Noquil teaches: “The semiconductor device according to claim 14, further comprising a plurality of terminal leads electrically connected to the semiconductor element (Victor: lead portion 14(c), drain leads 18(a), [0052], [0043], FIG. 1, FIG. 3: 14(c) is electrically connected to 16. 18(a) is electrically connected to 16.), wherein a part of each of the plurality of terminal leads is covered with the sealing resin (Victor: [0033], FIG. 1: The leads do not extend past the molding material 20. Therefore, as shown in FIG. 1, all lead portions 14(c) are covered by the molding material 20.).” Regarding Claim 16, Victor/Noquil teaches: “The semiconductor device according to claim 15, wherein the support member is electrically conductive (Victor: [0042]: 18 may be made of copper.), the semiconductor element includes a second electrode facing the support member (Victor: second surface 16(b), [0036], [0038], FIG. 1: 16(b) may comprise a drain region. Given that semiconductor die 16 comprises a vertical device, an output needs to be in 16(b) as there is an input at 16(a). The input is the source metal.), the second electrode is bonded to the support member (Victor: solder 90, [0034-0035], FIG. 1: 90 bonds 16 to 18.), and at least one of the plurality of terminal leads is connected to the support member (Victor: FIG. 1: 18(a) is a part of 18. Therefore, 18(a) is connected to the rest of 18 which is a support member.).” Regarding Claim 17, The combination Victor/Noquil cited above teaches: “The semiconductor device according to claim 15, wherein the conductive member includes a main part connected to the first bonding part (Victor: downset portion 14(b), [0043], FIG. 1)” The combination Victor/Noquil cited above doesn’t substantially teach: “and a second bonding part connected to the main part and spaced apart from the first bonding part, and the second bonding part is bonded to at least one of the plurality of terminal leads.” However, a further combination of Victor/Noquil teaches: “and a second bonding part connected to the main part and spaced apart from the first bonding part (Noquil: Vin clip 122, [0022], FIG. 2A), and the second bonding part is bonded to at least one of the plurality of terminal leads (Noquil: [0024], FIG. 2A).” It would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Victor/Noquil is further modifiable in view of Noquil by substituting the connection between a clip and a terminal lead of Victor for the connection between a clip and a terminal lead of Noquil. This is because the geometry of the connection between the clip and the terminal lead in Noquil has a greater surface area than the connection between 14(b) and 14(c) in Victor. One of ordinary skill in the art would desire the geometry of the connection in Noquil because a greater surface area between two conductors entails a lower electrical resistance. A lower electrical resistance leads to less heat being produced which in turn may lead to less damage to a semiconductor device. Claims 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Victor/Noquil as applied to claims 1-3, 7, 9, and 13-17 above, and further in view of Munoz et al US 6396127 B1. Munoz et al will be referenced to as Munoz henceforth. Regarding Claim 8, Victor/Noquil teaches: “The semiconductor device according to claim 7,” Victor/Noquil doesn’t substantially teach: “wherein the conductive member includes an end part connected to the first bonding part, the end part is inclined relative to the bonding surface to be increasingly away from the first electrode in the thickness direction with an increase in a distance from the first bonding part in a direction orthogonal to the thickness direction , and the first electrode includes an extension part wherein the extension part is located on an opposite side of an end part from the first bonding part However, Munoz teaches: “wherein the conductive member includes an end part connected to the first bonding part (Munoz: annotated FIG. 3 #1), the end part is inclined relative to the bonding surface to be increasingly away from the first electrode in the thickness direction with an increase in a distance from the first bonding part in a direction orthogonal to the thickness direction (Munoz: annotated FIG. 3 #1), and the first electrode includes an extension part wherein the extension part is located on an opposite side of an end part from the first bonding part with the end part in between as viewed in the thickness direction (Munoz: annotated FIG. 3 #1).” It would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to recognize that the device of Victor/Noquil is modifiable in view of Munoz by incorporating the end part and the extension part of Munoz. This is because Munoz teaches that a chamfered front edge advantageously reduced die surface stresses caused by the thermal expansion of an epoxy material (Munoz: col 5 lines 28-37). One of ordinary skill in the art would find this teaching to be advantageous as Victor may use an epoxy material for element 24 (Victor: [0035]). PNG media_image3.png 496 962 media_image3.png Greyscale Munoz annotated FIG. 3 #1 Regarding Claim 10, Victor/Noquil/Munoz teaches: “The semiconductor device according to claim 1, wherein (Munoz: col 4 lines 60-67, col 5 lines 0-13, FIG. 3, FIG. 4: gate bus 19a lies further from 30 than metallized portion 18 in a vertical direction in FIG. 4. The vertical direction in FIG. 4 corresponds to a horizontal direction in FIG. 3. This can be seen from the relative positions of elements 30, 12a, and 18 in FIG. 3 and in FIG. 4. Therefore, it must be that the first electrode, which corresponds to metallization 18, is between gate bus 19a and the first bonding part, which corresponds to element 30.). ” Response to Arguments Applicant’s amendments to the Claims have not overcome the Examiner’s 103 rejections. Applicant substantively argues: “However, in Victor, the pedestals are discrete downward projections located within the clip-bonding region, and not arranged along an edge of the solder or bonding layer.” The Examiner finds this argument is not fully persuasive because the discrete pedestals 14(a)-1 have a bottom edge which lies along a bottom edge of 24. See annotated FIG. 1 #2 above. Applicant further substantively argues, “In addition, Victor does not disclose or teach the pedestals' position with reference to a gate electrode.” The Examiner finds this argument is not fully persuasive. This is because the relative position of solder 24 and gate clip structure 28 is shown in FIG. 3 of Victor. Because discrete pedestals 14(a)-1 are in, and extend from the top to bottom of solder 24, and because 14(a)-1 is attached to 14, it can be deduced that 14(a)-1 lies in 24 and is under 14 in FIG. 3. Applicant further substantively argues, “Munoz's chamfered edges are provided to reduce die-surface stress caused by curing and thermal expansion of a conductive adhesive. In contrast, Victor and Noquil rely on localized support structures, such as pedestals or standoffs, to control spacing between bonded members. Therefore, modifying Victor or Noquil in view of Munoz would not predictably achieve the stress-relief purpose. Rather, stress may be concentrated at the localized support portions, which would be contrary to the stress-relief objective.” The Examiner finds this argument is not fully persuasive. Munoz teaches the use of chamfered edges to reduce stress associated with curing and thermal expansion of a conductive adhesive. The proposed modification incorporates Munoz’s chamfered-edge structure into Victor/Noquil to provide the predictable benefit of reducing stress at the corresponding edges. Although Victor or Noquil employs localized support structures, Applicant has not established that the presence of such structures would negate the stress-reduction benefit of the chamfered edges. The proposed combination does not require the elimination of all stress throughout the structure. Rather, the modification provides the predictable benefit of reducing stress at the chamfered edges while retaining the localized support structures of Victor or Noquil. The Examiner wishes to inform the Applicant that it is not fully clear to the Examiner how the Applicant intended the limitation, “and the regulator is disposed along an edge of the bonding layer that is closest to the gate electrode as viewed in the thickness direction” to be interpreted. Applicant cites FIG. 12 and 16 as providing support for the above limitation. However, these figures only refer to an x and y direction. Applicant’s cited direction for a thickness direction is the z-direction. It is therefore not clear how FIG. 12 or 16 provides support for the above limitation. The Examiner believes that perhaps the above limitation was intended to capture geometry shown in FIG. 17 wherein the closest edge of the bonding layer in this figure lies along a regulator. However, Applicant’s FIG. 21, which is included in the elected species, comprises an edge of a bonding layer which is closer to the gate electrode than any edge of a bonding layer wherein the regulator is disposed on that edge. In the interest of compact prosecution, if the Applicant were to amend an independent claim with the following limitation: “wherein the gate electrode is surrounded by the semiconductor element” It would overcome the current rejections for claim 1. The Examiner is available for interview at Applicant’s convenience for discussion of claim amendments. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDRE XAVIER RAMIREZ whose telephone number is (571)272-2715. The examiner can normally be reached Monday - Friday 8:30 AM to 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEXANDRE X RAMIREZ/Examiner, Art Unit 2812 /William B Partridge/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Sep 18, 2023
Application Filed
Apr 29, 2026
Non-Final Rejection mailed — §103
Jul 27, 2026
Response Filed
Sep 23, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
95%
Grant Probability
93%
With Interview (-2.0%)
3y 4m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 43 resolved cases by this examiner. Grant probability derived from career allowance rate.

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