DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 9-12, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fisher et al., US 9,226,435 (listed in IDS filed 09/19/2022).
In re Claim 1, Fisher discloses a semiconductor device comprising: a substrate 56 comprising an interconnection structure 64 and a conductive bar 66 connected to the interconnection structure 64; at least one electronic component 86 on the substrate 56; an encapsulant layer 68 formed on the substrate 56 and covering the at least one electronic component 56, and a shielding layer 82 extending at least partially over the substrate 56, the substrate 56 comprises an opening 74 over at least a portion of the conductive bar 66, the portion being exposed from the encapsulant layer 68 and the substrate 56, the shielding layer 82 extending within the opening 74 and being electrically connected with the conductive bar 66 in the opening 74, wherein the opening 74 is adjacent to the encapsulant layer 68 or is extended by an aperture (a space between sidewalls 76) in the encapsulant layer 68 (Figs. 1-10; column 4, line 16 – column 11, line 23).
In re Claim 2, Fisher discloses the semiconductor device of claim 1, wherein an internal surface of the opening 74 is extended by an internal surface of the aperture (the space between sidewalls 76) of the encapsulant layer 68 (Fig. 10).
In re Claim 3, Fisher discloses the semiconductor device of claim 1, wherein the aperture (the space between sidewalls 76) of the encapsulant layer 68 extends between a side surface and a bottom surface of the encapsulant layer 68 (Fig. 10).
In re Claim 4, Fisher discloses the semiconductor device of claim 1, wherein the shielding layer 82 covers entirely the internal surface of the aperture (the space between sidewalls 76) (Fig. 10).
In re Claim 9, Fisher discloses the semiconductor device of claim 1, wherein the shielding layer 82 extends continuously between the encapsulant layer 68 and the opening 74 (Fig. 10).
In re Claim 10, Fisher discloses the semiconductor device of claim 9, wherein the shielding layer 82 covers entirely the encapsulant layer 68, except a bottom surface thereof (Fig. 10).
In re Claim 11, Fisher discloses a method for making a semiconductor device, the method comprising: providing a substrate 56 comprising an interconnection structure 64 and a conductive bar (a left 66) connected to the interconnection structure 64; forming at least one electronic component 86 on the substrate 56; forming an encapsulant layer 68 covering the at least one electronic component 86; removing a portion of the encapsulant layer 68 and a portion of the substrate 56 which is at least partially under the portion of the encapsulant layer 68 to expose at least a portion of the conductive bar (the left 66); depositing a conductive material on the substrate to form a shielding layer 82 on the substrate 56, wherein the shielding layer 82 extends at least partially over the portion of the conductive bar (the left 66) exposed from the encapsulant layer 65 and the substrate 56 to electrically connect with the conductive bar 66 (Figs. 1-10; column 4, line 16 – column 11, line 23).
In re Claim 12, Fisher discloses the method of claim 11, wherein the encapsulant layer 68 is formed to overlap at least partially with the conductive bar 66 (Fig. 9).
In re Claim 16, Fisher discloses the method of claim 11, wherein the substrate 56 comprises a base layer (a lower portion of 68) and a top layer (an upper portion of 68) over the base layer (the lower portion of 68), and wherein the method comprises forming the interconnection structure 64 in the base layer (the lower portion of 68) and disposing the conductive bar (the left 66) on the interconnection structure 64, before forming the top layer (the upper portion of 68) over the base layer (the lower portion of 68) to cover the conductive bar 66 and a conductive pattern (a right 66) (Fig. 10).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Fisher as applied to claim 1 above.
In re Claim 5, Fisher discloses all limitations of Claim 5 including that the opening 74 is adjacent to a sidewall 76 of the encapsulant layer 68 (Fig. 9) except for that the sidewall 76 being angled. The only difference between the Applicant’s Claim 5 and Fisher’s reference is in the specified shape of the sidewall. Due to high level of knowledge and skills of personal capable to operate very sophisticated and expensive equipment in semiconductor technology, it would have been an obvious matter of design choice of one of ordinary skill in the semiconductor art to use the angled sidewall, since such a modification would have involved a mere change in the shape of a component. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (MPEP2144.04.IV.B)
In re Claim 6, Fisher discloses all limitations of Claim 6 except for that the side surface 76 of the encapsulant layer 68 comprises an upper side surface and a lower side surface, and the lower side surface has a slope angle larger than a slope angle of the upper side surface.
The only difference between the Applicant’s Claim 6 and Fisher’s reference is in the specified shape of the encapsulant layer 68. Due to high level of knowledge and skills of personal capable to operate very sophisticated and expensive equipment in semiconductor technology, it would have been an obvious matter of design choice of one of ordinary skill in the semiconductor art to use the specified shape of the sidewall, since such a modification would have involved a mere change in the shape of a component. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (MPEP2144.04.IV.B).
In re Claim 7, Fisher discloses all limitations of Claim 7 except for that the side surface 76 of the encapsulant layer 68 comprises an upper side surface and a lower side surface, and the lower side surface is perpendicular with regard to a bottom surface of the encapsulant layer 68.
The only difference between the Applicant’s Claim 7 and Fisher’s reference is in the specified shape of the encapsulant layer 68. Due to high level of knowledge and skills of personal capable to operate very sophisticated and expensive equipment in semiconductor technology, it would have been an obvious matter of design choice of one of ordinary skill in the semiconductor art to use the specified shape of the sidewall, since such a modification would have involved a mere change in the shape of a component. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (MPEP2144.04.IV.B).
In re Claim 8, Fisher discloses all limitations of Claim 8 except for that the semiconductor device 86 is a system-in-package (SiP) module, and the semiconductor device 86 comprises, on the substrate 56 and on a side of the opening 74 opposite to the encapsulant layer 68, a board-to-board connector. Regarding claim 8, the phrase “a system-in-package (SiP) module, and the semiconductor device 86 comprises, on the substrate 56 and on a side of the opening 74 opposite to the encapsulant layer 68, a board-to-board connector” merely represents an intended use or a manner in which a claimed apparatus is intended to be employed and does not differentiate the claimed apparatus from a prior art apparatus of Fisher. See MPEP 2114. II. MANNER OF OPERATING THE DEVICE DOES NOT DIFFERENTIATE APPARATUS CLAIM FROM THE PRIOR ART. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987)
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Fisher as applied to claim 11 above.
In re Claim 13, Fisher discloses all limitations of Claim 13 except for that the encapsulant layer 68 is deposited on the substrate 56 using compressive molding, transfer molding or liquid encapsulant molding. It would have been obvious to one of ordinary skill in the art at the time the invention was made to deposit encapsulant layer 68 is deposited on the substrate 56 using compressive molding, transfer molding or liquid encapsulant molding since it was known in the art that molding, transfer molding or liquid encapsulant molding are well-known and routine techniques in semiconductor processes. (MPEP2144.I.)
In re Claim 14, Fisher discloses all limitations of Claim 13 except for that removing the portion of the encapsulant layer and the portion of the substrate by laser cutting. It would have been obvious to one of ordinary skill in the art at the time the invention was made removing encapsulant layer 68 the portion of the encapsulant layer and the portion of the substrate by laser cutting, since it was known in the art that laser cutting is a well-known and routine technique in semiconductor processes. (MPEP2144.I.)
Allowable Subject Matter
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reason for indicating allowable subject matter
In re Claim 15: The prior art of record cited by the current office action, alone or in combination, fail to anticipate or render obvious such limitation of claim 15 as: “providing on the substrate, on a side of the portion of the conductive bar exposed from the encapsulant layer and the substrate opposite to the encapsulant layer, a board-to-board connector”, in combination with limitations of Claim 11 on which it depends.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NIKOLAY K YUSHIN whose telephone number is (571)270-7885. The examiner can normally be reached Monday-Friday (7-7 PST).
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/NIKOLAY K YUSHIN/Primary Examiner, Art Unit 2893