Prosecution Insights
Last updated: April 19, 2026
Application No. 18/471,333

NITRIDE SEMICONDUCTOR DEVICE

Non-Final OA §103§112
Filed
Sep 21, 2023
Examiner
SCHOENHOLTZ, JOSEPH
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co. Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
86%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1179 granted / 1293 resolved
+23.2% vs TC avg
Minimal -5% lift
Without
With
+-5.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
20 currently pending
Career history
1313
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
14.7%
-25.3% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1293 resolved cases

Office Action

§103 §112
DETAILED ACTION This Office Action is in response to Applicant’s application 18/471,333 filed on September 21, 2023 in which claims 1 to 20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings submitted on September 21, 2023 have been reviewed and accepted by the Examiner. Information Disclosure Statement The Information Disclosure Statements (IDS), filed on September 21, 2023. February 20, 2025 and September 16, 2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner. Priority Receipt is acknowledged of paper submitted under 35 U.S.C. 119(a)-(d) or under 35 U.S.C. 120, 121, 365(c), or 386(c) which has been placed of record in the file. Notation References to patents will be in the form of [C:L] where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of [xxxx]. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 4 and 16-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 4 which depends upon claim 1, and recites a total volume of the trench present inside the inactive region is not less than ⅓ of a volume of the substrate inside the inactive region, Examiner notes that the exact boundaries of the ‘inactive region’ can be subjective in so far as in only includes a non-2 DEG region. Hence the volume of the inactive region is subjective. Likewise, the volume of the substrate inside the inactive region depends upon its thickness and the area of the inactive region, which does not appear to be defined by the claim. Thus, it appears to Examiner that the claim depends upon variables not defined or inherent in the claim and thus indefinite. Regarding claim 16 which depends upon claim 2, wherein a total volume of the trench present inside the inactive region is not less than ⅓ of a volume of the substrate inside the inactive region the same analysis of claim 4 applies. Regarding claim 17 which depends upon claim 3, wherein a total volume of the trench present inside the inactive region is not less than ⅓ of a volume of the substrate inside the inactive region the same analysis of claim 4 applies. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-9, 12 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2018/0158941 (Birner) and U.S. 2019/0296140 (Yoshimochi). Regarding claim 1 Birner teaches and suggests at annotated Figure 3A a nitride semiconductor device comprising: PNG media_image1.png 454 750 media_image1.png Greyscale a substrate, 71 [0073], that has a first main surface, 72 [0073], and a second main surface, 84 [0075], at an opposite side thereto, as shown; and a nitride epitaxial layer, 75 [0073], that is formed on the first main surface, as shown; and wherein the nitride semiconductor device has, in plan view, an active region, 78 [0073], inside the nitride epitaxial layer, as suggested and/or shown, in which a two-dimensional electron gas can form, as shown and described at [0073], and an inactive region, as annotated, inside the nitride epitaxial layer, as shown, in which the two-dimensional electron gas is not formed, as shown where the 2-deg gas will only form at the 75/76 interface, and comprises: a trench, e.g. via 85 [0049, 75], that in at least the inactive region, as shown, among the active region and the inactive region is dug in the substrate, as shown; and an embedded metal, 86 [0075, 90], that is formed inside the trench. Arguably, Birner does not teach the trench is dug in from the second main surface of the substrate toward the first main surface of the substrate. PNG media_image2.png 584 667 media_image2.png Greyscale Yoshimochi is directed to nitride devices using trenches. Yoshimochi discloses at annotated Figure 13, a substrate, 2 [0049], that has a first main surface, 2a [0060], and a second main surface, 2b [0060], at an opposite side thereto, as shown; and a nitride epitaxial layer, 4 [0047, 51]m that is formed on the first main surface, as shown; and wherein the nitride semiconductor device has, in plan view, an active region, 15 [0053], inside the nitride epitaxial layer, as shown, in which a two-dimensional electron gas can form, as shown and described at [0053], and an inactive region, depletion region as annotated, inside the nitride epitaxial layer, as shown, in which the two-dimensional electron gas is not formed, as shown, and comprises: a trench, 31 [0060], that, in at least the inactive region, as annotated and shown, among the active region and the inactive region, as shown, is dug in from the second main surface of the substrate toward the first main surface of the substrate, as described at [0060]; and an embedded metal, 32 [0096], that is formed inside the trench, as shown. PNG media_image3.png 410 476 media_image3.png Greyscale Taken as a whole the prior art is directed to nitride devices using trenches in inactive regions of the device. Yoshimochi teaches that Birner’s device may be configured with a trench which is dug in from the second main surface of the substrate toward the first main surface of the substrate. An artisan would find it desirable to utilize a known method of making a trench in a nitride device, which Yoshimochi teaches includes forming (digging) the trench from the back to front side of the device. Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the device of claim 1 wherein the trench is dug in from the second main surface of the substrate toward the first main surface of the substrate, as taught by Yoshimochi, because Yoshimochi teaches this is a useful way to make the trench for the device of claim 1 and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Regarding claim 2 which depends upon claim 1, Birner teaches the trench is formed in just the inactive region among the active region and the inactive region. Regarding claim 3 which depends upon claim 1, Yoshimochi teaches the trench is formed in both the active region and the inactive region. Regarding claims 4 and 16-17 which depends upon claims 1, 3 and 2, Birner suggests a total volume of the trench present inside the inactive region is not less than ⅓ of a volume of the substrate inside the inactive region, i.e. it penetrates the entire substrate. Regarding claim 5 which depends upon claim 1, Birner suggests a lead-out metal, conductive layer 87 [0075], that is formed on the second main surface, as shown, and is thermally connected to the embedded metal, as shown. Yoshimochi teaches a lead-out metal, 33 [0079, 98], that is formed on the second main surface, as shown, and is thermally connected to the embedded metal, as shown. Regarding claim 6 which depends upon claim 1, Yoshimochi teaches the trench is dug in from the second main surface toward the first main surface and up to an intermediate portion of the substrate, as shown. Regarding claim 7 which depends upon claim 1, Birner teaches the trench penetrates through the substrate and reaches the nitride epitaxial layer. Regarding claim 8 which depends upon claim 1, Birner teaches an alternative embodiment of his device at Figure 3b which includes a source electrode, 79 [0074]; a drain electrode, 80 [0074]; and a gate electrode, 81 [0074], that are disposed on the nitride epitaxial layer, 75 as shown; and a contact metal, 92 [0078], that penetrates PNG media_image4.png 343 477 media_image4.png Greyscale through the nitride epitaxial layer, 75, and electrically connects the source electrode, 79, and the embedded metal, 91 [0078]. Regarding claim 9 which depends upon claim 1, Yoshimochi discloses the nitride epitaxial layer comprises: a first nitride semiconductor layer, 4 [0050], that constitutes an electron transit layer and a second nitride semiconductor layer, 5 [51-53] that is formed on the first nitride semiconductor layer, constitutes an electron supply layer, and is higher in bandgap than the first nitride semiconductor layer, as described. Regarding claim 12 which depends upon claim 9, Yoshimochi teaches the first nitride semiconductor layer is constituted of a GaN layer, [0051], and the second nitride semiconductor layer is constituted of an AlGaN layer at [0052]. Regarding claims 18-20 which depend upon claim 2, 3 and 4, Birner teaches a lead-out metal, 87 [ 0049, 75], that is formed on the second main surface and is thermally connected to the embedded metal. Claims 10-11 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Birner, Yoshimochi, U.S. 2021/0226040 (Yeh) and U.S. 2020/0176400 (Chikamatsu). Regarding claim 10 which depends upon claim 9, Birner does not teach a semi-insulating nitride layer that is disposed between the substrate and the first nitride semiconductor layer and with which an acceptor concentration is higher than a donor concentration. Yeh is directed to GaN HEMT devices. At annotated Figure 17, Yeh teaches a semi-insulating nitride layer, 103 [0014-15], that is disposed between the substrate, 101 [011, 41], and the first nitride semiconductor layer, 104 [0015]. At [0015], Yeh teaches “In some embodiments, the III-V compound layer 301 improves leakage and breakdown performances of the HEMT device 100”. PNG media_image5.png 629 650 media_image5.png Greyscale Yeh does not teach the semi insulating layer has an acceptor concentration is higher than a donor concentration. Chikamatsu is directed to GaN devices using semi-insulating nitride semiconductors. At [00153], Chikamatsu teaches that a semi-insulating property of a GaN layer arises when an acceptor concentration is higher than a donor concentration. Taken as a whole the prior art is directed to nitride semiconductor devices. Yeh teaches the addition of a semi-insulating nitride layer between the substrate and the channel improves (decreases) leakage current and breakdown performance. Chikamatsu teaches that when the acceptor concentration is greater than the donor concentration in a GaN material, a semi-insulating property may be produced. Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the device of claim 9 with a semi-insulating nitride layer that is disposed between the substrate and the first nitride semiconductor layer, as taught by Yeh, to improve leakage current and breakdown voltage, as taught by Yeh, and with which an acceptor concentration is higher than a donor concentration. Chikamatsu, to ensure the GaN is semi-insulating and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Regarding claim 11 which depends upon claim 10, Yeh teaches a buffer layer, 103 e.g., AlN [0011], that is disposed between the substrate, 101, and the semi-insulating nitride layer, 103, and is constituted of a nitride semiconductor, i.e., AlN. Regarding claim 13 which depends upon claim 10, Yeh teaches the first nitride semiconductor layer is constituted of a GaN layer, [0015], the second nitride semiconductor layer is constituted of an AlGaN layer, [0017], and the semi-insulating nitride layer is constituted of a GaN layer that contains carbon [0014]. Regarding claim 14 which depends upon claim 11, Yeh teaches the first nitride semiconductor layer is constituted of a GaN layer, [0015], the second nitride semiconductor layer is constituted of an AlGaN layer, [0017], the semi-insulating nitride layer is constituted of a GaN layer that contains carbon, [0014],and the buffer layer is constituted of a laminated film of an AlN layer, 103, formed on the first main surface and an AlGaN layer, 201a [0012], that is laminated on the AlN layer. Regarding claim 15 which depends upon claim 11, Yeh teaches the first nitride semiconductor layer is constituted of a GaN layer, [0015], the second nitride semiconductor layer is constituted of an AlGaN layer, [0017], the semi-insulating nitride layer is constituted of a GaN layer that contains carbon, [0014], and the buffer layer is constituted of an AlN layer or an AlGaN layer [0011-12]. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed on the notice of references cited. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joe Schoenholtz whose telephone number is (571)270-5475. The examiner can normally be reached M-Thur 7 AM to 7 PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ms. Yara Green can be reached at (571) 272-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.E. Schoenholtz/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Sep 21, 2023
Application Filed
Dec 14, 2025
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
86%
With Interview (-5.0%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 1293 resolved cases by this examiner. Grant probability derived from career allow rate.

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