Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(g)(1) during the course of an interference conducted under section 135 or section 291, another inventor involved therein establishes, to the extent permitted in section 104, that before such person’s invention thereof the invention was made by such other inventor and not abandoned, suppressed, or concealed, or (2) before such person’s invention thereof, the invention was made in this country by another inventor who had not abandoned, suppressed, or concealed it. In determining priority of invention under this subsection, there shall be considered not only the respective dates of conception and reduction to practice of the invention, but also the reasonable diligence of one who was first to conceive and last to reduce to practice, from a time prior to conception by the other.
A rejection on this statutory basis (35 U.S.C. 102(g) as in force on March 15, 2013) is appropriate in an application or patent that is examined under the first to file provisions of the AIA if it also contains or contained at any time (1) a claim to an invention having an effective filing date as defined in 35 U.S.C. 100(i) that is before March 16, 2013 or (2) a specific reference under 35 U.S.C. 120, 121, or 365(c) to any patent or application that contains or contained at any time such a claim.
Claim(s) 1, 4, 5, and 7-9 is/are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Dhandapani (US 20220379431 A1).
Regarding claim 1, Dhandapani teaches a wafer polishing method, comprising:
Calculating a wear profile of a polishing pad (200, processing pad has same function of the claimed polishing pad) using operation parameters of a pad conditioner (142) [¶0040];
Generating a regression model for the wear profile of the polishing pad [¶¶0044 and 0045, resulting matrix can be seen as regression model]; and
controlling the pad conditioner to condition the polishing pad based on the regression model [¶0070, said to be used to run and execute one or more processes].
Regarding claim 4, Dhandapani teaches the wafer polishing method of claim 1, wherein the calculating of the wear profile of the polishing pad comprises calculating a thickness of the polishing pad for at least one predefined location on the polishing pad [¶0035].
Regarding claim 5, Dhandapani teaches the wafer polishing method of claim 1, wherein the calculating of the wear profile of the polishing pad comprises calculating a variation in the wear of the polishing pad in accordance with a process weight [¶0067, utilizes weight estimates].
Regarding claim 7, Dhandapani teaches the wafer polishing method of claim 1, wherein the operation parameters include a residence time of the pad conditioner in each of a plurality of regions of the polishing pad [¶0009].
Regarding claim 8, Dhandapani teaches the wafer polishing method of claim 1, further comprising: calculating an optimal polishing recipe using a target wear profile of the polishing pad and the regression model [¶0058].
Regarding claim 9, Dhandapani teaches the wafer polishing method of claim 8, wherein the calculating of the optimal polishing recipe comprises repeatedly performing calculation until a difference between a wear profile corresponding to the optimal polishing recipe obtained using the regression model and the target wear profile becomes substantially equal to or less than a threshold value [¶¶0058-0060].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2, 3, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhandapani (US 20220379431 A1) in view of Chang et al. (US 20100035518 A1).
Regarding claim 2, Dhandapani teaches the wafer polishing method of claim 1.
Dhandapani doesn’t teach the generation of an image visualizing the wear profile of the polishing pad.
Chang et al. teaches generating an image visualizing the wear profile of the polishing pad [¶0007, wear can be seen by the thickness of the polishing pad].
It would have been obvious to a person of ordinary skill in the art before the effective filing date to combine the wafer polishing method of Dhandapani with the image visualization of Chang et al. because it would allow for the polishing pad to be topographically seen and have better representation of the wear of the polishing pad.
Regarding claim 3, Dhandapani in view of Chang et al. teaches the wafer polishing method of claim 2, wherein the image included a color corresponding to a thickness of the polishing pad at a predefined location on the polishing pad [Chang et al., ¶0007].
Regarding claim 20, Dhandapani teaches a wafer polishing method comprising:
calculating a wear profile of a polishing pad using a first polishing recipe [¶0058], which includes operation parameters of a pad conditioner, and a variation in the polishing pad in accordance with a process weight [¶0067];
generating a regression model for the wear profile of the polishing pad [¶¶0044 and 0045, resulting matrix can be seen as regression model];
calculating a second polishing recipe using a target wear profile of the polishing pad and the regression model [¶0074]; and
controlling at least one of the pad conditioner or the polishing pad based on at least one of the regression model or the second polishing recipe [¶0075].
Dhandapani doesn’t teach generating an image visualizing the wear profile of the polishing pad.
Chang et al. teaches generating an image visualizing the wear profile of the polishing pad [¶0007, wear can be seen by the thickness of the polishing pad].
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the wafer polishing method of Dhandapani with the image visualization of a wear profile as taught by Chang et al. because it would allow for the polishing pad to be topographically seen to have a clear understanding of the wear profile of the polishing pad.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhandapani in view of Sato et al. (US 20140378031 A1).
Regarding claim 6, Dhandapani teaches the wafer polishing method of claim 5.
Dhandapani doesn’t teach wherein the process weight includes information regarding a chemical reaction occurring on the polishing pad and a temperature of a polishing process.
Sato et al. teaches the process weight including information regarding a chemical reaction occurring on the polishing pad and a temperature of a polishing process [¶¶0045 and 0068].
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the wafer polishing method of Dhandapani with the information regarding a chemical reaction and temperature of a polishing process because the weight is a factor that would affect the reaction that would occur and the temperature that would need to be set during the polishing process.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhandapani in view of Miyazaki (US 20200353585 A1).
Regarding claim 10, Dhandapani teaches the wafer polishing method of claim 1.
Dhandapani doesn’t teach calculating a wear profile of a wafer.
Miyazaki teaches calculating a wear profile of a wafer to be polished with the polishing pad [¶¶0005 and 0098].
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the wafer polishing method of Dhandapani with the calculating a wear profile of a wafer as taught by Miyazaki because this would allow for the prediction of material removal rates and the optimization of final wafer flatness.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NOOR MOHAMMAD ISMAIL TAHIR whose telephone number is (571)272-6166. The examiner can normally be reached Monday Friday, 8 a.m. 5 p.m. ET..
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/NOOR MOHAMMAD ISMAIL TAHIR/ Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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