Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1-24 are pending in this application.
Applicant’s election without traverse of Group I (claims 1-20) in the reply filed on March 25, 2026 is acknowledged.
Claims 21-24 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on March 25, 2026.
The Examiner notes that claims 1-20 are examined and claims 21-24 are withdrawn.
Priority
Acknowledgement is made to claim of priority to Japanese application number 2022-182712 filed November 15, 2022. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hara (US 7,973,363 B2).
With respect to claim 1, Hara teaches in Fig. 2:
A semiconductor device (IGBT 100) including a semiconductor substrate (substrate 14) which has an upper surface and a lower surface and includes a drift region (drift layer 16) of a first conductivity type (n-type), comprising:
an upper surface electrode (emitter electrode 2) arranged above the upper surface of the semiconductor substrate;
an active portion (portion of substrate in “Active Region” of Fig. 2) arranged below the upper surface electrode (2) in the semiconductor substrate (14);
and an edge termination structure portion (“peripheral region” outside body region 4 defined by guard rings 10) arranged between the upper surface electrode and an end side of the semiconductor substrate in a top view (top view shown in Fig. 1), in the semiconductor substrate,
wherein the active portion (“active region”) includes an active collector region (portion of collector layer 20 in active region) of a second conductivity type (p-type),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
the edge termination structure portion includes an edge collector region of the second conductivity type (portion of 20 within peripheral region.),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
an integrated value of a carrier concentration of the active collector region in a depth direction of the semiconductor substrate is larger than an integrated value of a carrier concentration of the edge collector region in the depth direction (col 7 ln. 62-67 “By making the thickness of the collector layer 20 smaller in the peripheral region, the number of carriers injected from the collector layer 20 into the drift layer 16 of the peripheral region can be made smaller than the number of carriers injected from the collector layer 20 into the drift layer 16 of the active region”),
and an upper end position of the active collector region in the depth direction and an upper end position of the edge collector region in the depth direction differ (see Fig. 2, 20 extends to a greater height in the active region than the peripheral region).
With respect to claim 2, Hara further teaches:
wherein the upper end position of the active collector region is farther away from the lower surface of the semiconductor substrate than the upper end position of the edge collector region (col 7, lns. 60-62 “A thickness H of the collector layer 20 in the peripheral region is smaller than a thickness D of the collector layer 20 in the active region”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Hara (US 7,973,363 B2) as applied to independent claim 1 above and in view of Nakamura (US 2022/0285537 A1) and Chen (US 2014/0197451 A1).
With respect to claim 3, Hara teaches all limitations of independent claim 1 upon which claim 3 depends. Hara fails to teach:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
the edge collector region has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
and at least one of the active peaks is arranged farther away from the lower surface than any of the edge peaks.
Nakamura teaches in Figs. 2-3:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 3, 16A and 16B are the active collector region layers and are each shown to have a peak in dopant concentration),
Chen teaches:
the edge collector region (collector region 24) has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type (p-type) in the depth direction (Fig. 21 shows the impurity concentration in the depth direction, the line along EE’ includes a peak in the edge collector region),
Hara modified by Nakamura such that the active collector region has two peaks and modified by Chen such that the edge collector region has one peak teaches:
and at least one of the active peaks is arranged farther away from the lower surface than any of the edge peaks (Chen teaches that the peaks closest to the bottom edge are in the same location, see Fig. 21. Nakamura teaches that there is a second peak in the active region (16B) further than the location of the first peak (16a).)
Hara discloses the claimed invention except for the peaks within the collector region. Nakamura teaches that it is known to that it is known to include multiple peaks within the active collector region and Chen teaches that it is known to include a peak in the edge collector region at the same depth as the peak in the active collector region closest to the bottom of the substrate. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
With respect to claim 4, Hara teaches all limitations of independent claim 1 upon which claim 4 depends. Hara fails to teach:
the active collector region has two or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
the edge collector region has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
a number of the active peaks is larger than a number of the edge peaks.
Nakamura teaches in Figs. 2-3:
the active collector region has two or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 3, 16A and 16B are the active collector region layers and are each shown to have a peak in dopant concentration),
Chen teaches:
the edge collector region (collector region 24) has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type (p-type) in the depth direction (Fig. 21 shows the impurity concentration in the depth direction, the line along EE’ includes a peak in the edge collector region),
Hara modified by Nakamura such that the active collector region has two peaks and modified by Chen such that the edge collector region has one peak teaches:
a number of the active peaks is larger than a number of the edge peaks (Nakamura teaches two peaks but only in the active region. Chen teaches once edge peak).
Hara discloses the claimed invention except for the peaks within the collector region. Nakamura teaches that it is known to that it is known to include multiple peaks within the active collector region and Chen teaches that it is known to include a peak in the edge collector region at the same depth as the peak in the active collector region closest to the bottom of the substrate. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
Claims 5-8 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Hara (US 7,973,363 B2) as applied to independent claim 1 above and in view of Chen (US 2014/0197451 A1) and Nishimura (US 2017/0345817 A1).
With respect to claim 5, Hara teaches all limitations of independent claim 1 upon which claim 5 depends. Hara fails to teach:
an average value of activation rates of a dopant in the active collector region and an average value of activation rates of a dopant in the edge collector region differ.
Chen teaches that the edge collector region (24, impurity concentration shown along line EE’ in Fig. 21) has a lower impurity concentration than the active collector region (23, impurity concentration shown along line FF’ in Fig. 21) and that the purpose of the layer is to suppress leakage current and suppress carrier concentration in the termination region (para. 60-61). Nishimura teaches that lowering an activation rate by using heat treatment for a low activation rate also reduces carrier concentration and improves avoidance of parasitic operation.
Hara modified in view of the teachings of Chen to reduce carrier concentration in the termination region compared to the active region and the teachings of Nishimura that reducing the activation rate leads to reduced carrier concentration renders obvious:
an average value of activation rates of a dopant in the active collector region and an average value of activation rates of a dopant in the edge collector region differ.
Hara discloses the claimed invention except for the activation rates in the active collector region and edge collector region being different. Chen teaches that it is beneficial to have a lower carrier concentration rate in the edge region and Nishimura teaches that a lower carrier concentration can be achieved with a reduced activation rate. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of reducing carrier concentration and improving avoidance of parasitic operation (para. 60 of Nishimura). See MPEP 2144.
With respect to claim 6, Hara/Chen/Nishimura further teaches:
the average value of the activation rates of the dopant in the active collector region is higher than the average value of the activation rates of the dopant in the edge collector region (Chen teaches that it is beneficial to have lower carrier concentration in the edge/termination region, Nishimura teaches that lowering the activation rate in a region reduces the carrier concentration).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Hara in view of Chen and Nishimura as explained above.
With respect to claim 7, Hara teaches all limitations of independent claim 1 upon which claim 7 depends. Hara fails to teach:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
the edge collector region has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
and an activation rate of the dopant is 10% or less in at least one peak out of the one or more active peaks and the one or more edge peaks.
Chen teaches in Fig. 21-22:
the active collector region (collector region 23) has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 22, line along FF’ includes the peak of the collector region 23),
the edge collector region (collector region 24) has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 22, line along EE’ includes the peak of the collector region 24),
Chen teaches that the edge collector region (24, impurity concentration shown along line EE’ in Fig. 21) has a lower impurity concentration than the active collector region (23, impurity concentration shown along line FF’ in Fig. 21) and that the purpose of the layer is to suppress leakage current and suppress carrier concentration in the termination region (para. 60-61). Nishimura teaches that lowering an activation rate by using heat treatment for a low activation rate also reduces carrier concentration and improves avoidance of parasitic operation.
Hara modified in view of the teachings of Chen to reduce carrier concentration in the termination region compared to the active region and the teachings of Nishimura that reducing the activation rate leads to reduced carrier concentration renders obvious:
and an activation rate of the dopant is 10% or less in at least one peak out of the one or more active peaks and the one or more edge peaks (para. 60 of Nishimuri “the dopant has an activation rate of less than 1%”).
Hara discloses the claimed invention except for the activation rates in the active collector region and edge collector region being different. Chen teaches that it is beneficial to have a lower carrier concentration rate in the edge region and Nishimura teaches that a lower carrier concentration can be achieved with a reduced activation rate of 1%. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of reducing carrier concentration and improving avoidance of parasitic operation (para. 60 of Nishimura). See MPEP 2144.
With respect to claim 8, Hara/Chen/Nishimuri further teaches:
the activation rate is 10% or less in at least one of the edge peaks (Chen teaches a lower carrier concentration is beneficial in the edge/termination region, Nishimuri teaches an activation rate of 1% to reduce carrier concentration).
It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Hara in view of Chen and Nishimura as explained above.
With respect to claim 18, Hara teaches in Fig. 2:
A semiconductor device (IGBT 100) including a semiconductor substrate (substrate 14) which has an upper surface and a lower surface and includes a drift region (drift layer 16) of a first conductivity type (n-type), comprising:
an upper surface electrode (emitter electrode 2) arranged above the upper surface of the semiconductor substrate;
an active portion (portion of substrate in “Active Region” of Fig. 2) arranged below the upper surface electrode (2) in the semiconductor substrate (14);
and an edge termination structure portion (“peripheral region” outside body region 4 defined by guard rings 10) arranged between the upper surface electrode and an end side of the semiconductor substrate in a top view (top view shown in Fig. 1), in the semiconductor substrate,
wherein the active portion (“active region”) includes an active collector region (portion of collector layer 20 in active region) of a second conductivity type (p-type),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
the edge termination structure portion includes an edge collector region of the second conductivity type (portion of 20 within peripheral region.),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
Hara fails to teach:
an average value of activation rates of a dopant in the active collector region and an average value of activation rates of a dopant in the edge collector region differ.
Chen teaches that the edge collector region (24, impurity concentration shown along line EE’ in Fig. 21) has a lower impurity concentration than the active collector region (23, impurity concentration shown along line FF’ in Fig. 21) and that the purpose of the layer is to suppress leakage current and suppress carrier concentration in the termination region (para. 60-61). Nishimura teaches that lowering an activation rate by using heat treatment for a low activation rate also reduces carrier concentration and improves avoidance of parasitic operation.
Hara modified in view of the teachings of Chen to reduce carrier concentration in the termination region compared to the active region and the teachings of Nishimura that reducing the activation rate leads to reduced carrier concentration renders obvious:
an average value of activation rates of a dopant in the active collector region and an average value of activation rates of a dopant in the edge collector region differ.
Hara discloses the claimed invention except for the activation rates in the active collector region and edge collector region being different. Chen teaches that it is beneficial to have a lower carrier concentration rate in the edge region and Nishimura teaches that a lower carrier concentration can be achieved with a reduced activation rate. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of reducing carrier concentration and improving avoidance of parasitic operation (para. 60 of Nishimura). See MPEP 2144.
With respect to claim 19, Hara teaches in Fig. 2:
A semiconductor device (IGBT 100) including a semiconductor substrate (substrate 14) which has an upper surface and a lower surface and includes a drift region (drift layer 16) of a first conductivity type (n-type), comprising:
an upper surface electrode (emitter electrode 2) arranged above the upper surface of the semiconductor substrate;
an active portion (portion of substrate in “Active Region” of Fig. 2) arranged below the upper surface electrode (2) in the semiconductor substrate (14);
and an edge termination structure portion (“peripheral region” outside body region 4 defined by guard rings 10) arranged between the upper surface electrode and an end side of the semiconductor substrate in a top view (top view shown in Fig. 1), in the semiconductor substrate,
wherein the active portion (“active region”) includes an active collector region (portion of collector layer 20 in active region) of a second conductivity type (p-type),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
the edge termination structure portion includes an edge collector region of the second conductivity type (portion of 20 within peripheral region.),
which is arranged between the lower surface and the drift region (16) in the semiconductor substrate,
Hara fails to teach:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
the edge collector region has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction,
and an activation rate of the dopant is 10% or less in at least one peak out of the one or more active peaks and the one or more edge peaks.
Chen teaches in Fig. 21-22:
the active collector region (collector region 23) has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 22, line along FF’ includes the peak of the collector region 23),
the edge collector region (collector region 24) has one or more edge peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 22, line along EE’ includes the peak of the collector region 24),
Chen teaches that the edge collector region (24, impurity concentration shown along line EE’ in Fig. 21) has a lower impurity concentration than the active collector region (23, impurity concentration shown along line FF’ in Fig. 21) and that the purpose of the layer is to suppress leakage current and suppress carrier concentration in the termination region (para. 60-61). Nishimura teaches that lowering an activation rate by using heat treatment for a low activation rate also reduces carrier concentration and improves avoidance of parasitic operation.
Hara modified in view of the teachings of Chen to reduce carrier concentration in the termination region compared to the active region and the teachings of Nishimura that reducing the activation rate leads to reduced carrier concentration renders obvious:
and an activation rate of the dopant is 10% or less in at least one peak out of the one or more active peaks and the one or more edge peaks (para. 60 of Nishimuri “the dopant has an activation rate of less than 1%”).
Hara discloses the claimed invention except for the activation rates in the active collector region and edge collector region being different. Chen teaches that it is beneficial to have a lower carrier concentration rate in the edge region and Nishimura teaches that a lower carrier concentration can be achieved with a reduced activation rate of 1%. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of suppressing a leakage current in a reverse withstand voltage mode (para. 60 of Chen) and for the purpose of reducing carrier concentration and improving avoidance of parasitic operation (para. 60 of Nishimura). See MPEP 2144.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Hara (US 7,973,363 B2) as applied to independent claim 1 above and in view of Nakamura (US 2022/0285537 A1) and Nishimura (US 2017/0345817 A1).
With respect to claim 9, Hara teaches all limitations of claim 1 upon which claim 9 depends. Hara fails to teach:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction, and an activation rate of the dopant is 10% or less in at least one of the active peaks.
Nakamura teaches in Figs. 2-3:
the active collector region has one or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 3, peaks of 16a and 16b are p-type collector region peaks),
Nishimura teaches in Fig. 3:
and an activation rate of the dopant is 10% or less in at least one of the active peaks (para. 60 teaches a P collector layer 2 with an activation rate of less than 1%. Fig. 3 shows that this is in the active region).
Hara discloses the claimed invention except for the peaks within the collector region. Nakamura teaches that it is known to that it is known to include peaks within the active collector region and Nishimura teaches that it is known to have a peak of the active collector region with activation below 10%. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of improving avoidance of parasitic operation of the circuit region (para. 60 of Nishimura) and for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Hara (US 7,973,363 B2) as applied to independent claim 1 above and in view of Nakamura (US 2022/0285537 A1) and Queirolo (Journal of Electronic Materials, 1991).
With respect to claim 10, Hara teaches all limitations of independent claim 1 upon which claim 10 depends. Hara fails to teach:
the active collector region has two or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction, and the two or more active peaks include two of the active peaks having different activation rates of the dopant.
Nakamura teaches in Figs. 2-3:
the active collector region has two or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in the depth direction (see Fig. 3, peaks of 16a and 16b are p-type collector region peaks),
Queirolo teaches that it is known that activation processes that involve annealing of BF2 dopants is not constant along a depth direction. (see Fig. 5 for carrier concentration and Fig. 2 for chemical concentration). It would be obvious to the ordinary artisan to use an activation process for the dopants that inherently leads to different activation rates and the ordinary artisan would understand that variation in activation rates along a depth profile would be expected to occur at least some of the time due to manufacturing process tolerances. Therefore, Hara modified by Nakamura in view of Queirolo teaches:
and the two or more active peaks include two of the active peaks having different activation rates of the dopant.
Hara discloses the claimed invention except for the peaks within the collector region and their activation rates. Nakamura teaches that it is known to that it is known to include peaks within the active collector region. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
It would have been obvious to one to one of ordinary skill in the art at the time of the invention to use an annealing process to activate the dopants of Nakamura that results in peaks having different activation rates of dopant. Although Nakamura does not specify whether the low temperature annealing process described in para. 110 results in different activation rates, the process is similar to the annealing described in Queirolo which results in depth dependent activation and using the similar process of Queirolo would have yielded the predictable result of the peaks having different activation rates to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claims 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Hara (US 7,973,363 B2) as applied to independent claim 1 above and in view of Nakamura (US 2022/0285537 A1).
With respect to claim 13-14, Hara teaches all limitations of claim 1 upon which claim 13 depends. Hara fails to teach:
Claim 13: the edge collector region contains fluorine.
Claim 14: the active collector region contains fluorine.
Nakamura teaches that it is known for the p-doping of the collector region to use BF2 as the dopant (para. 61.) Modifying Hara by Nakamura to use BF2 as the p-type dopant in the collector region teaches:
the edge collector region contains fluorine.
the active collector region contains fluorine.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to include fluorine in the edge and active collector regions by using BF2 as the p-type dopant, since it has been held to be within the general skill of worker in the art to select known material on the basis of its suitability for the intended use as a matter of obvious design variation and choice. In re Leshin, 125 USPQ 416.
With respect to claim 15, Hara teaches all limitations of claim 1 upon which claim 15 depends. Hara fails to teach:
the active collector region has a first carrier concentration peak and a second carrier concentration peak that is arranged farther away from the lower surface than the first carrier concentration peak and has a higher concentration than the first carrier concentration peak.
Nakamura teaches in Figs 2-3:
the active collector region has a first carrier concentration peak (peak corresponding to 16A) and a second carrier concentration peak (peak corresponding to 16B) that is arranged farther away from the lower surface than the first carrier concentration peak and has a higher concentration than the first carrier concentration peak (see Fig. 3)
Hara discloses the claimed invention except for the peaks within the collector region and their activation rates. Nakamura teaches that it is known to that it is known to include peaks within the active collector region with different widths. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
With respect to claim 16, Hara teaches all limitations of claim 1 upon which claim 16 depends. Hara fails to teach:
the active collector region has a first carrier concentration peak and a second carrier concentration peak arranged farther away from the lower surface than the first carrier concentration peak,
and a peak width of the second carrier concentration peak is 2 times or more of a peak width of the first carrier concentration peak.
Nakamura teaches:
the active collector region has a first carrier concentration peak and a second carrier concentration peak arranged farther away from the lower surface than the first carrier concentration peak, and (see Fig. 3, peaks of 16a and 16b are p-type collector region peaks),
a peak width of the second carrier concentration peak is 2 times or more of a peak width of the first carrier concentration peak. (see Fig. 3, the peak width of 16B is at least two times as wide as the peak with for 16A).
Hara discloses the claimed invention except for the peaks within the collector region and their activation rates. Nakamura teaches that it is known to that it is known to include peaks within the active collector region with different widths. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
With respect to claim 17, Hara teaches all limitations of independent claim 1 upon which claim 17 depends. Hara further teaches:
the semiconductor substrate includes a buffer region (buffer layer 18) of the first conductivity type (n-type), which is arranged in contact with an upper end of the active collector region (20) and has one or more carrier concentration peaks in the depth direction
Hara fails to teach:
the semiconductor substrate includes a buffer region of the first conductivity type, which has one or more carrier concentration peaks in the depth direction
wherein the active collector region has two or more carrier concentration peaks in the depth direction,
and a carrier concentration of the carrier concentration peak closest to the buffer region out of the carrier concentration peaks of the active collector region is 10 times or more of a carrier concentration of the carrier concentration peak closest to the active collector region out of the carrier concentration peaks of the buffer region.
Nakamura teaches in Fig. 2-3:
the semiconductor substrate includes a buffer region (n-type buffer layers 3A and 3B) of the first conductivity type (n-type), which has one or more carrier concentration peaks in the depth direction (see Fig. 3, peaks for 3A and 3B)
wherein the active collector region has two or more carrier concentration peaks in the depth direction (peaks in 16A and 16B, see Fig. 3)
and a carrier concentration of the carrier concentration peak closest to the buffer region (peak in 16B) out of the carrier concentration peaks of the active collector region is 10 times or more of a carrier concentration of the carrier concentration peak closest to the active collector region out of the carrier concentration peaks of the buffer region (peak of 3A). (para. 59 teaches that the concentration of impurities in 3A is between 1 x 1016 and 5 x 1016 atoms/cm3. Para. 61 teaches that the concentration of impurities in 16B is between 1 x 1016 and 1 x 1020 atoms/cm3.)
The ranges of concentrations taught by Nakamura includes a difference of up to 10000 times more impurity concentration for the peak of the active region closest to the buffer region. Therefore, the ranges taught overlap with the claimed ranges. in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Hara discloses the claimed invention except for the peaks within the collector region and their activation rates. Nakamura teaches that it is known to that it is known to include peaks in the buffer layer with smaller concentration than the peaks of the active layer. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to design a collector region with peaks as claimed for the purpose of improving contact properties with the collector electrode and controlling carrier injection efficiency while preventing mutual interference (para. 65 of Nakamura). See MPEP 2144.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Nakamura (US 2022/0285537 A1) and Queirolo (Journal of Electronic Materials, 1991).
With respect to claim 20, Nakamura teaches:
A semiconductor device (semiconductor device 101) including a semiconductor substrate (para. 51 describes that layers are a part of a substrate) which has an upper surface and a lower surface and includes a drift region (drift layer 1) of a first conductivity type (n type),
comprising: an upper surface electrode (emitter electrode 6) arranged above the upper surface of the semiconductor substrate;
and an active portion (active cell region 41) arranged below the upper surface electrode in the semiconductor substrate,
wherein the active portion includes an active collector region (collector layers 16A and 16B) of a second conductivity type (p type), which is arranged between the lower surface and the drift region (1) in the semiconductor substrate,
the active collector region has two or more active peaks that are each a chemical concentration peak of a dopant of the second conductivity type in a depth direction of the semiconductor substrate (see Fig. 3, 16A and 16B each have a peak),
Nakamura does not teach:
and the two or more active peaks include two of the active peaks having different activation rates of the dopant.
Queirolo teaches that it is known that activation processes that involve annealing of BF2 dopants is not constant along a depth direction. (see Fig. 5 for carrier concentration and Fig. 2 for chemical concentration). It would be obvious to the ordinary artisan to use an activation process for the dopants that inherently leads to different activation rates and the ordinary artisan would understand that variation in activation rates along a depth profile would be expected to occur at least some of the time due to manufacturing process tolerances. Therefore, Nakamura in view of Queirolo teaches:
and the two or more active peaks include two of the active peaks having different activation rates of the dopant.
It would have been obvious to one to one of ordinary skill in the art at the time of the invention to use an annealing process to activate the dopants of Nakamura that results in peaks having different activation rates of dopant. Although Nakamura does not specify whether the low temperature annealing process described in para. 110 results in different activation rates, the process is similar to the annealing described in Queirolo which results in depth dependent activation and using the similar process of Queirolo would have yielded the predictable result of the peaks having different activation rates to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Allowable Subject Matter
Claims 11-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 11-12, prior art of record does not fairly disclose or make obvious the claimed device as a whole. Specifically, the closest prior art (which has been made of record) fail to disclose (by themselves or in combination) the limitations “of the activation rates in the two of the active peaks differ by 10 times or more” of claim 11 in combination with the additionally claimed features, as are claimed by the Applicant.
Regarding claim 12, prior art fails to disclose the limitation “the activation rate in any one of the two or more active peaks is lower than the activation rate in the active peak arranged at a position farther away from the lower surface than the any one of the two or more active peaks.” Thus, the Applicant’s claims are determined to be novel and non-obvious.
The Examiner considered whether the limitations reciting “activation rate” direct to a product by process claim to determine the patentable weight of the limitations. The Examiner notes that the activation rates of claims 11-12 were examined based on the description in para. 135-136 of the specification to be the ratio of carrier concentration to dopant concentration. This is interpreted to be the percentage of dopant molecules within a given layer of a substrate that enter interstitial sites of a lattice and become donors or acceptors. Since both the numerator and denominator of the activation rate direct to atoms that are physically present in the final product, the Examiner does not consider activation rate to be a product-by-process claim despite directly referencing an activation step in the process of manufacturing.
The prior art used to teach different activation rates, Queirolo, teaches a depth dependence of activation based on annealing that is inherent to low temperature annealing and is a smaller variation than the claimed difference. Regarding the limitation of claim 12, although Queirolo teaches that activation rates may be generally different at different depths, Queirolo does not provide a motivation to design a device in which the activation rate is lower in a peak closer to the bottom surface of the substrate than a peak further from the surface of the substrate.
Upon completing a prior art search and considering the combination of limitations as presented as a whole for the claims, the features highlighted above are considered an improvement over the prior art that describes a semiconductor device that is designed to withstand avalanche breakdown and have not been found to be anticipated or rendered obvious by a combination of prior art.
Conclusion
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/A.M.W./Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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