DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d)
based on an application filed in Korea (KR 10-2022-0141511) on October 28, 2022. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/22/2023 is being considered by the
examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “a sensor on a substrate” in line 5. However, it is unclear whether the sensor is on the same substrate previously recited in Claim 1 or if it is on a different substrate.
For the purpose of examination, the above claim limitation will be interpreted as the sensor being on the previously recited substrate.
Claims 2-14 are rejected due to their dependency on Claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection note: Italicized claim limitations are limitations not explicitly disclosed in the primary
reference but disclosed in the secondary reference(s).
Claims 1, 5-9, 12, 14, 15 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A).
Regarding Claim 1, Lim et al. discloses a sensor-embedded display panel, comprising
a substrate 111 (Fig. 6: 111, paragraph 0107);
a light emitting element OLED on the substrate 111 (Fig. 6: OLED, 111, paragraph 0108),
the light emitting element OLED including a light emitting layer 130 (Fig. 6: 130, paragraph 0109);
and a sensor OPD on a substrate 111 (Fig. 6: OPD, 111, paragraph 0064),
the sensor including a photosensitive layer 160 arranged in parallel with the light emitting layer 130 along an in-plane direction X-Y of the substrate 111 (Fig. 6: 160, 130, X, Y, 111, paragraph 0089),
wherein the light emitting element OLED and the sensor OPD include respective portions of a first common auxiliary layer CL1 (Fig. 6: CL1, paragraph 0074, 0076),
the first common auxiliary layer CL1 is continuous under the light emitting layer 130 and the photosensitive layer 160 (Fig. 6: CL1, 130, 160, paragraph 0076),
the first common auxiliary layer CL1 includes a hole transport material (paragraph 0074),
and the light emitting element OLED and the sensor OPD include respective portions of a second common auxiliary layer CL4 (Fig. 6: CL4, paragraph 0092, 0095),
the second common auxiliary layer CL4 is continuous on the light emitting layer 130 and the photosensitive layer 160 (Fig. 6: CL4, 130, 160, paragraph 005),
the second common auxiliary layer CL4 includes an electron transport material (paragraph 0092),
the photosensitive layer includes a first semiconductor layer and a second semiconductor layer,
the first semiconductor layer is close to the first common auxiliary layer,
the first semiconductor layer includes a p-type semiconductor configured to absorb light of a desired wavelength spectrum,
and the second semiconductor layer is close to the second common auxiliary layer,
and the second semiconductor layer includes an n-type semiconductor having a LUMO energy level deeper than a LUMO energy level of the electron transport material,
and the second semiconductor layer has an uneven surface facing the second common auxiliary layer and having an average roughness (Rq) of greater than or equal to about 5 nm.
Einzinger et al. teaches a sensor-embedded display panel comprising the following limitations not disclosed in Lim et al.
the photosensitive layer 322 includes a first semiconductor layer 706 and a second semiconductor layer 708 (Fig. 3: 322, Fig. 7: 706, 708, paragraph 0066),
the first semiconductor layer 706 is close to the first common auxiliary layer 702 (see Fig. 4: 706, 702),
the first semiconductor layer 706 includes a p-type semiconductor configured to absorb light of a desired wavelength spectrum (paragraph 0066),
and the second semiconductor layer 708 is close to the second common auxiliary layer 704 (see Fig. 4: 708, 704),
and the second semiconductor layer 708 includes an n-type semiconductor having a LUMO energy LUMO3 level deeper than a LUMO energy level LUMO4 of the electron transport material 704 (Fig. 4: 408, 404, LUMO3, LUMO4, paragraph 0068),
Therefore, it would have been obvious to a person of ordinary skill in the art, before the
effective filing date of the claimed invention to have combined the teachings of Lim et al. with Einzinger et al. in order to have the photosensitive layer include a first semiconductor layer and a second semiconductor layer, the first semiconductor layer is close to the first common auxiliary layer, the first semiconductor layer includes a p-type semiconductor configured to absorb light of a desired wavelength spectrum, and the second semiconductor layer is close to the second common auxiliary layer, and the second semiconductor layer includes an n-type semiconductor having a LUMO energy level deeper than a LUMO energy level of the electron transport material. Doing so, would facilitate charge separation in the sensor, as recognized by Einzinger et al. (paragraph 0068).
Suzuki et al. teaches a sensor-embedded display panel comprising the following limitations not disclosed in Lim et al.
and the second semiconductor layer 13b has an uneven surface facing the second common auxiliary layer 13c and having an average roughness (Rq) of greater than or equal to about 5 nm (Fig. 5: 13b, 13 c, paragraph 0025, 0026 in English Translation of Suzuki et al.).
Note that according to paragraph 0026 in English Translation of Suzuki et al., the average roughness is greater than 10 nm and less than 300 nm, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the
effective filing date of the claimed invention to have combined the teachings of Lim et al. with Suzuki et al. in order to have the second semiconductor layer have an uneven surface facing the second common auxiliary layer and having an average roughness (Rq) of greater than or equal to about 5 nm. Doing so would facilitate smoother charge transfer between the semiconductor layers, thereby improve the charge extraction efficiency of the sensor, as recognized by Suzuki et al. (paragraph 0009 in English Translation of Suzuki et al.).
Regarding Claim 5, Suzuki et al. discloses the sensor-embedded display panel of claim 1, wherein the second common auxiliary layer 13c covers the uneven surface of the second semiconductor layer 13b, and the second common auxiliary layer 13c includes portions having different thicknesses according to surface roughness of the uneven surface of the second semiconductor layer 13b (see Fig. 5: 13b, 13c).
Regarding Claim 6, Suzuki et al. discloses the sensor-embedded display panel of claim 1, wherein a maximum profile peak height (Rp) of a roughness profile of the uneven surface of the second semiconductor layer 13b is lower than a thickness t of the second common auxiliary layer 13c (see annotated Fig. 5: 13b, 13c, Rp, t).
PNG
media_image1.png
625
1429
media_image1.png
Greyscale
Annotated Fig. 5 of Suzuki et al. (JP 2007073717 A)
Regarding Claim 7, Suzuki et al. discloses the sensor-embedded display panel of claim 1, wherein an average roughness of the uneven surface of the second semiconductor layer 13b is about 0.14 to about 0.50 of the thickness of the second common auxiliary layer 13c (paragraph 0025, 0046 in English Translation of Suzuki).
Note that according to paragraph 0046, the thickness of the second common auxiliary layer 13c is about 0.1 nm to 1500 nm, and according to paragraph 0026, the average roughness of the uneven surface of the second semiconductor layer 13b is greater than 10 nm and less than 300 nm, which translates to a ratio of 0.007 to about 0.2, which overlaps with the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 8, Suzuki et al. discloses the sensor-embedded display panel of claim 1, wherein an average roughness of the uneven surface of the second semiconductor layer 13b is about 0.14 to about 0.50 of the thickness of the second semiconductor layer 13b (paragraph 0025, 0044 in English Translation of Suzuki).
Note that according to paragraph 0044, the thickness of the second semiconductor layer 13b is about 0.2 nm to 3000 nm, and according to paragraph 0026, the average roughness of the uneven surface of the second semiconductor layer 13b is greater than 10 nm and less than 300 nm, which translates to a ratio of 0.003 to about 0.1, which overlaps with the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 9, Suzuki et al. discloses the sensor-embedded display panel of claim 1, wherein an average roughness of the uneven surface of the second semiconductor layer is about 5 nm to about 20 nm (Fig. 5: 13b, 13 c, paragraph 0025, 0026 in English Translation of Suzuki et al.).
Note that according to paragraph 0026 in English Translation of Suzuki et al., the average roughness is greater than 10 nm and less than 300 nm, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 12, Lim et al. discloses the sensor-embedded display panel of claim 1, wherein the light emitting element OLED and the sensor OPD further comprise a common electrode 142, 144 on the second common auxiliary layer CL4, and the common electrode 142, 144 is configured to apply a common voltage to the light emitting element OLED and the sensor OPD (Fig. 6: 142, 144, OLED, OPD, CL4, paragraph 0111).
Regarding Claim 14, Lim et al. discloses an electronic device comprising the sensor-embedded display panel of claim 1 (paragraph 0006, 0007).
Regarding Claim 15, Lim et al. discloses a sensor, comprising
a first electrode 144 (Fig. 6: 144, paragraph 0110);
a first common auxiliary layer CL3 on the first electrode 144 (Fig. 6: CL3, 144, paragraph 0110),
the first common auxiliary layer CL3 including a hole transport material (paragraph 0088);
a first semiconductor layer 160 on the first common auxiliary layer CL3 (Fig. 6: 160, CL3, paragraph 0110),
the first semiconductor layer 160 including a p-type semiconductor configured to absorb light of a desired wavelength spectrum (paragraph 0110);
a second semiconductor layer on the first semiconductor layer,
the second semiconductor layer including an n-type semiconductor;
a second common auxiliary layer CL4 on the second semiconductor layer (Fig. 6: CL4, paragraph 0110),
the second common auxiliary layer CL4 including an electron transport material (paragraph 0092);
and a second electrode 154 on the second common auxiliary layer CL4 (Fig. 6: 154, CL4, paragraph 0110),
wherein a LUMO energy level of the n-type semiconductor is deeper than a LUMO energy level of the electron transport material,
and the second semiconductor layer has an uneven surface facing the second common auxiliary layer and having an average roughness (Rq) of greater than or equal to about 5 nm.
Einzinger et al. teaches a comprising the following limitations not explicitly disclosed in Lim et al.
the first semiconductor layer 706 including a p-type semiconductor (Fig. 7: 706, paragraph 0066)
a second semiconductor layer 708 on the first semiconductor layer 706 (Fig. 7: 706, 708, paragraph 0066),
the second semiconductor layer 708 including an n-type semiconductor (paragraph 0068);
a second common auxiliary layer 704 is on the second semiconductor layer 708 (see Fig. 4: 708, 704)
wherein a LUMO energy level LUMO3 of the n-type semiconductor 708 is deeper than a LUMO energy level LUMO4 of the electron transport material 704 (Fig. 4: 408, 404, LUMO3, LUMO4, paragraph 0068),
Therefore, it would have been obvious to a person of ordinary skill in the art, before the
effective filing date of the claimed invention to have combined the teachings of Lim et al. with Einzinger et al. in order to have the first semiconductor layer including a p-type semiconductor, a second semiconductor layer on the first semiconductor layer, the second semiconductor layer including an n-type semiconductor. Doing so, would facilitate charge separation in the sensor, as recognized by Einzinger et al. (paragraph 0068).
Suzuki et al. teaches a sensor comprising the following limitations not disclosed in Lim et al.
and the second semiconductor layer 13b has an uneven surface facing the second common auxiliary layer 13c and having an average roughness (Rq) of greater than or equal to about 5 nm (Fig. 5: 13b, 13 c, paragraph 0025, 0026 in English Translation of Suzuki et al.).
Note that according to paragraph 0026 in English Translation of Suzuki et al., the average roughness is greater than 10 nm and less than 300 nm, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the
effective filing date of the claimed invention to have combined the teachings of Lim et al. with Suzuki et al. in order to have the second semiconductor layer have an uneven surface facing the second common auxiliary layer and having an average roughness (Rq) of greater than or equal to about 5 nm. Doing so would facilitate smoother charge transfer between the semiconductor layers, thereby improve the charge extraction efficiency of the sensor, as recognized by Suzuki et al. (paragraph 0009 in English Translation of Suzuki et al.).
Regarding Claim 18, Suzuki et al. discloses the sensor of claim 15, wherein an average roughness of the uneven surface of the second semiconductor layer 13b is about 0.14 to about 0.50 of each thickness of the second common auxiliary layer 13c and the second semiconductor layer 13b (see paragraph 0026, 0044, 0046 in English Translation of Suzuki et al.).
Note that according to paragraph 0026, the average roughness of the uneven surface of the second semiconductor layer 13b is greater than 10 nm and less than 300 nm, according to paragraph 0044, the thickness of the second semiconductor layer 13b is about 0.2 nm to 3000 nm, according to paragraph 0046, the thickness of the second common auxiliary layer 13c is about 0.1 nm to 1500 nm. This translates to a ratio of average roughness to thickness of second semiconductor layer in the range of 0.003 to about 0.1, and a ratio of average roughness to thickness of second common auxiliary layer 13c in the range 0.007 to about 0.2, both of which overlaps with the claimed ranges. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 19, Suzuki et al. discloses the sensor of claim 15, wherein an average roughness of the uneven surface of the second semiconductor layer is about 5 nm to about 20 nm (Fig. 5: 13b, 13 c, paragraph 0025, 0026 in English Translation of Suzuki et al.).
Note that according to paragraph 0026 in English Translation of Suzuki et al., the average roughness is greater than 10 nm and less than 300 nm, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 20, Lim et al. discloses an electronic device comprising: the sensor of claim 15 (paragraph 0006, 0007).
Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A), as applied to Claim 1 above, further in view of Park et al. (Optica, Vol. 9, No. 9, September2022).
Regarding Claim 2, the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose the sensor-embedded display panel of claim 1, wherein the LUMO energy level of the n-type semiconductor is about 0.01 eV to about 1.0 eV deeper than the LUMO energy level of the electron transport material.
However, Park et al. discloses a sensor, wherein the LUMO energy level of the n-type semiconductor (Acceptor) is about 0.01 eV to about 1.0 eV deeper than the LUMO energy level of the electron transport ETL material (see Fig. 3(a): Acceptor, ETL).
Note that the Acceptor material has a LUMO energy of 4.0 eV and ETL has a LUMO energy in the range of 2.8 eV to 3.9 eV (see Fig. 3a and its caption). Therefore, the difference between the LUMO energy level of the n-type semiconductor (Acceptor) and the LUMO energy level of the electron transport ETL material is in the range of 0.1 eV to 1.2 eV, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Park et al. in order to have the LUMO energy level of the n-type semiconductor be about 0.01 eV to about 1.0 eV deeper than the LUMO energy level of the electron transport material. Doing so would yield low dark currents resulting in high rectification ratios of the sensor, as recognized by Park et al. (page 995, column 2, last paragraph).
Regarding Claim 3, the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose the sensor-embedded display panel of claim 1, wherein the LUMO energy level of the n-type semiconductor is greater than about 2.9 eV and less than or equal to about 3.8 eV, and an energy band gap of the n-type semiconductor is about 2.5 eV to about 4.0 eV.
However, Park et al. discloses a sensor, wherein the LUMO energy level of the n-type semiconductor (Acceptor) is 4.0 eV, and an energy band gap of the n-type semiconductor (Acceptor) is 2.3 eV (see Fig. 3(a): acceptor, page 996, column 1, first paragraph, line 2, page 994, column 2, first paragraph).
Note that while Park et al. fails to explicitly disclose a LUMO energy level of the n-type semiconductor (Acceptor) is greater than about 2.9 eV and less than or equal to about 3.8 eV, the disclosed value of 4.0 eV approaches the claimed range. Further, note that while Park et al. fails to explicitly teach an energy band gap of the n-type semiconductor (Acceptor) is about 2.5 eV to about 4.0 eV, the disclosed value of 2.3 eV approaches the claimed range. According to MPEP § 2144.05 (I), “a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close”. Titanium Metals Corp. of Americav.Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Park et al. in order to have the LUMO energy level of the n-type semiconductor greater than about 2.9 eV and less than or equal to about 3.8 eV, and an energy band gap of the n-type semiconductor be about 2.5 eV to about 4.0 eV. Doing so would yield low dark currents resulting in high rectification ratios of the sensor, as recognized by Park et al. (page 995, column 2, last paragraph).
Regarding Claim 4, the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose the sensor-embedded display panel of claim 1, wherein the LUMO energy level of the electron transport material is about 2.9 eV to about 3.3 eV.
However, Park et al. discloses a sensor, wherein the LUMO energy level of the electron transport material ETL is about 2.9 eV to about 3.3 eV (see Fig. 3(a): ETL and caption of Fig. 3a).
Note that the energy level diagram of Fig. 3(a) shows different ETLs with LUMO energy ranging from 2.8 eV to 3.9 eV (see caption of Fig. 3a), which overlaps with the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Park et al. in order to have the LUMO energy level of the electron transport material be about 2.9 eV to about 3.3 eV. . Doing so would yield low dark currents resulting in high rectification ratios of the sensor, as recognized by Park et al. (page 995, column 2, last paragraph).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A), as applied to Claim 1 above, further in view of Jou (US 20190115397 A1).
Regarding Claim 10, Lim et al. implicitly teaches the sensor-embedded display panel of claim 1, wherein the light emitting layer 130 includes at least one organic light emitting material (note that OLEDs will inherently include at least one organic light emitting material, see paragraph 0064).
But the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose a LUMO energy level of the organic light emitting material is shallower than the LUMO energy level of the electron transport material.
However, Jou teaches a display device, wherein a LUMO energy level of the organic light emitting material 13 is shallower than the LUMO energy level of the electron transport material 14 (See Fig. 5: 13, 15, paragraph 0052).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Jou in order to have the LUMO energy level of the organic light emitting material shallower than the LUMO energy level of the electron transport material. Doing so would yield a display panel of good luminance performance, as recognized by Jou (paragraph 0054).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A), further in view of Jou (US 20190115397 A1), as applied to Claim 10 above, further in view of Seo et al. (US 20210395271 A1).
Regarding Claim 11, the combination of Lim et al., Einzinger et al., Suzuki et al. and Jou fails to explicitly disclose the sensor-embedded display panel of claim 10, wherein a difference among sublimation temperatures of the p-type semiconductor, the n-type semiconductor, and the organic light emitting material is greater than or equal to about 0 °C and less than about 150 °C, and the sublimation temperature is a temperature at which a weight loss of 10 % relative to an initial weight occurs during thermogravimetric analysis at a pressure of about 10 Pa or less.
However, Seo et al. teaches an electroluminescence device comprising several organic semiconductor layers including a p-type semiconductor 117, an n-type semiconductor 118, and an organic light emitting material 113, wherein a difference among sublimation temperatures of the p-type semiconductor 117, the n-type semiconductor 118, and the organic light emitting material 113 is less than about 50 °C, and the sublimation temperature is a temperature at which a weight loss of 5 % relative to an initial weight occurs during thermogravimetric analysis at a pressure of about 10 Pa or less (Claim 23, Fig. 1B: 117, 118, 113, paragraph 0351).
Note that while Seo et al. fails to explicitly disclose a range of greater than or equal to about 0 °C and less than about 150 °C for the difference among sublimation temperatures, the disclosed value lies within the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Further, while Seo et al. fails to disclose sublimation temperatures at a weight loss of 10 % relative to an initial weight, it would have been obvious to a person of ordinary skill in the art to determine the sublimation temperatures using a different weight loss threshold (10% instead of 5%) through routine optimization.
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al., Jou and Seo et al. in order to have a difference among sublimation temperatures of the p-type semiconductor, the n-type semiconductor, and the organic light emitting material be greater than or equal to about 0 °C and less than about 150 °C, and the sublimation temperature is a temperature at which a weight loss of 10 % relative to an initial weight occurs during thermogravimetric analysis at a pressure of about 10 Pa or less. Doing so would enable the deposition of the p-type semiconductor, the n-type semiconductor, and the organic light emitting material using the same evaporation chamber, thereby reducing manufacturing costs, as recognized by Seo et al. (paragraph 0151).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A), as applied to Claim 1 above, further in view of Liang et al (CN 109065587 A).
Regarding Claim 13, Lim et al. teaches the sensor-embedded display panel of claim 1,
wherein the light emitting element OLED comprises a first light emitting element SP1 configured to emit light of a red wavelength spectrum, a second light emitting element SP2 configured to emit light of a green wavelength spectrum and a third light emitting element SP3 configured to emit light of a blue emission spectrum (Fig. 5: SP1, SP2, SP3, Fig. 6: OLED, paragraph 0050),
the sensor LS/OPD is between at least two selected from the first light emitting element SP1, the second light emitting element SP2, and the third light emitting element SP3 (Fig. 5: SP!, SP2, SP3, LS),
and the sensor LS/OPD is configured to absorb light emitted from at least one of the first light emitting element, the second light emitting element, or the third light emitting element and then reflected by a recognition target, and convert the light into an electrical signal (paragraph 0046, 0110).
The combination of Lim et al., Einzinger et al., and Suzuki et al. fails to explicitly disclose the sensor is configured to absorb light emitted from at least one of the first light emitting element, the second light emitting element, or the third light emitting element.
However, Liang et al. teaches a sensor-embedded display panel, wherein the sensor S is configured to absorb light emitted from at least one of the first light emitting element R, the second light emitting element B, or the third light emitting element G and then reflected by a recognition target (fingerprint), and convert the light into an electrical signal (Fig. 1: R, G, B, Fig. 2: S, page 2, lines 11-18 in English Translation of Liang et al.).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al., and Liang et al. in order to have the sensor configured to absorb light emitted from at least one of the first light emitting element, the second light emitting element, or the third light emitting element. Doing so would reduce the dependance on room light to perform the sensing function.
Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. (US 20230209921 A1), in view of Einzinger et al. (US 20220293682 A1) and Suzuki et al. (JP 2007073717 A), as applied to Claim 15 above, further in view of Park et al. (Optica, Vol. 9, No. 9, September2022).
Regarding Claim 16, the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose the sensor of claim 15, wherein the LUMO energy level of the n-type semiconductor is greater than about 2.9 eV and less than or equal to about 3.8 eV, the LUMO energy level of the electron transport material is about 2.9 eV to about 3.3 eV, and a difference between the LUMO energy level of the n-type semiconductor and the LUMO energy level of the electron transport material is greater than or equal to about 0.01 eV and less than about 1 eV.
However, Park et al. discloses a sensor,
wherein the LUMO energy level of the n-type semiconductor (acceptor) is 4.0 eV (see Fig. 3(a): acceptor, page 996, column 1, first paragraph, line 2).
Note that while Park et al. fails to disclose a LUMO energy level greater than about 2.9 eV and less than or equal to about 3.8 eV, the disclosed value approaches the claimed range.
According to MPEP § 2144.05 (I), “a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close”. Titanium Metals Corp. of Americav.Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985)
the LUMO energy level of the electron transport material ETL is about 2.9 eV to about 3.3 eV (see Fig. 3(a): ETL),
Note that the energy level diagram of Fig. 3(a) shows different ETLs with LUMO energy ranging from 2.8 eV to 3.9 eV (see caption of Fig. 3(a)), which overlaps with the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
and a difference between the LUMO energy level of the n-type semiconductor (Acceptor) and the LUMO energy level of the electron transport ETL material is greater than or equal to about 0.01 eV and less than about 1 eV (see Fig. 3(a): Acceptor, ETL).
Note that the Acceptor material has a LUMO energy of 4.0 eV and ETL has a LUMO energy in the range of 2.8 eV to 3.9 eV (see Fig. 3a and its caption). Therefore, the difference between the LUMO energy level of the n-type semiconductor (Acceptor) and the LUMO energy level of the electron transport ETL material is in the range of 0.1 eV to 1.2 eV, which overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Park et al. in order to have the LUMO energy level of the n-type semiconductor be greater than about 2.9 eV and less than or equal to about 3.8 eV, the LUMO energy level of the electron transport material be about 2.9 eV to about 3.3 eV, and a difference between the LUMO energy level of the n-type semiconductor and the LUMO energy level of the electron transport material be greater than or equal to about 0.01 eV and less than about 1 eV. Doing so would yield low dark currents resulting in high rectification ratios of the sensor, as recognized by Park et al. (page 995, column 2, last paragraph).
Regarding Claim 17, the combination of Lim et al., Einzinger et al. and Suzuki et al. fails to explicitly disclose the sensor of claim 15, wherein the n-type semiconductor is a transparent semiconductor.
However, Park et al. discloses a sensor, wherein the n-type semiconductor (Acceptor) is a transparent semiconductor (See caption of Fig. 1, page 997, column 2, last paragraph).
Note that the sensor shown in Fig. 1 is a transparent sensor implying the n-type semiconductor layer of the bulk heterojunction is inherently transparent (See caption of Fig. 1, page 997, column 2, last paragraph).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Lim et al., Einzinger et al., Suzuki et al. and Park et al. in order to have the n-type semiconductor be a transparent semiconductor. Doing so ensure would ensure the n-type semiconductor absorb less visible light and allows most of the light to reach the heterojunction where charge carriers are generated in the sensor.
Conclusion
The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Titov, M. Köpke, N. C. Schneidewind, J. Buhl, Y. Murat and M. Gerken, "OLED-OPD Matrix for Sensing on a Single Flexible Substrate," in IEEE Sensors Journal, vol. 20, no. 14, pp. 7540-7547, 15 July15, 2020, doi: 10.1109/JSEN.2020.2986051.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAMNA F IQBAL whose telephone number is 571-272-1587. The examiner can normally be reached M-F: 8.30 am - 5.30 pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at 571-272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 05/06/2026
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
Prosecution Insights