DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action has been issued in response to amendment filed 04/15/2026. Applicant's arguments have been carefully and fully considered but they are not persuasive. Accordingly, this action has been made FINAL.
Claim Status
Claims 1, 4-7, and 9 have been amended. Claims 1-9 remain pending and are ready for examination.
Claim Rejections - 35 USC § 112
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that use the word “means” or “step” but are nonetheless not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph because the claim limitation(s) recite(s) sufficient structure, materials, or acts to entirely perform the recited function. Such claim limitation(s) is/are: “a scheduling unit configured to schedule” in claims 1-3.
Because this/these claim limitation(s) is/are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are not being interpreted to cover only the corresponding structure, material, or acts described in the specification as performing the claimed function, and equivalents thereof.
If applicant intends to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to remove the structure, materials, or acts that performs the claimed function; or (2) present a sufficient showing that the claim limitation(s) does/do not recite sufficient structure, materials, or acts to perform the claimed function.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 and 4-5 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by Jevtic et al. (US6224638B1 -hereinafter Jevtic).
Regarding Claim 1, Jevtic teaches a wafer processing apparatus, comprising:
a first loadlock and a second loadlock (see column 1, lines 47; Jevtic: “a pair of load lock chambers 120 and 122”), the first and second loadlocks being configured to stack a plurality of wafers and the wafers can be inserted into the first and second loadlocks (see column 1, lines 55-58; Jevtic: “The wafers 128 are typically carried from storage to the system in a plastic transport cassette 126 that is placed within one of the load lock chambers 120 or 122.”) and the wafers can be removed from the first and second loadlocks; (see column 1, lines 58-60; Jevtic: “The robotic transport mechanism 124 transports the wafers 128, one at a time, from the cassette 126 to any of the three chambers 118, 102, or 114.”)
at least one extra chamber for preprocessing or postprocessing the wafers; (see column 1, lines 60-61; Jevtic: “a given wafer is first placed in the wafer orienter/degas chamber 118”)
at least one reaction chamber configured to process the wafers; (see column 1, lines 43-44; Jevtic: “four process chambers 104, 106, 108, 110”)
a pass-through chamber configured to stack wafers received from a first robot and a second robot; (see column 1, lines 60-62; Jevtic: “then moved to the preclean chamber 114.”)
a first wafer handling chamber comprising the first robot (see column 1, lines 53-55; Jevtic: “the buffer chamber 116 contains a first robotic transfer mechanism 124, e.g., a single blade robot (SBR)”), the first robot configured to move wafers between the first and second loadlocks, the at least one extra chamber and the pass-through chamber; (see column 1, lines 58-60; Jevtic: “The robotic transport mechanism 124 transports the wafers 128, one at a time, from the cassette 126 to any of the three chambers 118, 102, or 114.”)
a second wafer handling chamber comprising a second robot (see column 2, lines 4-6; Jevtic: “the transfer chamber 112 contains a second robotic transport mechanism 132, e.g., a dual blade robot (DBR).”), the second robot configured to move wafers between the reaction chambers and the pass-through chamber; and (see column 2, lines 4-6; Jevtic: “The transfer chamber 112 is surrounded by, has access to, the four process chambers 104, 106, 108 and 110, as well as the preclean chamber 114 and the cooldown chamber 102.”)
a scheduling unit configured to schedule movements of the plurality of wafers by the first robot and the second robot. (see column 5, lines 26-29; Jevtic: “The depicted cluster tool 100 is controlled by a sequencer 136 that executes the priority-based scheduling routines of the present invention.”)
Regarding Claim 2, Jevtic teaches all the limitations of claim 1 above, Jevtic further teaches wherein the scheduling unit comprises a processor, a memory and an IO interface, wherein the memory comprises waiting queues. (see column 6, line 67 and column 7, lines 1-9; Jevtic: “The sequencer 136 contains a microprocessor 300, a memory 302 for storing the routines of the present invention, and support circuits 306, such as power supplies, clock circuits, cache and the like. The sequencer 136 also contains input/output circuitry 308 that forms an interface between conventional input/output (I/O) devices such as a keyboard, mouse, and display, as well as an interface to the cluster tool. The sequencer 136 is a general purpose computer that is programmed to perform the sequencing and scheduling operations in accordance with the present invention.” See Abstract: “The sequencer is capable of determining the amount of time available before a priority move is to be performed and, if time is sufficient, the sequencer performs a non-priority move while waiting.”)
Regarding Claim 4, Jevtic teaches all the limitations of claim 1 above, Jevtic further teaches wherein the pass-through chamber further comprises at least one upper chambers (see column 1, lines 44-45; Jevtic: “the preclean chamber 114”) and at least one lower chambers (see column 1, line 46; Jevtic: “the cooldown chamber 102”) for stacking wafers. (see column 1, lines 58-60; Jevtic: “The robotic transport mechanism 124 transports the wafers 128, one at a time, from the cassette 126 to any of the three chambers 118, 102, or 114.”)
Regarding Claim 5, Jevtic teaches all the limitations of claim 4 above, Jevtic further teaches wherein the at least one upper chamber is configured to receive wafers from the at least one extra chamber and to send the wafers to the at least one reaction chamber (see column 1, lines 60-62; Jevtic: “Typically, a given wafer is first placed in the wafer orienter/degas chamber 118, then moved to the preclean chamber 114.”), and the at least one lower chamber is configured to receive wafers from the at least one reaction chamber (see column 2, lines 26-29; Jevtic: “Once processing is complete within the process chambers, the transport mechanism 132 moves the wafer from the process chamber and transports the wafer to the cooldown chamber 102”) and to send the wafers to the first or second loadlocks. (see column 2, lines 29-32; Jevtic: “The wafer is then removed from the cooldown chamber using the first transport mechanism 124 within the buffer chamber 116. Lastly, the wafer is placed in transport cassette 126 within the load lock chamber 122.”)
Claim(s) 6-7 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by
Emani et al. (US20080216077A1 -hereinafter Emani).
Regarding Claim 6, Emani teaches a method of scheduling wafer movements in a scheduling unit of a wafer processing apparatus, the method comprising:
preparing wafer movement time data based on a calculated operation time (see [0071]; Emani: “In step 410 of the scheduling method 400, an initial individual schedule may be determined for a process sequence.”), wherein wafer movement time data is the time it takes for a wafer to move among chambers and loadlocks; (see [0071]; Emani: “The initial individual schedule is generally determined according to the process sequences, the topology of the cluster tool where the substrates are to be processed.”)
saving the wafer movement time data into a waiting queue in a memory of the scheduling unit (see [0073]; Emani: “In step 430, a schedule table may be generated based on the initial individual schedule and the initial fundamental period”), wherein the waiting queue stores a second wafer movement time data; (see [0073]; Emani: “In one embodiment, the schedule table may include, for each resource, a time table within a fundamental period.”) [The initial fundamental period reads on ‘a second wafer movement’.]
determining whether the saved wafer movement time data and the second wafer movement time data in the waiting queue have any time overlaps; (see [0074]; Emani: “In step 440, resource conflicts are checked out for the generated schedule table. In one embodiment, resource conflicts may be determined by checking overlaps in the time table of every resource with in a fundamental period.”)
updating, if overlap exists, the saved wafer movement time data according to a current time stamp (see [0076]; Emani: “In case there are resource conflicts in the schedule table, the resource conflicts may be removed by adjusting the individual schedule in step 450”. See [0121]: “The scheduler then adjusts the delays calculated in the static schedule based on the actual times”) and repeat determining until there are no overlaps; (see [0100]; Emani: “In step 516, conflicts may be checked for the updated individual schedule and the current fundamental period. If no conflict exists, the method 500 found a solution.”)
executing, if overlap does not exist, the wafer movement time data saved in the waiting queue; (see [0075]; Emani: “If no resource conflicts are found in a schedule table for all the resources in the cluster tool, the individual schedule and the fundamental period relate to the schedule table is acceptable solution for the problem, and the method jumps to step 470 to output the current individual schedule and fundamental period for process.”)
computing a difference between the prepared wafer movement time data and actually taken time (see [0121]; Emani: “However since the actual time taken to execute the recipe may vary, especially in end point based recipes, the scheduler also monitors the system while the process sequence is being executed. The scheduler then adjusts the delays calculated in the static schedule based on the actual times”) and reflecting the difference in the remaining wafer movement time data in the waiting queue; and (see [0121]; Emani: “For example, the start time of step k was at time=100 seconds and the delay after the step was 30 seconds in the static schedule. If a substrate arrives at the chamber at time=102 seconds because of substrate transfer time variations, the scheduler will adjust the sequencer to wait only 28 seconds after the substrate has complete the recipes.”)
deleting movement time data from the waiting queue. (see [0077]; Emani: “If resource conflicts are removed by adjusting the individual schedule, the scheduling method jumps to step 470 and outputs the updated individual schedule and the current fundamental period.”)
Regarding Claim 7, Emani teaches all the limitations of claim 6 above, Emani further teaches wherein the computing comprises: computing a difference between the wafer movement prepared time data and an average time of actually taken time (see [0121]; Emani: “However since the actual time taken to execute the recipe may vary, especially in end point based recipes, the scheduler also monitors the system while the process sequence is being executed. The scheduler then adjusts the delays calculated in the static schedule based on the actual times”) and reflecting the difference in the remaining wafer movement time data in the waiting queue. (see [0121]; Emani: “For example, the start time of step k was at time=100 seconds and the delay after the step was 30 seconds in the static schedule. If a substrate arrives at the chamber at time=102 seconds because of substrate transfer time variations, the scheduler will adjust the sequencer to wait only 28 seconds after the substrate has complete the recipes.”)
Regarding Claim 9, the limitations in this claim is taught by Emani as discussed connection with claim 6.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jevtic in view of Geismar et al. (US20040230334A1 -hereinafter Geismar).
Regarding Claim 3, Jevtic teaches all the limitations of claim 1 above; however, Jevtic does not explicitly teach wherein the scheduling unit is configured to schedule the movements of the plurality of wafers by the first robot and the second robot independently and asynchronously of each other.
Geismar the same or similar field of endeavor teaches wherein the scheduling unit is configured to schedule the movements of the plurality of wafers by the first robot and the second robot independently and asynchronously of each other. (see Abstract; Geismar: “To provide enhanced efficiency, each of these robots may independently operate according to a reverse process flow, cyclical schedule of operation.” See [0026]: “Referring again to FIGURE 1, this system 10 includes a more complex arrangement of stages 14 and robots 20. Within system 10, each robot 20 may operate according to its own schedule for servicing its assigned stages 14. According to particular embodiments, each robot 20 operates according to a deterministic, counter process schedule for servicing its assigned stages 14.”)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teaching of Jevtic to include Geismar’s features of schedule the movements of the plurality of wafers by the first robot and the second robot independently and asynchronously of each other. Doing so would enhance productivity of robotic systems and prevent collisions between the robots. (Geismar, [0005])
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Emani in view of Jevtic (US5928389A -hereinafter Jevtic89).
Regarding Claim 8, Emani teaches all the limitations of claim 6 above; however, Emani does not explicitly teach further comprising before preparing: determining whether a chamber to be used for wafer movement is currently in use; setting a start time of prechamber process if the chamber to be used is not currently in use; and executing a prechamber process.
Jevtic89 the same or similar field of endeavor teaches further comprising before preparing:
determining whether a chamber to be used for wafer movement is currently in use; (see column 10, lines 31; Jevtic89: “3. Scan the stage S for an empty chamber.”)
setting a start time of prechamber process if the chamber to be used is not currently in use; and (see column10, lines 30-36; Jevtic89: “Identify the empty chamber in stage S. Let it be chamber A. Scan the stage for S-1 for the first wafer which is ready to leave stage S-1. Let it be wafer W in chamber B. Calculate the difference
T.sub.remains :=T.sub.finish -T.sub.now -T.sub.robot,
where Tfinish is the anticipated time chamber B should finish processing wafer W, Tnow is the present time, and Trobot is the time robot needs to reach B from its present position. If Tremains is not positive, go to Step 5.”)
executing a prechamber process. (see column 10, lines 45-46; Jevtic89: “Position the robot at chamber B and move wafer W from B to A.”)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teaching of Emani to include Jevtic89’s features of before preparing: determining whether a chamber to be used for wafer movement is currently in use; setting a start time of prechamber process if the chamber to be used is not currently in use; and executing a prechamber process. Doing so would dynamically varies assigned priorities depending upon the availability of chambers in the tool. (Jevtic89, Abstract)
Response to Arguments
Applicant's arguments filed 4/15/2026 have been fully considered but they are not persuasive.
With respect to applicant’s argument located within the page 7 which recites:
“However, the preclean chamber 114 in Jevtic is a processing chamber that performs a preclean process on wafers and not a pass-through chamber configured to stack wafers received from a first robot and a second robot as called for in claim 1. Jevtic does not disclose or suggest that the preclean chamber 114 can hold multiple wafers simultaneously or stack them. While both the alleged first robot (first robotic transfer mechanism 124 in buffer chamber 116) and the alleged second robot (second robotic transport mechanism 132 in transfer chamber 112) can access the preclean chamber 114, there is no teaching or suggestion that the preclean chamber 114 receives wafers from both robots for stacking purposes.”
Examiner respectfully disagrees. Examiner interpreted the preclean chamber 114 as ‘the upper chamber’ and the cooldown chamber 102 as ‘the lower chamber’. That is, the wafers 128 are transported to chamber 114 and 102 read on ‘the pass-through chamber’.
With respect to applicant’s argument located within the page 8 which recites:
“The preclean chamber 114 cannot simultaneously be the pass-through chamber itself (as mapped in claim 1) and also be an upper chamber within the pass-through chamber (as mapped in claim 4). Furthermore, claim 4 requires that the pass-through chamber "further comprises" upper and lower chambers, meaning the upper and lower chambers should be sub-components within a single pass-through chamber structure. In Jevtic, the preclean chamber 114 and cooldown chamber 102 are separate, distinct chambers-not sub-chambers within a single pass-through chamber. For this further reason, claim 4 is patentably distinct from Jevtic.”
The Applicant’s argument has been considered but is not deemed persuasive. Examiner respectfully would like to remind applicant that the rejections are based on the broadest reasonable interpretation of the claim limitations. Claims are directed to “the pass-through chamber further comprises at least one upper chamber and at least one lower chamber”. The claims do not recite “the upper and lower chambers should be sub-components within a single pass-through chamber structure.” If Applicant intents to claim “the upper and lower chambers should be sub-components within a single pass-through chamber structure”, then it should be expressly recited in the claims.
With respect to applicant’s argument located within the page 8 which recites:
“The Office alleges that Emani discloses all the features of original independent claims 6 and 9. The Office alleges that step 470 (outputting the updated individual schedule) of Emani suggests "deleting movement time data from the waiting queue." On the contrary, outputting a schedule is fundamentally different from deleting data from a waiting queue. There is no explicit teaching or suggestion in Emani of removing or deleting movement time data from a waiting queue after execution as called for in claims 6 and 9. For at least this reason, claims 6 and 9 are not anticipated by and patentably distinct from Emani.”
Examiner respectfully disagrees. Emani [0069] discloses adjust the schedule to remove a detected resource conflict. Examiner interpreted adding a queue time to delay step reads on "deleting movement time data from the waiting queue."
With respect to applicant’s argument located within the page 8 which recites:
“However, Emani [0121] describes adjusting based on a single actual occurrence (e.g., a substrate arriving at time=102 instead of time=100), not an average computed over multiple actual occurrences. In sharp contrast, claim 7 specifically calls for "computing a difference between the prepared time data and an average time of actually taken time," which is a distinct concept from adjusting based on a single actual time variation”.
Examiner respectfully disagrees. Examiner interpreted the delay is computed reads on ‘computing a difference”.
With respect to applicant’s argument located within the page 9 which recites:
“Such cyclical, state-dependent scheduling inherently requires coordination between robots. In contrast to Geismar, claim 3 calls for the scheduling unit to schedule the first and second robots "independently and asynchronously of each other." The centrally coordinated, token-synchronized, location-tracked scheduling disclosed in Geismar does not teach or suggest this feature of claim 3”.
Examiner respectfully disagrees. Examiner interpreted each of these robots may independently operate according to a reverse process flow, cyclical schedule of operation as "independently and asynchronously of each other."
With respect to applicant’s argument located within the page 10 which recites:
“Furthermore, Jevtic89 does not teach or suggest the claim 8 features of "setting a start time of prechamber process if the chamber to be used is not currently in use" or "executing a prechamber process." The Office cites Jevtic89's calculation of Tremains (Jevtic89, col. 10, 11. 30- 36), which involves calculating remaining time for wafer transfer scheduling. Notably, this is different than setting a start time for a prechamber process. The "prechamber process" as described in the application refers to a preparatory process executed in the chamber before the wafer arrives, wherein "susceptors and gate valves may be operated in the same way as they would have for the ordinary processing of wafer transport to the chamber without wafer in the chamber." Specification, [0069]. In short, the features of claim 8 are patentably distinct from Jevtic89's wafer transfer operations.”
Examiner respectfully disagrees. Examiner respectfully would like to remind applicant that the rejections are based on the broadest reasonable interpretation of the claim limitations. Examiner interpreted if identify the chamber is not currently in use, the system setting time and executing the prechamber process. Jevtic89 discloses identifying the empty chamber, the calculating the time to process wafer and move the wafer to the empty chamber.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wang (US11385628B2) discloses Two substrate transfer robots are disposed in the transfer chamber (e.g., electric plating processing platform) to facilitate transfer of the substrates between process chambers.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VI N TRAN whose telephone number is (571)272-1108. The examiner can normally be reached Mon-Fri 9:00-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ROBERT FENNEMA can be reached at (571) 272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/V.N.T./Examiner, Art Unit 2117
/DARRIN D DUNN/Patent Examiner, Art Unit 2117
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