DETAILED ACTION
This action is responsive to the application No. 18/475,476 filed on September 27, 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgment
The amendment filed on 01/28/2026 responding to the Office action mailed on 01/20/2026, has been entered. The present Office action is made with all the suggested amendments being fully considered. Claims 10-16 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Accordingly, pending in this Office action are claims 1-20.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 17 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Qiu (US 2024/0107899).
Regarding Claim 17, Qiu (see, e.g., Figs. 1, 6A-6B, and Annotated Fig. 6A), teaches a device comprising:
a first capacitor pad 202a located on a substrate 201 (see, e.g., par. 0049);
a first contact 502a having a first end a1 located in direct contact with a top surface of the first capacitor pad 202a, wherein the first contact 502a extends from the top surface of the first capacitor pad 202a to a top surface of the substrate 201 (see, e.g., par. 0047);
a second capacitor pad 202b located on the substrate 201 (see, e.g., par. 0049);
a second contact 502b having a first end b1 located in direct contact with a top surface of the second capacitor pad 202b, wherein the second contact 502b extends from the top surface of the second capacitor pad 202b to the top surface of the substrate 201 (see, e.g., par. 0047); and
a Josephson junction 210 extending from the first contact 502a to the second contact 502b, wherein the Josephson junction 210 comprises a first Josephson junction lead 203 located in direct contact with a second end a2 of the first contact 502a and a second Josephson junction lead 204 located in direct contact with a second end b2 of the second contact 502b (see, e.g., par. 0049).
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Claim 17 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Shinichi (WO 2024/069696).
Regarding Claim 17, Shinichi (see, e.g., Figs. 1-2), teaches a device comprising:
a first capacitor pad 21 located on a substrate 10;
a first contact 31X having a first end located in direct contact with a top surface of the first capacitor pad 21, wherein the first contact 31X extends from the top surface of the first capacitor pad 21 to a top surface of the substrate 10;
a second capacitor pad 22 located on the substrate 10;
a second contact 32X having a first end b1 located in direct contact with a top surface of the second capacitor pad 22, wherein the second contact 32X extends from the top surface of the second capacitor pad 22 to the top surface of the substrate 10; and
a Josephson junction 5 extending from the first contact 31X to the second contact 32X, wherein the Josephson junction 5 comprises a first Josephson junction lead 31B located in direct contact with a second end of the first contact 31X and a second Josephson junction lead 32B located in direct contact with a second end of the second contact 32X.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9 are rejected under 35 U.S.C. 103 as being unpatentable over Adiga (US 2021/0399199) in view of Tzalenchuk (US 2003/0042481).
Regarding Claim 1, Adiga (see, e.g., Fig. 10), teaches a device comprising:
a superconducting capacitor pad 310 located on top of a substrate 308 (see, e.g., par. 0056);
a contact 608/708 located on a top surface of the capacitor pad 310, wherein the contact comprises a first contact layer 608 comprising a superconducting material and in direct contact with the capacitor pad 310 and a second contact layer 708 that is located on top of the first contact layer 608 (see, e.g., pars. 0069, 0073); and
a Josephson junction 908 directly in contact with the first contact layer 608 and the second contact layer 708 (see, e.g., par. 0083).
Adiga is silent with respect to the claim limitation that layer 708 comprises an inert conductor.
Tzalenchuk (see, e.g., Fig. 1A), in similar devices to Adiga, on the other hand, teaches using intermediate layer 21 (equivalent to layer 708 of Adiga), comprising a normal metal such as gold (Au), silver (Ag), platinum (Pt), palladium (Pd), due to its critical temperature Tc, its defect density when patterned, its chemical inertness (i.e., affinity to react with the surrounding material), and its ability to form a heterojunction (see, e.g., pars. 0017, 0056, 0059).
It would have been obvious to one of ordinary skill in the art at the time of filing to include in Adiga’s device, a second contact layer comprising an inert conductor, as taught by Tzalenchuk, due to its critical temperature Tc, its defect density when patterned, its chemical inertness, and its ability to form a heterojunction.
Regarding Claim 2, Adiga and Tzalenchuk teach all aspects of claim 1. Adiga (see, e.g., Fig. 10), teaches that the direct contact was formed using ion milling to remove surface oxide prior to deposition of the first contact layer 608, such that the first contact layer 608 makes contact with the clean surface of the capacitor pad 310.
In reference to the claimed process step “that the direct contact was formed using ion milling to remove surface oxide prior to deposition of the first contact layer” this is considered an intermediate method step that does not affect the structure of the final device.
Note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe, even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935).
NOTE that the applicant has burden of proof in such cases as the above case law makes clear.
As to the grounds of rejection under section 103, see MPEP §2113 which discusses the handling of “product-by-process” claims and recommends the alternative (§ 102/§ 103) grounds of rejection.
Regarding Claim 3, Adiga and Tzalenchuk teach all aspects of claim 1. Adiga (see, e.g., Fig. 10), teaches that the first contact layer 608 comprises at least one of aluminum, vanadium, titanium nitride, niobium, tantalum, or rhenium (see, e.g., par. 0069).
Regarding Claim 4, Adiga and Tzalenchuk teach all aspects of claim 1. Tzalenchuk (see, e.g., Fig. 1A), teaches that the second contact layer 21 comprises at least one of platinum, iridium, rhenium, gold, or palladium (see, e.g., par. 0056).
Regarding Claim 5, Adiga and Tzalenchuk teach all aspects of claim 1. Adiga (see, e.g., Fig. 10), teaches that the capacitor pad 310 comprises at least one of niobium, tantalum, titanium nitride, niobium nitride or rhenium (see, e.g., par. 0056).
Regarding Claim 6, Adiga and Tzalenchuk teach all aspects of claim 1. Tzalenchuk (see, e.g., Fig. 1A), teaches that:
the first contact layer 20 comprises a thickness T20 greater than a thickness of T21 the second contact layer 21 (see, e.g., pars. 0056, 0083), and
the second contact layer 21 comprises a thickness T21 that allows for superconducting of the second contact layer 21 due to proximity of the first contact layer 20 and the Josephson junction 22 (see, e.g., par. 0056).
Regarding Claim 7, Adiga and Tzalenchuk teach all aspects of claim 1. Tzalenchuk (see, e.g., Fig. 1A), teaches that the first contact layer 20 comprises a thickness T20 between 20 nm and 100 nm (see, e.g., par. 0083).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66. Similarly, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of Amer.v.Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985).
"[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See also In re Harris, 409 F.3d 1339, 74 USPQ2d 1951 (Fed. Cir. 2005).
Regarding Claim 8, Adiga and Tzalenchuk teach all aspects of claim 1. Tzalenchuk (see, e.g., Fig. 1A), teaches that the second contact layer 21 comprises a thickness T21 between 1 nm and 20 nm (see, e.g., par. 0056).
See also the comments stated above in claim 7 regarding obviousness of ranges which are considered repeated here.
Regarding Claim 9, Adiga and Tzalenchuk teach all aspects of claim 1. Adiga (see, e.g., Fig. 10), teaches that the capacitor pad 310 can have any suitable shapes, sizes, and/or dimensions (see, e.g., par. 0056). Adiga is silent with respect to the claim limitation that the capacitor pad comprises a thickness between 50 nm and 300 nm.
However, this claim limitation is merely considered a change in the thickness of the capacitor pad in Adiga’s device. The specific claimed thickness, absent any criticality, is only considered to be an obvious modification of the thickness of the capacitor pad in Adiga’s device, as the courts have held that changes in thickness without any criticality, are within the level of skill in the art. According to the courts, a particular thickness is nothing more than one among numerous thicknesses that a person having ordinary skill in the art will find obvious to provide using routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see next paragraph below) of the claimed thickness, it would have been obvious to one of ordinary skill in the art at the time of filing to have the claimed thickness in Adiga’s, et. al., device.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen thickness or upon another variable recited in a claim, the applicant must show that the chosen thickness is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding Claim 18, Shinichi teaches all aspects of claim 17. Shinichi (see, e.g., Figs. 1-2), teaches that the first contact 31X comprises a superconducting layer (i.e., aluminum).
Shinichi is silent with respect to the claim limitation of an inert conductor layer located on top of the superconducting layer.
Tzalenchuk (see, e.g., Fig. 1A), in similar devices to Shinichi, on the other hand, teaches using barrier layer 21 (equivalent to layer 41 of Shinichi), comprising an inert conductor layer made of normal metal such as gold (Au), silver (Ag), platinum (Pt), palladium (Pd), due to its critical temperature Tc, its defect density when patterned, its chemical inertness (i.e., affinity to react with the surrounding material), and its ability to form a heterojunction (see, e.g., pars. 0017, 0056, 0059).
It would have been obvious to one of ordinary skill in the art at the time of filing to include in Shinichi’s device, a barrier layer comprising an inert conductor, as taught by Tzalenchuk, due to its critical temperature Tc, its defect density when patterned, its chemical inertness, and its ability to form a heterojunction.
Regarding Claim 19, Shinichi and Tzalenchuk teach all aspects of claim 18. Shinichi (see, e.g., Figs. 1-2), teaches that the second contact 32X comprises a second superconducting layer (i.e., aluminum) and a second layer 42 located on top of the superconducting layer.
Shinichi is silent with respect to the claim limitation that layer 42 is an inert conductor layer.
See also the comments stated above in claim 18 which are considered repeated here.
Regarding Claim 20, Shinichi and Tzalenchuk teach all aspects of claim 18. Tzalenchuk (see, e.g., Fig. 1A), teaches that:
the superconducting layer 20 comprises a thickness T20 greater than a thickness T21 of the inert conductor layer 21 (see, e.g., pars. 0056, 0083), and
the inert conductor layer 21 comprises a thickness T21 that allows for superconducting of the inert conductor layer 21 due to proximity of the superconducting layer 20 and the Josephson junction 22 (see, e.g., par. 0056).
Response to Arguments
Applicant’s arguments filed on 01/28/2028 with respect to the rejection of claims 1 and 17 have been fully considered but are moot because in view of the new grounds of rejection.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Garces whose telephone number is (571)272-8249. The examiner can normally be reached on M-F 9:00 AM - 5:30 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nelson Garces/Primary Examiner, Art Unit 2814