DETAILED ACTION
This action is responsive to the application No. 18/475,563 filed on September 27, 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of the Group I invention and Species 1, reading on Figs. 1, 1A-1C, including claims 1-16 in the reply filed on 03/27/2026 is acknowledged. However, claims 7-9, 11, and 12 read on a non-elected species of the claimed invention. For instance, claims 7, 8, and 11 recite “a rivet that attaches…”, a feature that is exclusive of Species 3, reading on Figs. 12, 12A-12B. Claims 7-9, 11, 12, and 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Accordingly, pending in this Office action are claims 1-20.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5, 6, 13, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takada (US 2013/0009299).
Regarding Claim 1, Takada (see, e.g., Figs. 1-5), teaches an electronic device 1 (see, e.g., par. 0071), comprising:
a package structure having opposite first and second sides 6a/6b, four lateral sides 6c, and four lateral corners (see, e.g., par. 0072);
a semiconductor die 3 at least partially enclosed inside the package structure and attached to a die attach pad 2 (see, e.g., par. 0074);
conductive leads 4 at least partially exposed outside the package structure along the four lateral sides 6c, a first one of the conductive leads 4 electrically connected 5 to the semiconductor die 3 (see, e.g., par. 0071);
an instance of a first conductive feature 9 partially exposed outside the package structure at each of the corners (see, e.g., par. 0071); and
an instance of a second conductive feature 8 partially exposed outside the package structure along the first side 6a and contacting a respective instance of the first conductive feature 9 at each of the corners (see, e.g., Fig. 4, par. 0073).
Regarding Claim 5, Takada teaches all aspects of claim 1. Takada (see, e.g., Figs. 1-5), teaches that the instance of the first conductive feature 9 at each respective corner is contiguous with the die attach pad 2 (see, e.g., Fig. 4).
Regarding Claim 6, Takada teaches all aspects of claim 5. Takada (see, e.g., Figs. 1-5), teaches that the instance of the second conductive feature 8 at each respective corner is a metal pad (see, e.g., par. 0073).
Regarding Claim 13, Takada (see, e.g., Figs. 1-5), teaches an electronic device 1 (see, e.g., par. 0071), comprising:
a package structure having opposite first and second sides 6a/6b, four lateral sides 6c, and four lateral corners (see, e.g., par. 0072);
a semiconductor die 3 at least partially enclosed inside the package structure and attached to a die attach pad 2 (see, e.g., par. 0074);
conductive leads 4 at least partially exposed outside the package structure along the four lateral sides 6c, a first one of the conductive leads 4 electrically connected 5 to the semiconductor die 3 (see, e.g., par. 0071);
an instance of a first conductive feature 9 partially exposed outside the package structure at each of the corners (see, e.g., par. 0071); and
an instance of a second conductive feature 8 including a conductive film partially exposed outside the package structure along the first side 6a at each of the corners (see, e.g., Fig. 4, par. 0073).
Regarding Claim 16, Takada teaches all aspects of claim 13. Takada (see, e.g., Figs. 1-5), teaches that the instance of the first conductive feature 9 at each respective corner is contiguous with the die attach pad 2.
Claims 1, 2, 13, and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hikita (US 2023/0080548).
Regarding Claim 1, Hikita (see, e.g., Figs. 1, 36), teaches an electronic device A1 (see, e.g., par. 0055), comprising:
a package structure 2 having opposite first and second sides 22/21, four lateral sides 231-234, and four lateral corners 251-254 (see, e.g., pars. 0055, 0061, 0185);
a semiconductor die 1 at least partially enclosed inside the package structure 2 and attached to a die attach pad 61 (see, e.g., par. 0072);
conductive leads 3 at least partially exposed outside the package structure 2 along the four lateral sides 231-234, a first one of the conductive leads 3 electrically connected to the semiconductor die 1 (see, e.g., pars. 0055, 0059);
an instance of a first conductive feature 36 partially exposed outside the package structure 2 at each of the corners 251-254 (see, e.g., pars. 0055, 0071); and
an instance of a second conductive feature 51-54 partially exposed outside the package structure 2 along the first side 22 and contacting a respective instance of the first conductive feature 51-54 at each of the corners 251-254 (see, e.g., par. 0185).
Regarding Claim 2, Hikita teaches all aspects of claim 1. Hikita (see, e.g., Figs. 1, 36), teaches that the instance of the second conductive feature 51-54 at each respective corner 251-254 is exposed outside the package structure 2 along portions of two respective ones of the lateral sides 231-234 at that respective corner 251-254.
Regarding Claim 13, Hikita (see, e.g., Figs. 1, 36), teaches an electronic device A1 (see, e.g., par. 0055), comprising:
a package structure 2 having opposite first and second sides 22/21, four lateral sides 231-234, and four lateral corners 251-254 (see, e.g., pars. 0055, 0061, 0185);
a semiconductor die 1 at least partially enclosed inside the package structure 2 and attached to a die attach pad 61 (see, e.g., par. 0072);
conductive leads 3 at least partially exposed outside the package structure 2 along the four lateral sides 231-234, a first one of the conductive leads 3 electrically connected to the semiconductor die 1 (see, e.g., pars. 0055, 0059);
an instance of a first conductive feature 36 partially exposed outside the package structure 2 at each of the corners 251-254 (see, e.g., pars. 0055, 0071); and
an instance of a second conductive feature 51-54 including a conductive film partially exposed outside the package structure 2 along the first side 22 at each of the corners 251-254 (see, e.g., pars. 0055, 0070, 0185).
Regarding Claim 14, Hikita teaches all aspects of claim 13. Hikita (see, e.g., Figs. 1, 36), teaches that the instance of the second conductive feature 51-54 at each respective corner 251-254 is exposed outside the package structure 2 along portions of two respective ones of the lateral sides 231-234 at that respective corner 251-254.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 4, 10, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Hikita (US 2023/0080548).
Regarding Claim 3, Hikita teaches all aspects of claim 2. Hikita (see, e.g., Figs. 1, 36), teaches that:
the instance of the second conductive feature 51-54 at each respective corner 251-254 is spaced apart from a nearest one of the conductive leads 3 along each respective lateral side 231-234 by a first spacing distance;
adjacent ones of the conductive leads 3 are spaced apart from one another along each respective lateral side 231-234 by a second spacing distance d1-d2 (see, e.g., pars. 0078, 0088, 0098, 0108).
Hikita is silent with respect to the claim limitation that the first spacing distance is less than the second spacing distance.
However, this claim limitation is merely considered a change in the spacing distance between the second conductive feature and the nearest conductive lead and/or the spacing distance between adjacent ones of the conductive leads in Hikita’s device. The specific claimed spacing distance, absent any criticality, is only considered to be an obvious modification of the spacing distance between the second conductive feature and the nearest conductive lead and/or the spacing distance between adjacent ones of the conductive leads in Hikita’s device, as the courts have held that changes in distance without any criticality, are within the level of skill in the art. According to the courts, a particular distance is nothing more than one among numerous distances that a person having ordinary skill in the art will find obvious to provide using routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see next paragraph below) of the claimed distance, it would have been obvious to one of ordinary skill in the art at the time of filing to have the claimed distances in Hikita’s device.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed distances or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen distance or upon another variable recited in a claim, the applicant must show that the chosen distance is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding Claim 4, Hikita teaches all aspects of claim 1. Hikita (see, e.g., Figs. 1, 36), teaches that:
the instance of the second conductive feature 51-54 at each respective corner 251-254 is spaced apart from a nearest one of the conductive leads 3 along each respective lateral side 231-234 by a first spacing distance;
adjacent ones of the conductive leads 3 are spaced apart from one another along each respective lateral side 231-234 by a second spacing distance d1-d2 (see, e.g., pars. 0078, 0088, 0098, 0108).
Hikita is silent with respect to the claim limitation that the first spacing distance is less than the second spacing distance.
However, this claim limitation is merely considered a change in the spacing distance between the second conductive feature and the nearest conductive lead and/or the spacing distance between adjacent ones of the conductive leads in Hikita’s device.
See also the comments stated above in claim 3 regarding criticality of distances which are considered repeated here.
Regarding Claim 10, Hikita teaches all aspects of claim 1. Hikita (see, e.g., Figs. 1, 36), teaches that:
the instance of the second conductive feature 51-54 at each respective corner 251-254 is spaced apart from a nearest one of the conductive leads 3 along each respective lateral side 231-234 by a first spacing distance;
adjacent ones of the conductive leads 3 are spaced apart from one another along each respective lateral side 231-234 by a second spacing distance d1-d2 (see, e.g., pars. 0078, 0088, 0098, 0108).
Hikita is silent with respect to the claim limitation that the first spacing distance is less than the second spacing distance.
However, this claim limitation is merely considered a change in the spacing distance between the second conductive feature and the nearest conductive lead and/or the spacing distance between adjacent ones of the conductive leads in Hikita’s device.
See also the comments stated above in claim 3 regarding criticality of distances which are considered repeated here.
Regarding Claim 15, Hikita teaches all aspects of claim 13. Hikita (see, e.g., Figs. 1, 36), teaches that:
the instance of the second conductive feature 51-54 at each respective corner 251-254 is spaced apart from a nearest one of the conductive leads 3 along each respective lateral side 231-234 by a first spacing distance;
adjacent ones of the conductive leads 3 are spaced apart from one another along each respective lateral side 231-234 by a second spacing distance d1-d2 (see, e.g., pars. 0078, 0088, 0098, 0108).
Hikita is silent with respect to the claim limitation that the first spacing distance is less than the second spacing distance.
However, this claim limitation is merely considered a change in the spacing distance between the second conductive feature and the nearest conductive lead and/or the spacing distance between adjacent ones of the conductive leads in Hikita’s device.
See also the comments stated above in claim 3 regarding criticality of distances which are considered repeated here.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Garces whose telephone number is (571)272-8249. The examiner can normally be reached on M-F 9:00 AM - 5:30 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nelson Garces/Primary Examiner, Art Unit 2814
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