Prosecution Insights
Last updated: July 17, 2026
Application No. 18/477,798

RADIO-FREQUENCY MODULE

Non-Final OA §103
Filed
Sep 29, 2023
Priority
Mar 31, 2021 — JP 2021-060009 +1 more
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
895 granted / 987 resolved
+22.7% vs TC avg
Minimal -0% lift
Without
With
+-0.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
55 currently pending
Career history
1027
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
79.3%
+39.3% vs TC avg
§102
10.4%
-29.6% vs TC avg
§112
5.6%
-34.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 987 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is responsive to application No. 18477798 filed on 09/29/2023. Information Disclosure Statement Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Election/Restrictions Applicant’s election without traverse of claims 1-10 in the reply filed on 01/30/2026 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2021/0050876). Regarding independent claim 1, Matsumoto teaches a radio-frequency module, comprising: a first module substrate (Fig. 2, element 41, paragraph 0030) including a first major surface and a second major surface that are opposite to each other; a second module substrate (Fig. 2, element 42, paragraph 0030) including a third major surface and a fourth major surface that are opposite to each other, the third major surface being disposed facing the second major surface; a plurality of electronic components (Fig. 2, element PA, MN, TxFIL, ANTSW, LNA, RxFIL, paragraph 0034-0052) disposed between the second major surface and the third major surface, on the first major surface, and on the fourth major surface; and a plurality of external connection terminals (Fig. 2, element 86, paragraph 0041) disposed on the fourth major surface, wherein the plurality of electronic components include a first electronic component including a first filter (Fig. 2, element TxFIL) coupled to a power amplifier via (Fig. 2, element PA) a switch (Fig. 2, element ANTSW), a second electronic component including a second filter (Fig. 2, element RxFIL) coupled to the power amplifier via the switch, and a third electronic component including the switch (Fig. 2), the first electronic component is disposed one of between the second major surface and the third major surface, on the first major surface, and on the fourth major surface (Figs. 2-4, Figs. 3 & 4 of Matsumoto discloses different embodiments wherein the filter, amplifier, switch are located on and between the different surfaces with the motivation to improve degree of transmission-reception isolation (paragraph 0066)), the second electronic component is disposed another one of between the second major surface and the third major surface, on the first major surface, and on the fourth major surface (Figs. 2-4, Figs. 3 & 4 of Matsumoto discloses different embodiments wherein the filter, amplifier, switch are located on and between the different surfaces with the motivation to improve degree of transmission-reception isolation (paragraph 0066)), and the third electronic component is disposed other one of between the second major surface and the third major surface, on the first major surface, and on the fourth major surface (Figs. 2-4, Figs. 3 & 4 of Matsumoto discloses different embodiments wherein the filter, amplifier, switch are located on and between the different surfaces with the motivation to improve degree of transmission-reception isolation (paragraph 0066)). Regarding claim 2, Matsumoto teaches wherein the first filter has a pass band including a first band, and the second filter has a pass band including a second band that supports concurrent transmission with the first band (paragraph 0129-0133). Regarding claim 8, Matsumoto teaches a first ground electrode pattern (Fig. 2, element 61, paragraph 0034) within the first module substrate, wherein the first ground electrode pattern is disposed between the first electronic component and the second electronic component. Regarding claim 9, Matsumoto teaches a second ground electrode pattern (Fig. 2, element 62, paragraph 0037) within the second module substrate, wherein the second ground electrode pattern is disposed between the second electronic component and the third electronic component. Claims 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2021/0050876) in view of DiTommaso et al. (US 2020/0343940). Regarding claim 3, Matsumoto teaches all of the limitations as discussed above. Matsumoto does not explicitly disclose wherein the first band is an uplink operation band of a band for frequency division duplex (FDD), and the second band is a band for time division duplex (TDD). Ditommaso et al. teach a radio-frequency circuit comprising wherein the first band is an uplink operation band of a band for frequency division duplex (FDD), and the second band is a band for time division duplex (TDD) (paragraph 0007, paragraph 0025-0026). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Matsumoto according to the teachings of DiTommaso et al. with the motivation to provide carrier aggregation that allows increased data rates and improved network performance (paragraph 0025). Regarding claim 4, Matsumoto modified by DiTommaso et al. teach wherein the second filter is coupled to a low-noise amplifier via the switch (Fig. 2 of Matsumoto, LTE-B41 receive-transmit filter described in document 2 is connected to an LTE-B41 LNA 70 via the back-end switch circuit 32 (fig. 2) of DiTommaso). Regarding claim 5, Matsumoto teaches wherein the first electronic component is disposed on the first major surface (Fig. 2 of Matsumoto). Regarding claim 6, Matsumoto teaches wherein the second electronic component is disposed between the second major surface and the third major surface (Figs. 2-4, Figs. 3 & 4 of Matsumoto disclose a different embodiment wherein the second filter and switch is disposed between the second major surface and the third major surface with the motivation to improve degree of transmission-reception isolation (paragraph 0066)). Regarding claim 7, Matsumoto teaches wherein the third electronic component is disposed on the fourth major surface (Figs. 2& 4, Fig. 4 of Matsumoto discloses a different embodiment wherein switch is disposed on the fourth major surface with the motivation to improve degree of transmission-reception isolation (paragraph 0066)). Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2021/0050876) in view of Tsuda et al. (US 2020/0251459). Regarding claim 10, Matsumoto teaches all of the limitations as discussed above. Matsumoto does not explicitly disclose wherein the third electronic component includes a power amplifier (PA) controller that controls the power amplifier. Tsuda et al. teach high-frequency module comprising a power amplifier (PA) controller (Figs. 1B-1C, element 74, paragraph 0057) that controls the power amplifier (Figs. 1B-1C, element 14, paragraph 0057) It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Matsumoto according to the teachings of Tsuda et al. with the motivation to control the gain of the power amplifier. Cited Prior Art The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/ Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Sep 29, 2023
Application Filed
Apr 24, 2026
Non-Final Rejection mailed — §103
Jul 06, 2026
Interview Requested
Jul 15, 2026
Applicant Interview (Telephonic)
Jul 16, 2026
Examiner Interview Summary

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
91%
With Interview (-0.1%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 987 resolved cases by this examiner. Grant probability derived from career allowance rate.

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