Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
DETAILED ACTION
This office action is in response to application 18/479724 filed on 10/02/23.
Claims 1-20 are remain pending in the application.
Oath/Declaration
The oath/declaration filed on October 02th, 2023 is acceptable.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Shen et al. (U.S. Patent No. 11281972).
As to claims 1 the prior art teaches a non-transitory computer-readable medium having computer-executable instructions stored thereon that, in response to execution by one or more processors of a computing system, cause the computing system to perform actions for creating a design for an optoelectronic detector device (see fig 1A element 140), the actions comprising:
determining, by the computing system, an initial design that includes structural parameters for an optically active region and circuit parameters for at least one photodetector region and for conductors that couple the photodetector region to circuitry (see fig 1-2 col. 43 lines 42 to col. 44 lines 60);
simulating, by the computing system, performance of the optically active region to generate a plurality of field values (see fig 1-6 col. 65 lines 3 to col. 66 lines 35);
simulating, by the computing system, performance of the at least one photodetector region based on the plurality of field values to generate charge values (see fig 1-6 col. 66 lines 1-67);
simulating, by the computing system, performance of at least the conductors based on the charge values to generate a performance loss value (see fig 5-8 col. 69 lines 49 to col. 70 lines 45);
determining, by the computing system, a loss metric based on the performance loss value (see fig 5-8 col. 70 lines 23 to col. 72 lines 40);
backpropagating, by the computing system, the loss metric to determine at least a circuit parameter gradient (see fig 5-10 col. 72 lines 60 to col. 74 lines 45);
and revising, by the computing system, the circuit parameters based at least in part on the circuit parameter gradient to create an updated initial design (see fig 5-10 col. 74 lines 30 to col. 76 lines 50).
As to claims 2 and 12 the prior art teaches wherein the actions further comprise: repeating the simulating performance of the optically active region, simulating performance of the at least one photodetector region, simulating performance of at least the conductors, determining the loss metric, backpropagating the loss metric, and revising the circuit parameters to further update the updated initial design (see fig 6-12 col. 76 lines 42 to col. 78 lines 30).
As to claims 3 and 13, the prior art teaches wherein the circuit parameters include a shape and a location of at least one doped region (see fig 1-6 col. 65 lines 42 to col. 66 lines 60);
and wherein revising the circuit parameters includes changing at least one of the shape and the location of the at least one doped region (see fig 1-6 col. 66 lines 34 to col. 67 lines 67).
As to claim 4 and 14, the prior art teaches wherein the circuit parameters include a shape and a location of at least one conductor (see fig 6-8 col. 69 lines 40 to col. 70 lines 60);
and wherein revising the circuit parameters includes changing at least one of the shape and the location of the at least one conductor (see fig 1-6 col. 70 lines 23 to col. 71 lines 50).
As to claim 5 and 15, the prior art teaches wherein simulating performance of at least the conductors based on the charge values includes determining a parasitic inductance of at least one contact point, via, bond wire, ball grid, trace, or wire (see fig 5-8 col. 70 lines 1-67).
As to claim 6 and 16, the prior art teaches wherein the performance loss value includes a measurement of a simulated charge value received by the circuitry (see fig 5-8 col. 70 lines 40 to col. 71 lines 45).
As to claim 7 and 17 the prior art teaches wherein the measurement of the simulated charge value received by the circuitry includes a characteristic of an eye diagram; and wherein determining the loss metric based on the performance loss value includes comparing the characteristic of the eye diagram to a desired characteristic of the eye diagram (see fig 5-8 col. 69 lines 49 to col. 70 lines 45).
As to claim 8 and 18, the prior art teaches wherein the characteristic of the eye diagram represents an amount of time to transition between logical states (see fig 6-10 col. 75 lines 50 to col. 76 lines 60).
As to claim 9 and 19 the prior art teaches wherein the characteristic of the cyc diagram represents a signal-to-noise ratio (see fig 6-11 col. 77 lines 20 to col. 78 lines 45).
As to claim 10 and 20, the prior art teaches wherein simulating performance of the at least one photodetector region includes simulating the performance of the at least one photodetector region over time (see fig 5-8 col. 68 lines 50 to col. 70 lines 10).
As to claim 11 the prior art teaches a computer-implemented method of creating a design for an optoelectronic detector device (see fig 1A element 140), the method comprising:
determining, by a computing system, an initial design that includes structural parameters for an optically active region and circuit parameters for at least one photodetector region and for conductors that couple the photodetector region to circuitry (see fig 1-2 col. 43 lines 42 to col. 44 lines 60);
simulating, by the computing system, performance of the optically active region to generate a plurality of field values (see fig 1-6 col. 65 lines 3 to col. 66 lines 35);
simulating, by the computing system, performance of the at least one photodetector region based on the plurality of field values to generate charge values (see fig 1-6 col. 66 lines 1-67);
simulating, by the computing system, performance of at least the conductors based on the charge values to generate a performance loss value (see fig 5-8 col. 69 lines 49 to col. 70 lines 45);
determining, by the computing system, a loss metric based on the performance loss value (see fig 5-8 col. 70 lines 23 to col. 72 lines 40);
backpropagating, by the computing system, the loss metric to determine at least a circuit parameter gradient (see fig 5-10 col. 72 lines 60 to col. 74 lines 45);
and revising, by the computing system, the circuit parameters based at least in part on the circuit parameter gradient to create an updated initial design (see fig 5-10 col. 74 lines 30 to col. 76 lines 50).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BINH C TAT whose telephone number is 571 272-1908. The examiner can normally be reached on flex 7:00Am-8PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached on 571 272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BINH C TAT/Primary Examiner, Art Unit 2851
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