DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 3-4, 6, 9-12, 14 and 18-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 2/9/2026.
Claims 1-2, 5, 7-8, 13, 15-17 are elected and examined.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the elements listed below must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Claim 16: “a second portion of the lower portion of the second encapsulant is disposed between the first set of the plurality of bumps and the first redistribution structure” is not shown.
Per claim 1, the second encapsulant 162 has “a lower portion surrounded by the first redistribution structure” 110 so the second portion of the lower portion should also be surrounded by the first redistribution structure 110. There is no such second portion “disposed between the first set of the plurality of bumps and the first redistribution structure” as claimed because any portion of the second encapsulant 162 between the first set of the plurality of bumps 118 and the first redistribution structure 110 is not surrounded by the first redistribution structure.
Claim 17: “a second portion of the lower portion of the second encapsulant is disposed between the first set of the plurality of bumps and the first redistribution structure” is not shown.
Per claim 17, the second encapsulant 162 has “a lower portion surrounded by the first redistribution structure” 110 so the second portion of the lower portion should also be surrounded by the first redistribution structure 110. There is no such second portion “disposed between the first set of the plurality of bumps and the first redistribution structure” as claimed because any portion of the second encapsulant 162 between the first set of the plurality of bumps 118 and the first redistribution structure 110 is not surrounded by the first redistribution structure.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 16-17 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 16 and 17, both claims recite “a second portion of the lower portion of the second encapsulant is disposed between the first set of the plurality of bumps and the first redistribution structure” which causes the claims to fail to comply with written description requirement.
The second encapsulant 162 has “a lower portion surrounded by the first redistribution structure” 110 as a requirement, so the second portion of the lower portion should also be surrounded by the first redistribution structure 110. There is no such second portion “disposed between the first set of the plurality of bumps and the first redistribution structure” as claimed because any portion of the second encapsulant 162 between the first set of the plurality of bumps 118 and the first redistribution structure 110 is not surrounded by the first redistribution structure.
PNG
media_image1.png
415
744
media_image1.png
Greyscale
Claims 16-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Note: Conflicts/inconsistencies between the specification and the claims is the basis of indefiniteness per MPEP 2173.03 – “A claim, although clear on its face, may also be indefinite when a conflict or inconsistency between the claimed subject matter and the specification disclosure renders the scope of the claim uncertain as inconsistency with the specification disclosure or prior art teachings may make an otherwise definite claim take on an unreasonable degree of uncertainty.”
Regarding claims 16 and 17, both claims recite “a second portion of the lower portion of the second encapsulant is disposed between the first set of the plurality of bumps and the first redistribution structure” which conflicts with the specification.
The second encapsulant 162 has “a lower portion surrounded by the first redistribution structure” 110 as a requirement, so the second portion of the lower portion should also be surrounded by the first redistribution structure 110. There is no such second portion “disposed between the first set of the plurality of bumps and the first redistribution structure” as claimed because any portion of the second encapsulant 162 between the first set of the plurality of bumps 118 and the first redistribution structure 110 is not surrounded by the first redistribution structure.
PNG
media_image1.png
415
744
media_image1.png
Greyscale
Hence, claims 16 and 17 are indefinite.
Claim Rejections - 35 USC § 102 and 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Brown (US 4729061 A).
Regarding claim 1, Brown discloses a semiconductor package (Fig. 10) comprising:
a first redistribution structure (100, “”three laminates or PC boards are used to form composite 100 , thus providing four conductive layers from which the circuit traces may be formed) in which at least one first redistribution layer (“four conductive layers from which the circuit traces may be formed”) and at least one first insulating layer (130/170/110) are alternately layered;
a first semiconductor chip (154) disposed on an upper (not uppermost) surface of the first redistribution structure;
a second semiconductor chip (154’) having a lower portion (Fig. 10) surrounded by the first redistribution structure (by 130 of 100);
a first encapsulant (top 158) disposed on the upper (not uppermost) surface of the first redistribution structure to encapsulate the first semiconductor chip (154);
a second encapsulant (bottom 158) encapsulating the second semiconductor chip (154’) and having a lower portion (Fig. 10) surrounded by the first redistribution structure (by 130 of 100); and
a conductive support layer (174) supporting the second semiconductor chip (154’) and the second encapsulant (bottom 158), wherein the conductive support layer (174) is disposed directly on (on a straight line per https://www.thefreedictionary.com/directly) an upper surface (bottommost in Fig. 10 per orientation of 154’) of the second semiconductor chip opposite to the lower portion of the second semiconductor chip (note: the claim should recite direct physical contact between the conductive support layer and the upper surface of the second semiconductor chip to overcome Brown; examiner’s suggestion is based on Fig. 1A of instant application).
PNG
media_image2.png
266
624
media_image2.png
Greyscale
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) or 35 U.S.C. 102(a)(2) as being anticipated by Suk et al. (US 20220102282 A1).
Regarding claim 1, Suk discloses a semiconductor package (Fig. 10) comprising:
a first redistribution structure (100) in which at least one first redistribution layer (110/120) and at least one first insulating layer (“The dielectric layers 101, 103, 105, and 107”) are alternately layered;
a first semiconductor chip (210) disposed on an upper surface of the first redistribution structure (100);
a second semiconductor (comprises Si per [0046]) chip (400) having a lower portion (bottommost in Fig. 10) surrounded by the first redistribution structure (100);
a first encapsulant (360) disposed on the upper surface of the first redistribution structure (100) to encapsulate the first semiconductor chip (210);
a second encapsulant (300) encapsulating the second semiconductor chip (400) and having a lower portion (bottommost in Fig. 10) surrounded by the first redistribution structure (100); and
a conductive support layer (213/215/411) supporting (by being bonded to 300 and 400) the second semiconductor chip (400) and the second encapsulant (300), wherein the conductive support layer (213/215/411) is disposed directly on an upper surface (topmost in Fig. 10) of the second semiconductor chip (400) opposite to the lower portion of the second semiconductor chip (213/215/411 directly contacts an upper surface, topmost in Fig. 10, of 400).
PNG
media_image3.png
532
724
media_image3.png
Greyscale
PNG
media_image4.png
630
830
media_image4.png
Greyscale
Regarding claim 2, Suk discloses the semiconductor package of claim 1, wherein the first encapsulant (360) is in direct (physical) contact with at least one of the conductive support layer and the second encapsulant (300. Fig. 10).
Claims 1, 2 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Scanlan et al. (US 20160379933 A1).
Regarding claim 1, Scanlan discloses a semiconductor package (Fig. 2) comprising:
a first redistribution structure (12, “The substrate 12 is preferably fabricated from an insulative or dielectric material, and may comprise a laminate structure”)
a first semiconductor chip (26) disposed on an upper surface of the first redistribution structure;
a second semiconductor chip (48) having a lower portion (bottommost in Fig. 2) surrounded by the first redistribution structure;
a first encapsulant (62) disposed on the upper surface of the first redistribution structure to encapsulate the first semiconductor chip;
a second encapsulant (56) encapsulating the second semiconductor chip and having a lower portion (bottommost in Fig. 2) surrounded by the first redistribution structure; and
a conductive support layer (68) supporting (indirectly and via bonding of layers) the second semiconductor chip (48) and the second encapsulant (56), wherein the conductive support layer (68) is disposed directly on (on a straight line per https://www.thefreedictionary.com/directly) an upper surface (topmost in Fig. 2) of the second semiconductor chip (Fig. 2) opposite to the lower portion of the second semiconductor chip (note: the claim should recite direct physical contact between the conductive support layer and the upper surface of the second semiconductor chip to overcome Scalan; examiner’s suggestion is based on Fig. 1A of instant application)
PNG
media_image5.png
319
582
media_image5.png
Greyscale
Scanlan fail to disclose a first redistribution structure “in which at least one first redistribution layer and at least one first insulating layer are alternately layered”.
However, since Scanlan discloses “The substrate 12 is preferably fabricated from an insulative or dielectric material, and may comprise a laminate structure”, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to provide alternating redistribution and insulating layer in the substrate 12 of Scanlan and thereby arrive at the claimed invention so as to enable means for transmitting signals from inside the package to the PCB 72 outside the package and thereby enable means for electrically addressing the inner devices within the package, and/or, because alternating RDLs and insulation layers comprise a common and well-known packaging substrate configuration wherein the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07) and their use would have yielded predictable results.
Regarding claim 2, Scanlan discloses the semiconductor package of claim 1, wherein the first encapsulant (62) is in direct contact with at least one of the conductive support layer (68) and the second encapsulant (56, Fig. 10).
Regarding claim 15, Scanlan discloses the semiconductor package of claim 1, further comprising a plurality of bumps (24/46) having a first set of the plurality of bumps (24) electrically connected to the first semiconductor chip (26) and a second set of the plurality of bumps (46) electrically connected to the second semiconductor chip (48), and the second set of the plurality of bumps (46) bypasses the first redistribution structure (12) to be electrically connected to the second semiconductor chip (Figs. 1-2).
Claims 1, 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Meyer et al. (US 10522454 B2) in view of Scanlan et al. (US 20160379933 A1).
Regarding claim 1, Meyer discloses a semiconductor package (Fig. 2F) comprising:
a first redistribution structure (200) in which at least one first redistribution layer (206) and at least one first insulating layer (202/204) are alternately layered;
a first semiconductor chip (140) disposed on an upper surface of the first redistribution structure;
a second (passive) semiconductor chip (170) having a lower portion surrounded by the first redistribution structure;
a first encapsulant (110) disposed on the upper surface of the first redistribution structure to encapsulate the first semiconductor chip;
a second encapsulant (166/182) encapsulating the second semiconductor chip and having a lower portion surrounded by the first redistribution structure; and
PNG
media_image6.png
338
472
media_image6.png
Greyscale
Meyer fails to disclose a conductive support layer supporting the second semiconductor chip and the second encapsulant, wherein the conductive support layer is disposed directly on an upper surface of the second semiconductor chip opposite to the lower portion of the second semiconductor chip.
Scalan discloses (Fig. 2) a conductive support layer (68) supporting (indirectly and via bonding of layers) the second semiconductor chip (48) and the second encapsulant (56), wherein the conductive support layer (68) is disposed directly on (on a straight line per https://www.thefreedictionary.com/directly) an upper surface (topmost in Fig. 2) of the second semiconductor chip (Fig. 2) opposite to the lower portion (bottommost in Fig. 2) of the second semiconductor chip (note: the claim should recite direct physical contact between the conductive support layer and the upper surface of the second semiconductor chip to overcome Scalan; examiner’s suggestion is based on Fig. 1A of instant application).
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the conductive support of Scanlan in Meyer and arrive at the claimed invention so as to provide an RF shield (Scanlan, [0031]).
Regarding claim 2, Meyer/Scalan discloses the semiconductor package of claim 1, wherein the first encapsulant (110) is in direct contact with at least one of the conductive support layer and the second encapsulant (166/182, Fig. 2F).
Regarding claim 13, Meyer/Scalan discloses the semiconductor package of claim 1, wherein a thickness of the second semiconductor chip (170) is thicker (MPEP 2125) than a thickness of the first semiconductor chip (140, Fig. 2F).
Allowable Subject Matter
Claims 5, 7-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fail to disclose or suggest (claim 5) further comprising a core insulating layer comprising: a first cavity in which the first semiconductor chip is disposed; and a second cavity in which the second semiconductor chip is disposed, and disposed on the upper surface of the first redistribution structure; claims 7-8 depend from claim 5.
Examiner Note
Claims 16 and 17 are not rejected over prior art. Claims 16 and 17 are rejected over 35 USC 112 for (a) failing to comply with the written description requirement and (b) being indefinite as detailed above. A prior art rejection has not been found at this time and a decision on patentability could not be made in view of the 35 USC 112 rejections included herein.
Response to Arguments
Applicant's arguments filed 6.5.2026 have been fully considered but they are not persuasive.
The applicant alleges “a second portion of the lower portion of the second encapsulant is disposed between the first set of the plurality of bumps and the first redistribution structure” of claims 16 and 17 has proper support in Fig. 1A. Applicant provides the following annotated figure as support:
PNG
media_image7.png
386
634
media_image7.png
Greyscale
However, the examiner notes that the second encapsulant 162 has “a lower portion surrounded by the first redistribution structure” 110 as a requirement, so the second portion of the lower portion should also be surrounded by the first redistribution structure 110.
There is no such second portion “disposed between the first set of the plurality of bumps and the first redistribution structure” as claimed because any portion of the second encapsulant 162 between the first set of the plurality of bumps 118 and the first redistribution structure 110 is not surrounded by the first redistribution structure.
PNG
media_image1.png
415
744
media_image1.png
Greyscale
Hence, it appears that any portion of the second encapsulant 162 disposed between the first set of the plurality of bumps and the first redistribution structure cannot be part of the lower portion of the second encapsulant.
For this reason, the examiner objects to the drawings and rejects claims 16 and 17 under 35 USC 112.
The applicant alleges:
PNG
media_image8.png
106
674
media_image8.png
Greyscale
This is not found persuasive because “directly on” does not require direct physical contact as the applicant alleges. In this case, Brown discloses a conductive support layer (174) supporting the second semiconductor chip (154’) and the second encapsulant (bottom 158), wherein the conductive support layer (174) is disposed directly on (on a straight line per https://www.thefreedictionary.com/directly) an upper surface (bottommost in Fig. 10 per orientation of 154’) of the second semiconductor chip opposite to the lower portion of the second semiconductor chip (note: the claim should recite direct physical contact between the conductive support layer and the upper surface of the second semiconductor chip to overcome Brown; examiner’s suggestion is based on Fig. 1A of instant application).
PNG
media_image2.png
266
624
media_image2.png
Greyscale
The applicant alleges:
PNG
media_image9.png
58
662
media_image9.png
Greyscale
And,
PNG
media_image10.png
68
674
media_image10.png
Greyscale
This is not persuasive because Suk discloses a conductive support layer (213/215/411) supporting (by being bonded to 300 and 400) the second semiconductor chip (400) and the second encapsulant (300), wherein the conductive support layer (213/215/411) is disposed directly on an upper surface (topmost in Fig. 10) of the second semiconductor chip (400) opposite to the lower portion of the second semiconductor chip (213/215/411 directly contacts an upper surface, topmost in Fig. 10, of 400).
PNG
media_image3.png
532
724
media_image3.png
Greyscale
PNG
media_image4.png
630
830
media_image4.png
Greyscale
The applicant alleges:
PNG
media_image11.png
250
642
media_image11.png
Greyscale
This is not persuasive because Scalan discloses a conductive support layer (68) supporting (indirectly and via bonding of layers) the second semiconductor chip (48) and the second encapsulant (56), wherein the conductive support layer (68) is disposed directly on (on a straight line per https://www.thefreedictionary.com/directly) an upper surface (topmost in Fig. 2) of the second semiconductor chip (Fig. 2) opposite to the lower portion of the second semiconductor chip (note: the claim should recite direct physical contact between the conductive support layer and the upper surface of the second semiconductor chip to overcome Scalan; examiner’s suggestion is based on Fig. 1A of instant application).
PNG
media_image5.png
319
582
media_image5.png
Greyscale
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andres Munoz/Primary Examiner, Art Unit 2818
Prosecution Insights