DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al., US 2010/0068868 (hereafter Kim) in view of Sugiya, US 2020/0111658 (hereafter Sugiya) and Nakamura, US 2021/0257256
Regarding claim 1, Kim teaches a method of processing a wafer that includes temporary bonding (Abstract; para [0033]) and grinding (para [0034]). The method includes the steps of:
a plasma activation processing step of performing plasma processing on at least either one surface of a first wafer or one surface of a second wafer and thus activating the at least one surface that has been subjected to the plasma processing, to thereby join the first wafer and the second wafer (Figs. 1 and 2 illustrating an activating process, that may be a plasma activation on carrier wafer 100 and/or device wafer 200 (paras [0029]-[0031]));
a bonded wafer forming step of, after performing the plasma activation processing step, forming a bonded wafer by provisionally joining the one surface of the first wafer and the one surface of the second wafer (bonding taught at Figs. 3 and 4 and paras [0032]- [0033]) ;
performing anneal processing on the bonded wafer to increase joint strength between the first wafer and the second wafer (Fig. 4; para [0033]); and
a grinding step of, after performing the anneal processing step, grinding the first wafer of the bonded wafer from another surface of the first wafer to thin the first wafer to a predetermined finish thickness (Fig. 5; para [0034]).
Kim is silent as to performing process steps between bonding and anneal processing of:
a modified layer forming step of, after performing the bonded wafer forming step, forming modified layers in an annular pattern inside the first wafer by applying a laser beam of a wavelength having transmissivity for the first wafer, in the annular pattern to the first wafer along a position on a side inner by a predetermined distance than an outer peripheral edge of the first wafer; and
an outer peripheral region removal step of, after performing the modified layer forming step, removing an outer peripheral region of the first wafer, the outer peripheral region being on a side of the outer peripheral edge relative to the position where the modified layers have been formed in the annular pattern, by applying an external force to the outer peripheral region.
Sugiya teaches a wafer processing method that includes a bonding step of bonding a front surface side of a first wafer chamfered at a peripheral edge portion thereof to a front surface side of a second wafer, followed by a grinding step of thinning the first wafer (Abstract; para [0005]). Sugiya further teaches a modified layer forming step wherein a laser beam is transmitted through the first wafer at a predetermined distance from the chamfered edge to form an annular modified layer inside the first wafer, such step performed before the grinding step (Abstract and para [0006]). Sugiya teaches that by forming the modified layer, cracks (depicted in Fig. 10) formed by chipping at the peripheral edge 8 of the first wafer 1-1 during the grinding/thinning step are restrained from extending to the device region 3 because of the presence of the modified annular layer formed by the laser (para [0006]; Fig. 8 and para [0044]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the claims of the invention to modify the method of Kim to include the formation of an annular laser modified layer according Sugiya for the advantages taught in Sugiya, including that of protecting the device region from cracks forming outside of the device region during the grinding (thinning) operation of the first wafer.
Kim/Sugiya is silent as to a step of removing a wafer outer peripheral region after the modified layer forming step.
Nakamura is directed to a wafer processing method that includes forming an annular modified layer in a wafer formed by irradiating the wafer with a laser beam, followed by performing a separating step wherein a part or a whole of a peripheral surplus region is removed from the wafer with the annular modified layer being a starting point (Abstract; paras [0020]-[0032]). Nakamura teaches the surplus region is separated easily because of the shape of the laser modified layers (para [0036]). The wafer from which the chamfered, peripheral surplus region is removed is then transferred to a chuck table wherein the undersurface of the wafer is oriented upward and a grinding step is performed (paras [0033]-[0035]). Nakamura teaches that when a wafer having an outer chamfer is thinned by grinding, the outer circumferential edge of the wafer becomes sharp and thin, like a knife edge (para [0003]). This is undesirable because the knife edge results in chipping occurring during the grinding process and cracks from such chipping may reach the device region and damage the devices on the wafer (para [0003]). In order to solve this problem, Nakamura teaches removal of the peripheral surplus region that has the chamfered portion (para [0003]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the claims of the invention to modify the method of Kim/Sugiya to include the steps of forming the modified region into a shape as taught by Nakamura, and removing a peripheral region of the wafer located between the laser modified region and the chamfered edge of the wafer as taught by Nakamura, for the advantages taught in Nakamura, including easily removing the chamfered edge so that no sharp edges result from grinding the chamfered edge into a knife edge during the grinding operation, thus lessening the possibility of cracks at the laser modified layer that might extend into the device region.
Regarding the claim 1 requirement that the anneal processing step is performed after the outer peripheral region removal step, in view of the Nakamura teaching that the removal step is easily performed because of the shape of the laser modified layers (para [0036]), one of ordinary skill is taught that the external force required to remove the peripheral region is negligible and thus annealing prior to edge separation would not be a required step. Thus, the placement of the anneal process either before or after the separation step would be understood as suitable and thus predictable in view of the teachings of Nakamura.
Regarding claim 2, Sugiya teaches the formation of the annular modified layer 13 by applying a laser beam 21 plural times while changing the height of the focal point 21-1 of the laser beam 21 to thereby form a plurality of modified layers 13 (see Fig. 8 modified layers 13 illustrated as extending in the thickness direction of the first wafer and para [0047]). See also Nakamura teaching a plurality of modified layers 100 that form the shape of a circular truncated cone (para [0031]) and that the laser beam LB forms layers, understood to be overlapping by moving the position of the condensing point inward and upward (para [0030]).
Regarding claim 4, Kim teaches a method of processing a wafer that includes temporary bonding (Abstract; para [0033]) and grinding (para [0034]). The method includes the steps of:
a plasma activation processing step of performing plasma processing on at least either one surface of a first wafer or one surface of a second wafer and thus activating the at least one surface that has been subjected to the plasma processing, to thereby join the first wafer and the second wafer (Figs. 1 and 2 illustrating an activating process, that may be a plasma activation on carrier wafer 100 and/or device wafer 200 (paras [0029]-[0031]));
a bonded wafer forming step of, after performing the plasma activation processing step, forming a bonded wafer by provisionally joining the one surface of the first wafer and the one surface of the second wafer (bonding taught at Figs. 3 and 4 and paras [0032]-[0033]);
performing anneal processing on the bonded wafer to increase joint strength between the first wafer and the second wafer (Fig. 4; para [0033]); and
a grinding step of, after performing the anneal processing step, grinding the first wafer of the bonded wafer from another surface of the first wafer to thin the first wafer to a predetermined finish thickness (Fig. 5; para [0034]).
Kim is silent as to performing a process step between bonding and anneal processing of: a modified layer forming step of, after performing the bonded wafer forming step, forming modified layers in an annular pattern inside the first wafer and also forming cracks in such a manner as to spread from the modified layers and appear on the one surface of the first wafer, by applying a laser beam of a wavelength having transmissivity for the first wafer, in the annular pattern to the first wafer along a position on a side inner by a predetermined distance than an outer peripheral edge of the first wafer.
Sugiya teaches a wafer processing method that includes a bonding step of bonding a front surface side of a first wafer chamfered at a peripheral edge portion thereof to a front surface side of a second wafer, followed by a grinding step of thinning the first wafer (Abstract; para [0005]). Sugiya further teaches a modified layer forming step wherein a laser beam is transmitted through the first wafer at a predetermined distance from the chamfered edge to form an annular modified layer inside the first wafer, such step performed before the grinding step (Abstract and para [0006]). With reference to Fig. 8, Sugiya teaches the annular modified layer 13 inside the first wafer 1-1 on the outer periphery side (as compared to the device region 3) may further include a crack generated to extend in the thickness direction from the modified layer 13 (para [0047]). The crack is desirably equal to or more than the finished thickness 100 of the wafer (para [0047]), thus teaching the crack may appear on the one surface of the first wafer as recited in claim 4. Sugiya teaches that by forming the modified layer, other cracks (depicted in Fig. 10) formed by chipping at the peripheral edge 8 of the first wafer 1-1 during the grinding/thinning step are restrained from extending to the device region 3 because of the modified annular layer formed by the laser (para [0006]; Fig. 8 and para [0044]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the claims of the invention to modify the method of Kim to include the formation of an annular laser modified layer according Sugiya for the advantages taught in Sugiya, including that of protecting the device region from cracks forming outside of the device region during the grinding (thinning) operation of the first wafer.
Kim/Sugiya is silent as to performing a step between the anneal processing step and grinding step of: removing an outer peripheral region of the first wafer, the outer peripheral region being on a side of the outer peripheral edge relative to the position where the modified layers have been formed in the annular pattern, by applying an external force to the outer peripheral region.
Nakamura is directed to a wafer processing method that includes forming an annular modified layer in a wafer formed by irradiating the wafer with a laser beam, followed by performing a separating step wherein a part or a whole of a peripheral surplus region is removed from the wafer with the annular modified layer being a starting point (Abstract; paras [0020]-[0032]). Nakamura teaches the surplus region is separated easily because of the shape of the laser modified layers (para [0036]). The wafer from which the chamfered, peripheral surplus region is removed is then transferred to a chuck table wherein the undersurface of the wafer is oriented upward and a grinding step is performed (paras [0033]-[0035]). Nakamura teaches that when a wafer having an outer chamfer is thinned by grinding, the outer circumferential edge of the wafer becomes sharp and thin, like a knife edge (para [0003]). This is undesirable because the knife edge results in chipping occurring during the grinding process and cracks from such chipping may reach the device region and damage the devices on the wafer (para [0003]). In order to solve this problem, Nakamura teaches removal of the peripheral surplus region that has the chamfered portion (para [0003]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the claims of the invention to modify the method of Kim/Sugiya to include the steps of forming the modified region into a shape as taught by Nakamura, and removing a peripheral region of the wafer located between the laser modified region and the chamfered edge of the wafer as taught by Nakamura, for the advantages taught in Nakamura, including easily removing the chamfered edge so that no sharp edges result from grinding the chamfered edge into a knife edge during the grinding operation, thus lessening the possibility of cracks at the laser modified layer that might extend into the device region.
Regarding the claim 4 requirement that the anneal processing step is performed after the modified layer forming step and before the outer peripheral region removal step, in view of the Nakamura teaching that the removal step is easily performed because of the shape of the laser modified layers (para [0036]), one of ordinary skill is taught that the external force required to remove the peripheral region is negligible and thus the placement of the anneal process before or after the separation step would be suitable and thus predictable.
Regarding claim 5, Sugiya teaches the formation of the annular modified layer 13 by applying a laser beam 21 plural times while changing the height of the focal point 21-1 of the laser beam 21 to thereby form a plurality of modified layers 13 (see Fig. 8 modified layers 13 illustrated as extending in the thickness direction of the first wafer and para [0047]). See also Nakamura teaching a plurality of modified layers 100 that form the shape of a circular truncated cone (para [0031]) and that the laser beam LB forms layers, understood to be overlapping by moving the position of the condensing point inward and upward (para [0030]).
Claims 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Sugiya and Nakamura as applied to respective claims 1 and 4 and further in view of Mori et al., US 2022/0044935 (hereafter Mori).
Regarding each of claims 3 and 5, Kim/Sugiya/Nakamura is silent as to performing the modified layer forming step with a laser beam having a plurality of focal points apart from one another in a thickness direction of the first wafer that is applied to the first wafer such that modified layers are formed in a like plurality of annular patterns overlapping in the thickness direction of the first wafer.
Mori teaches a substrate (e.g., wafer para [0038]) processing apparatus configured to form an internal modification layer by radiating laser light internally by adjusting at least a shape or a number of the laser lights (Abstract). Both the size of modified layer (Fig. 22B) and a position of a plurality of modified layers (Fig. 22C) may be adjusted by the apparatus of Mori (para 00007]). The apparatus of Mori may be adjusted to radiate a single laser light into a target wafer from the laser head or multiple laser lights may be radiated, the laser head of Mori being capable of adjusting the shape and number of laser lights (para [0121]). Thus, Mori teaches apparatus capable of performing the recited plurality of focal points apart from one another in a thickness direction recited in claims 4 and 6.
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the claims of the invention to modify the method of Kim/Sugiya/Nakamura to alternatively form the plurality of laser modified layers by a single laser apparatus according to Mori, capable of forming a plurality of focal points apart from one another in a single operation, as a predictable, suitable alternative method as it has been held that the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. MPEP 2141 discussing KSR International Co. v. Teleflex Inc., 550 U.S. 398, 415-416, 82 USPQ2d 1385, 1395 (2007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Hsieh et al., US 2008/0044984 (teaches a wafer edge trimming step, that may be after bonding a wafer to a substrate wherein a blade is used to remove a portion of the wafer peripheral edge prior to a grinding step (Abstract)).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CYNTHIA L SCHALLER whose telephone number is (408)918-7619. The examiner can normally be reached Monday-Friday 8 - 4:30.
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/CYNTHIA L SCHALLER/Primary Examiner, Art Unit 1746