Prosecution Insights
Last updated: August 07, 2026
Application No. 18/480,548

METHOD AND CIRCUIT FOR OPERATING A NETWORK OR NETWORK SECTION

Non-Final OA §103
Filed
Oct 04, 2023
Priority
Oct 14, 2022 — DE 10 2022 126 893.4
Examiner
ZAMAN, FAISAL M
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
Turck Holding GmbH
OA Round
3 (Non-Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
629 granted / 933 resolved
+12.4% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
29 currently pending
Career history
969
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
65.6%
+25.6% vs TC avg
§102
15.4%
-24.6% vs TC avg
§112
11.4%
-28.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 933 resolved cases

Office Action

§103
DETAILED ACTION Response to Amendment Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant is advised that Claims 19 and 20 are currently labeled with the status identifier “(Original)”, however they should instead be labeled with the status identifier “(Withdrawn)” since they depend on a withdrawn claim (i.e., Claim 8). See 37 CFR 1.121(c). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5-7, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Vavilala (U.S. Patent Application Publication Number 2018/0131182) and Christie (U.S. Patent Application Publication Number 2020/0396106). Regarding Claim 1, Vavilala discloses a powered device (Figure 1, item 140) for connection to a power sourcing equipment (PSE) (Figure 1, item 110A) via a network line of a network (Figure 1, item 100), the powered device comprising as electronic components: a coupler (Figure 1, items 150/160) configured to connect the powered device to the PSE and for separating supply (Figure 2, item 265) and communication (Figure 2, item 263) received via the network line (paragraphs 0010-0011 and 0021), wherein the coupler has two PSE ports (Figure 1, items 150 and 160; i.e., the side of ports 150 and 160 that connect to Ethernet lines 170) and at least four powered device (PD) ports (Figure 1, items 150 and 160; i.e., each of the two PD ports 150 and 160 contains two outputs as shown in Figure 2 - one power output 265 and one data/communication output 263, for a total of four PD ports), of which at least two PD ports are power ports and at least two PD ports are communication ports (paragraph 0021); at least one logic unit (Figure 2, item 275); in addition to the coupler at least two input channels (Figure 2, items 263 and 265; i.e., there are two different PSE ports 150 and 160 in the PD 240[Figure 1]; each port 150 and 160 has one input channel [the combination of items 263 and 265] consisting of input data and input power, resulting in a total of two input channels) which are separate from the coupler (Figure 2; i.e., as can be seen in Figure 2, the equated “input channels” 263/265 are separate from the equated “coupler” 150 and 160 [shown as item 260 in Figure 2 - there may be two]), wherein the electronic components are supplied directly or indirectly via the two power ports and the supply line (Figure 2, item 265, paragraphs 0021-0022; i.e., the two port power outputs 265 coming from both PD ports 150 and 160 being equivalent to the claimed “supply line”). Vavilala does not expressly disclose a switching unit; a supply branch extending from the switching unit to the logic unit; and a supply line; wherein the switching unit is arranged in the supply line from the coupler to at least one of the at least two input channels, and wherein the logic unit includes a supply storage and/or is connected to the supply storage. In the same field of endeavor (e.g., power over ethernet devices), Christie teaches a switching unit (Figure 1, item 130); a supply branch (Figure 1, see unnumbered connection between items 130 and 150) extending from the switching unit to the logic unit (Figure 1, item 150, paragraph 0021; i.e., the battery pack 150 is capable of transmitting its state of health [SOH], which would indicate that there is some type of logic [e.g., a battery management system] within it); and a supply line (Figure 1, see entire supply line from port 110 all the way to device load 140); wherein the switching unit is arranged in the supply line from the coupler (Figure 1, item 110) to at least one of the input channels (Figure 1, see unnumbered connection between items 130 and 140; i.e., the input channel that connects to device load 140), and wherein the logic unit includes a supply storage (paragraph 0018) and/or is connected to the supply storage (paragraphs 0019 and 0022; i.e., the switching unit 130 can switch between transmitting power and not transmitting power from the logic unit 150 to the device load 140). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Christie’s teachings of power over ethernet devices with the teachings of Vavilala, for the purpose of ensuring the powered device is able to continuously receive power in the event the power sourcing equipment is no longer able to provide power. Regarding Claim 2, Christie teaches wherein the switching unit is configured to cause one or more pulses and/or a characteristic pulse pattern for at least a period of time, detectable by at least the logic unit and/or the supplying PSE (paragraph 0021; i.e., the switching unit 130 can transmit a signal [the claimed “one or more pulses”] to a remote device connected to the Ethernet cable [i.e., the PSE] of the state of health of the battery pack 150). Regarding Claim 3, Christie teaches wherein in the supply branch a supply unit is arranged which contains the supply storage (Figure 1, item 150) and/or at least one further supply storage and a power adapter. Regarding Claim 5, Christie teaches wherein the supply storage is configured and dimensioned in such a way that a level (size) and/or duration of the supply that can be provided does not enable operation of an output (paragraph 0015; i.e., the supply store 150 is only used as a supplement to the PoE power, but is not said to be able to enable operation of the output [i.e., the device load 140] on its own). Regarding Claim 6, Christie teaches wherein a load unit is provided in the supply line between the coupler and the switching unit (Figure 1, item 120, paragraph 0013; i.e., the powered device controller 120 consumes some amount of power in order to operate and is therefore considered equivalent to the claimed “load unit”). Regarding Claim 7, Christie teaches wherein in the supply line a supply measuring unit is provided which communicates with the switching unit and/or the logic unit (paragraph 0021; i.e., a state of health [SOH] signal can be transmitted to the switching unit 130), and wherein the switching unit is configured to generate a pulse depending on the supply value detected by the supply measuring unit (paragraph 0021; i.e., the switching unit 130 can transmit a signal [the claimed “pulse”] in response to the SOH being below a threshold). Regarding Claim 18, Christie teaches wherein the load unit is configured to communicate with the switching unit (paragraph 0014; i.e., power received from the PSE can be communicated from the load unit 120 to the switching unit 130 and further, state of health information can be communicated from the switching unit 130 to the load unit 120 [paragraph 0021]). Claims 4 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Vavilala and Christie as applied to claim 1 above, and further in view of Webb et al. (U.S. Patent Application Publication Number 2007/0283173). Regarding Claim 4, Vavilala and Christie do not expressly disclose wherein the supply storage comprises at least one passive storage component and at least one passive directional component. In the same field of endeavor (e.g., power over ethernet devices), Webb teaches wherein the supply storage comprises at least one passive storage component (Figure 2, item 270, paragraph 0031; i.e., a capacitor) and at least one passive directional component (Figure 2, item 236, paragraph 0028; i.e., a diode). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Webb’s teachings of power over ethernet devices with the teachings of Vavilala and Christie, for the purpose of providing a mechanism for preventing the supply storage from discharging when it is not yet intended to do so. Regarding Claim 17, Webb teaches wherein the storage component is a capacitance and/or an inductor and the at least one directional component is a diode (paragraphs 0028 and 0031). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure because each reference discloses a powered device that switches between network power and supply storage power. Response to Arguments Applicant's arguments filed 4/1/26 have been fully considered but they are not persuasive. Regarding Claim 1, Applicant argues “[a]mong those components are a coupler and at least two input channels, wherein the at least two input channels are provided in addition to the coupler and separate from the coupler. That is, the at least two input channels are to be distinguished from the ports of the coupler. A configuration like the one specified in claim 1 is not disclosed in Vavilala.” Response, page 7. The examiner disagrees. As previously explained (see Final rejection of 1/15/26, page 7), a “channel” is defined as “a path or link through which information passes between two devices.” See Microsoft Computer Dictionary, Fifth Edition (previously attached), page 94. As shown in Figure 1 of Vavilala, there are two different PSE ports 150 and 160. The combination of both of these PSE ports 150 and 160 is considered equivalent to the claimed “coupler”. There are two sets of two wires (items 263 and 265 connected to both of items 150 and 160) that together are considered equivalent to the claimed “at least two input channels”. As can be seen in Figure 2, the equated “input channels” 263/265 are separate from the equated “coupler” 150 and 160 (shown as item 260 in Figure 2 - there may be two) as required by the claim. Accordingly, it can be seen that Vavilala does in fact disclose the argued limitations. Therefore, the claims stand as previously rejected. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAISAL M ZAMAN, ESQ. whose telephone number is (571)272-6495. The examiner can normally be reached Monday - Friday, 8 am - 5 pm, alternate Fridays. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew J. Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FAISAL M ZAMAN/ Primary Examiner, Art Unit 2175
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Prosecution Timeline

Oct 04, 2023
Application Filed
Oct 08, 2025
Non-Final Rejection mailed — §103
Dec 29, 2025
Response Filed
Jan 15, 2026
Final Rejection mailed — §103
Apr 01, 2026
Request for Continued Examination
Apr 07, 2026
Response after Non-Final Action
Jul 17, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
81%
With Interview (+13.9%)
2y 10m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 933 resolved cases by this examiner. Grant probability derived from career allowance rate.

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