Prosecution Insights
Prosecution Insights
Tech Center 2800 • Art Units: 2111 2175 2185 2186 2838
This examiner grants 67% of resolved cases
Faisal M Zaman is an examiner in Tech Center 2800 and Art Unit 2111, with a high volume of 940 resolved cases. The allowance rate is 67.2 percent, providing a solid baseline for applicants. The median days to allowance is 1038, which is an important metric for managing client expectations regarding the duration of the patent process. An interview lift of 13.5 percent indicates that conducting an interview can improve the 67.2 percent allowance rate.
This lift suggests that the examiner is open to resolving issues through discussion. The 940 resolved cases provide a large sample size for these metrics in Art Unit 2111. The 1038 median days to allowance reflects the typical timeline for successful prosecution in Tech Center 2800. By considering the 13.5 percent interview lift, practitioners can better decide when to engage the examiner directly to move a case toward an allowance.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18232819 | FANOUT CONNECTIONS ON A HIGH-PERFORMANCE COMPUTING DEVICE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 19213754 | Blocking Latency Events in Multi-Die Architecture | Non-Final OA | Apple Inc. |
| 18936889 | USING CUSTOM TEMPLATES TO DEFINE NEW SYSTEM TYPES FOR INSTANTIATION | Non-Final OA | Apple Inc. |
| 19065302 | Processing System, Writing System For Real Time Clock Device, And Function Setting Method For Real Time Clock Device | Non-Final OA | SEIKO EPSON CORPORATION |
| 18859609 | SYSTEM OPERATION PLANNING DEVICE, DISPLAY DEVICE, SYSTEM OPERATION PLANNING METHOD, AND RECORDING MEDIUM | Final Rejection | NEC Corporation |
| 19025909 | POWER CONSERVING CLOCK CIRCUIT WITH FAST START-UP | Non-Final OA | Google LLC |
| 18775635 | SYSTEMS, APPARATUSES, METHODS, AND COMPUTER PROGRAM PRODUCTS FOR ACTIVATING OR DEACTIVATING A RADIO FREQUENCY IDENTIFICATION READER | Final Rejection | Hand Held Products, Inc. |
| 18657592 | CONTROL LOOP SUB-SYSTEM VOLTAGE MANAGEMENT | Non-Final OA | QUALCOMM Incorporated |
| 17711784 | CLOCKING ARCHITECTURE FOR A MULTI-DIE PACKAGE | Non-Final OA | Altera Corporation |
| 19004196 | CONTROLLER COMMAND SCHEDULING IN A MEMORY SYSTEM TO INCREASE COMMAND BUS UTILIZATION | Non-Final OA | Lodestar Licensing Group LLC |
| 18283631 | ARITHMETIC APPARATUS AND PROGRAM OPERATING METHOD | Final Rejection | Hitachi, Ltd. |
| 18823685 | CONTROLLER AND STORAGE DEVICE | Non-Final OA | SK hynix Inc. |
| 18903010 | SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION | Final Rejection | Texas Instruments Incorporated |
| 18902329 | Hardware Timer Manager Supporting Multiple Precision Levels | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18395697 | Isolation of a Networking Switch During Reboot | Non-Final OA | Texas Instruments Incorporated |
| 18895461 | COMMUNICATION SYSTEM AND POWER SUPPLY SWITCHING DEVICE | Final Rejection | DENSO CORPORATION |
| 19027714 | AUTOMATIC DETERMINATION OF DISPLAY DEVICE FUNCTIONALITY | Non-Final OA | ROKU, INC. |
| 18959384 | CHAINED RESOURCE LOCKING | Non-Final OA | Micron Technology, Inc. |
| 19185866 | CIRCUIT AND METHOD FOR LIMITING OVERVOLTAGE, PARTICULARLY FOR A DC-DC CONVERTER | Non-Final OA | STMicroelectronics International N.V. |
| 18394675 | POWER DOMAINS IN A SYSTEM ON A CHIP | Non-Final OA | Advanced Micro Devices, Inc. |
| 18393662 | GENERATION OF OVERCLOCKING PROFILE RECOMMENDATIONS FOR COMPUTING SYSTEMS | Final Rejection | Advanced Micro Devices, Inc. |
| 18888415 | LOGIC RETENTION SUPPORT IN A DATA PROCESSING SYSTEM | Final Rejection | Arm Limited |
| 18772180 | Lean Network Communications Stack with Recovery Protocol for an NVMe Boot Partition | Non-Final OA | Dell Products L.P. |
| 18619710 | EXTERNAL POWER SUPPLY MANAGEMENT FOR ENHANCEMENT OF WORKLOAD PERFORMANCE | Non-Final OA | Dell Products L.P. |
| 19097394 | Sorting and Placing Nodes of an Operation Unit Graph onto a Reconfigurable Processor | Non-Final OA | SambaNova Systems, Inc. |
| 19081647 | COMPILER THAT GENERATES CONFIGURATION INFORMATION FOR CONFIGURING AN INTEGRATED CIRCUIT TO MITIGATE INDUCTIVE-INDUCED VOLTAGE DROOP | Non-Final OA | SambaNova Systems, Inc. |
| 18480548 | METHOD AND CIRCUIT FOR OPERATING A NETWORK OR NETWORK SECTION | Non-Final OA | Turck Holding GmbH |
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