Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The following is in response to the communication filed 6/18/2026.
Claims 1-20 are currently pending.
Claims 5-8 and 12-20 have been withdrawn.
Claims 1-4 and 9-11 have been examined.
Priority
Acknowledgment is made of applicant' s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to Taiwan Patent Application Serial No. 112131309 filed on August 21, 2023. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restriction
Applicant's election without traverse Group I, Species B of claims 1-4 and 9-11, in the reply filed on 6/18/2026, is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 3/20/2025, 10/04/2023, and 6/11/2024, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-4 and 9-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With regards to claim 1, the claim element “a blue to ultraviolet light reflective film being configured to reflect the emission light and generate a reflection light”. It is unclear to the examiner if the reflection light is a new light that is being emitting from the reflective film or if the generated light is taking blue light that was being reflected as emission light and “generating” ultraviolet light or if the reflection light is intended to be the same light that is currently labeled as both reflection light and emission light.
For the purposes of examination the element will be read as “a reflective film configured to that reflect emission light at least from blue to ultraviolet wavelengths, wherein a reflection light is the reflected emission light.”
Claims 2-4 and 9-11 are rejected based on their dependence to claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-4, and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Onoya et al. US 20220190270 A1 (hereinafter Onoya) in view of Saito US 20130221379 A1 (hereinafter Saito).
Regarding claim 1, Onoya discloses:
A monolithic optoelectronic metal oxide semiconductor field effect transistor (Opto-MOSFET) relay being connected to an input circuit and an output circuit, (Onoya, Fig. 2, [0007], A solid-state relay 100) comprising:
a substrate; ([0072] and [0087. See also Fig. 5A for cross-section semiconductor layer 212 being GaN.]
an epitaxial layer (n-type region 214 ) formed on the substrate, a groove formed on the epitaxial layer (See Fig. 5, which has regions in n-type region 214 that has 212a and 212b in groves) to divide the epitaxial layer into a high voltage region (circuit 102) and a low voltage region, (circuit 101) the high voltage region and the low voltage region are electrically isolated from each other; (See Fig. 2, circuit 101 and circuit 102 are isolated from each other by at least distance. See also Fig. 5A for cross-section.)
an isolation layer formed on the epitaxial layer; (Fig. 5A, insulating layer 222)
a light emitting diode (LED) (Fig. 2, lighting circuit 110) formed on the low voltage region of the epitaxial layer, being configured to receive an input signal from the input circuit and generate an emission light in response to the input signal; (See Fig. 2, [0099]-[0100])
…
a photodiode (PD) (detection circuit 120 with light-receiving element 121) formed on the high voltage region of the epitaxial layer, being configured to generate a sensing voltage in response to sensing the reflection light; ([0101])
a first MOSFET (memory 130 including transistor 131) formed on the high voltage region of the epitaxial layer and electrically connected to the photodiode, being configured to generate a first output current to the output circuit after being driven by the sensing voltage; ([0104]) and
a second MOSFET(memory 130 including transistor 132) formed on the high voltage region of the epitaxial layer and electrically connected to the photodiode, being configured to generate a second output current to the output circuit after being driven by the sensing voltage; ([0104])
wherein the LED, the PD, the first MOSFET and the second MOSFET are formed on the substrate. (See Fig. 2, lighting circuit 110, detection circuit 120 and transistors 131 and 132 are formed on the substrate for the solid-state relay 100.)
Onoya does not appear to disclose:
a blue to ultraviolet light reflective film being configured to reflect the emission light and generate a reflection light;
Saito, which teaches a photo coupler between a light emitting device and electrical portion (Saito, Abstract), discloses:
a blue to ultraviolet light reflective film being configured to reflect the emission light and generate a reflection light; (Fig. 5, white resin layer 41)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Onoya to have a blue to ultraviolet light reflective film being configured to reflect the emission light and generate a reflection light as taught by Saito for purposes of increase the light coupling efficiency. (Saito, [0071].)
Regarding claim 3, Onoya and Saito disclose all the elements of claim 1.
Saito further discloses:
the monolithic Opto-MOSFET relay is encapsulated by a molding compound (Saito, Fig. 5, opaque container 18) after the blue to ultraviolet light reflective film (white resin layer 41) is coated on the isolation layer. (first translucent resin 17)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Onoya and Saito to have the monolithic Opto-MOSFET relay is encapsulated by a molding compound after the blue to ultraviolet light reflective film is coated on the isolation layer as taught by Saito for purposes of isolate the device from outside light.
Regarding claim 4, Onoya and Saito disclose all the elements of claim 3.
Saito further discloses:
wherein the blue to ultraviolet light reflective film reflects the emission light to the photodiode after the emission light is conducted to the blue to ultraviolet light reflective film through the isolation layer (Fig. 5, [0071], the light emitting device 11 emitting an emission light which is reflected by the white resin layer 41 which reflects all wavelengths of light into the light receiving device 12.)
Regarding claim 9, Onoya and Saito disclose all the elements of claim 1.
Onoya further discloses:
the epitaxial layer is N type doping. ([0172], semiconductor layer 214 is epitaxial grown and n-type)
Regarding claim 10, Onoya and Saito disclose all the elements of claim 1.
Onoya further discloses:
a wavelength of the emission light ranges from 300 nanometers (nm) to 500 nm. ([0062], The wavelength range of the light can be in a range from visible wavelengths to infrared wavelengths. The wavelength of visible light is known to extend between 310nm and 1100nm. As taught by Sliney, D. What is light? The visible spectrum and beyond. Eye 30, 222–229 (2016).)
Regarding claim 11, Onoya and Saito disclose all the elements of claim 1.
Onoya further discloses:
further comprising:
a control circuit electrically connected to the PD, (Fig. 2, terminal 11 and 12 connected to the lighting circuit 110 which has light 150a and 150b emitted to the light receiving device 121 and 122) a first gate of the first MOSFET and a second gate of the second MOSFET, (See Fig. 2, transistor 131 and 132 have a first gate and second gate) being configured to control a first voltage response time of the first MOSFET and a second voltage response time of the second MOSFET. (See Fig. 5 and [0114], the switching speeding is influenced by the response time of the light-emitting elements therefore the response time of the first and second MOSFET is controlled by the light-receiving elements.
Claims 2 is rejected under 35 U.S.C. 103 as being unpatentable over Onoya and Saito as applied to claim 1 above, and further in view of Lex et al. US 20210193860 A1 (hereinafter Lex).
Regarding claim 2, Onoya and Saito disclose all the elements of claim 1.
Onoya discloses that the semiconductor maybe “a compound semiconductor containing gallium nitride (GaN) or silicon nitride (SiC),” thereby having a semiconductor material with a wider band gap. (Onoya, [0072].) Silicon carbide is considered to be wide band gap material. Therefore, Onoya is considered to indirectly teach a wide band gap material. However, the Examiner believe when taken in whole that Onoya does not specifically teach a SiC as a material but a silicon nitride material (SiN).
Therefore Onoya and Saito are not considered to appear to specifically discloses:
the substrate is made of silicon carbide (SiC) and is low ion doping concentration.
Lex, teaches an optoelectronic semiconductor device (Lex, Abstract), discloses:
the substrate is made of silicon carbide (SiC) ([0038], SiC is a semiconductor material for the substrate/wafer.) and is low ion doping concentration. ([0038], an undoped semiconductor would have a low ion doping concentration)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Onoya and Saito to have the substrate is made of silicon carbide (SiC) and is low ion doping concentration as taught by Lex for purposes of using a semiconductor material particular suited for generating electromagnetic radiation. (Lex, [0038].)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HEIM KIRIN GREWAL whose telephone number is (703)756-1515. The examiner can normally be reached Monday - Thursday 9:30 a.m. - 5:30 p.m. EST.
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/HEIM KIRIN GREWAL/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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