DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-5, 7-8 and 11-22, rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
a. As to claims 2-3, layers lack antecedent basis.
b. Further claim 3 the cathode hole lacks antecedent basis
Claims 3 seem problematic Claim 3 needs to depend on claim 2 for the connection pattern it appears it should also be dependent of claim 4 to define the cathode hole. Claim 4 does not depend on claim 2 thus simply making claim 3 dependent on claim 4 would not correct the issue. One would have to assume Claim 4 depends on claim 2 and 3 on claim 4 to have proper antecedent basis for all the terms in claim 3.
c. As to claim 4, Claim 4 should recite a cathode hole included in each of the cathode electrode in the first area since there are a plurality.
d. As to claim 7 it is unclear what constitutes “ a layer” or a “a same layer”
e. As to claim 8 it is unclear what constitutes “a different layer”
Claims 2 7-8, seem to imply forming a plurality of laminate dielectric layers and o the like but as claimed the display does not require the structure to take that orientation. Further what one defines as a layer largely arbitrary. The term layer shall be interpreted as height level.
f. As to claim 11 recites : a display area having a first area and a second area located outside of the first area, the first area including a light emitting area and a non-light emitting area adjacent to the light emitting area
Claim 11 then recites:
an organic light emitting diode in the first area, the organic light emitting diode having a cathode, an anode, and an emission layer between the cathode and the anode;
As such the anode and cathode are in the display area.
Thus, it is unclear the meaning of : wherein the first conductive material overlaps with the anode of the organic light emitting diode at the non-light emitting area, and wherein the transparent line part covers the first conductive material.
Since the anode is only described in the light emitting area.
A. It is unclear if this is conditional if the anode is in the non-display are then they overlap.
Or if the light emitting device is partially in the non-light emitting area.
Claim Rejections - 35 USC § 103
Claim(s) 1-2, 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Woo 20220246710 corresponding to KR 20220111767 cited on IDs in view Sun 20220037444 cited on IDs
a. As to claims 1- 2, Woo teaches A display device comprising: a first optical electronic device (Figure 1 and 15 item OS paragraph 57 for example); a display panel including a display area having a first area(DA2 and portion of DA1 that intersect with DA2) and a second area located outside of the first area (DA1 such that 155 does not intersect with DA2 figures 1 and 15), the first area overlapping with the first optical electronic device (DA2-2); and a plurality of signal lines including a plurality of first type signal lines (item TCL) and a plurality of second type signal lines (item 155), the plurality of first type signal lines extending across the first area (items 155 TCL figure 15 that intersect with DA2) and the plurality of second type signal lines disposed only in the second area without extending across the first area (item 155 that do not intersect with DA2), wherein at least one of the plurality of first type signal lines includes a transparent line part disposed in a transmission area of the first area (item TCL is in the transparent portion) and a non-transparent line part disposed in a non-transmission area of the first area (item SD1-2 which is described as metal paragraph 78 as well paragraphs 215 in regards to SD1 and SD paragraph 218 metal is inherently non-transparent), and wherein the transmission area of the first area is an area through which light can be transmitted between a front surface and rear surface of the display panel (DA2 can transmit to OS).
Woo does not explicitly teach the signal lines are of the same type though not required it seems to be implied by the disclosure. Woo does not also explicitly teach a connection pattern, wherein the transparent line part and the non-transparent line part are located in different layers from each other, and wherein the connection pattern electrically connects the transparent line part and the non-transparent line part.
Sun teaches a connection pattern (paragraph 40 figure 3 the via hole, wherein the transparent line part (portion in 102) and the non-transparent line part are located in different layers from each other (portions in 101, and wherein the connection pattern electrically connects the transparent line part and the non-transparent line part (the vias connect the two sections) . Sun further teaches this for all wire pass through transmission region including gate patterns item and data lines (items 9 and 10 figure 2 item 9 connected to the gates 13 and 10 connected to source/drain 11).
Thus it would have been obvious to one of ordinary skill in the art at the time of filing to connect a transparent gate line to 155 using the technique of Sun by providing a connection pattern (paragraph 40 figure 3 the via hole, wherein the transparent line part (portion in 102) and the non-transparent line part are located in different layers from each other (portions in 101, and wherein the connection pattern electrically connects the transparent line part and the non-transparent line part (the vias connect the two sections) to ensure electrical connection an prevent shorting caused by transparent conductor deposition in the non DA2 region (DA1 region) and to improve the transmissivity of the transparent portion by removing non-transparent metal.
Thus, the gates that intersect DA2 would be the new first signal lines and those not cross DA2 would be the second. The suggestion is to only provide the exchange regions for region like 102 in Sun or OS in Woo thus gates and data lines not crossing one of these types of regions would be purely non transparent.
b. As to claim 6 recitation data line and gate line are broad. For example, claim 11 clearly claims a transistor. Claim 6 does not limit whether the signal and gate lines are part of the first or second type already recited in claim 1.
Woo teaches wherein the plurality of signal lines includes a plurality of data lines TCL2 extending in a first direction and a plurality of gate lines extending a second direction 155 transverse to the first direction (see e.g. figure 15), wherein at least one of the plurality of data lines includes at least one non-transparent data line part (item SD2 paragraph 218) and at least one transparent data line part (TCL2), wherein at least one of the plurality of gate lines includes at least one non-transparent gate line part and at least one transparent gate line part, wherein the at least one transparent data line part and the at least one transparent gate line part overlap the first area (this is arbitrary TCL1 can be considered the transparent and ADA can be considered the non-transparent.
If gate must be given weight Woo does not teach this.
Sun already suggests replacing the gates and data lines in the exchange area with transparent materials (figures 2-3 of Sun items 9 and 10)
Thus Woo in Sun teach wherein the plurality of signal lines includes a plurality of data lines extending in a first direction (TCL2) and a plurality of gate lines (gates of Woo and with the exchange region of Sun) extending a second direction transverse to the first direction, wherein at least one of the plurality of data lines includes at least one non-transparent data line part and at least one transparent data line part (TCL2 connected to SD2 TCL2 being transparent and SD2 being non transparent ), wherein at least one of the plurality of gate lines includes at least one non-transparent gate line part and at least one transparent gate line part (see Sun Exchange region), wherein the at least one transparent data line part and the at least one transparent gate line part overlap the first area (see Woo OS area and region 102 of Sun).
c. As to claim 7, Woo suggests wherein the at least one non-transparent data line part and the at least one transparent gate line part are located in a same layer, or wherein the at least one non-transparent gate line part and the at least one transparent data line part are located in a same layer (paragraph 263 states the gate line 155 and TCL2 are formed in the same layer.
d. AS to claim 8, Woo in view of Sun suggest wherein the at least one transparent data line part and the at least one transparent gate line part are located in a different layer Woo teaches the non-transparent part of the gate is formed at the same level as TCL2 thus using the via suggest different levels for the transparent gate line and TCL2.
Claim(s) 3-5 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Woo as applied to claim 2 above, and further in view of Hwang KR20210075549.
a. As to claims 3-4, Woo teaches a plurality of light emitting elements in the second area and the first area of the display area( Agdas figure 15)in DA1 and DA2, each of the light emitting element of the plurality including an anode electrode (AGDA and anode in figure 13), an emission layer (EL layer figure 13), and a cathode electrode (Cathode); Woo does not explicitly teach and a cathode hole included in the cathode electrode in the first area; wherein the transparent line part of the at least one of the plurality of first type signal lines overlaps the cathode hole in the first area
Hwang teaches that the cathode pattern does not extend into the Transparent region (per claims : The first cathode pattern and the second cathode pattern overlap a portion of the non-emission region,
The transparent display device in which the first cathode pattern and the second cathode pattern are not disposed on at least a portion of the transparent region).
Thus, it would have been obvious to one of ordinary skill in the art at the time of filing to provide Light emitting devices only around the periphery an terminate the cathode in the central portion of OS DA2-2 to prevent undesired light to a light interference introduced into OS and to reduce cost of Light emitters in central portion.
As to claim 3 the recitation of: wherein the connection pattern is located adjacent to an edge of the cathode hole with no fixed definition of adjacent it can be considered adjacent.
b. As to claim 5, recitation of wherein the non-transparent line part of the at least one of the plurality of first type signal lines overlaps an area between adjacent cathode holes in the first area is broad since it does not specify “adjacent” Thus it can always be defined as true that the non-transparent line part of the at least one of the plurality of first type signal lines overlaps an area between adjacent cathode holes in the first area since adjacent is relative an the area is also arbitrary.
Allowable Subject Matter
Claims 9-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As to claim 9 prior art fails to teach and or suggest wherein the transparent line part extends in a first direction at an area that overlaps the cathode hole in the first area and the non-transparent line part extends in a second direction at an area adjacent to cathode holes in the first area. An overlap is a more defined term than adjacent too. There is no suggestion to provide the transparent line in an overlap with the cathode hole.
Claims 11-22 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Prior art fails to teach and or suggest an organic light emitting diode in the first area, the organic light emitting diode having a cathode, an anode, and an emission layer between the cathode and the anode; a thin film transistor electrically connected to the organic light emitting diode, the thin film transistor having a gate electrode, a source electrode, and a drain electrode; and a first conductive material between the organic light emitting diode and the substrate, wherein the first conductive material overlaps with the anode of the organic light emitting diode at the non-light emitting area, and wherein the transparent line part covers the first conductive material. There is no teaching to cover the first conductive line as Gl_TM or Dl_TM covers the the top of G1a figure 13 for example.
Conclusion
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/MATTHEW L. REAMES/
Primary Examiner
Art Unit 2896
/MATTHEW L REAMES/Primary Examiner, Art Unit 2896