Prosecution Insights
Last updated: July 17, 2026
Application No. 18/481,872

SEMICONDUCTOR PACKAGE, AND REDISTRIBUTION SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Oct 05, 2023
Priority
Mar 22, 2023 — RE 10-2023-0037294
Examiner
REAMES, MATTHEW L
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
844 granted / 1097 resolved
+8.9% vs TC avg
Strong +18% interview lift
Without
With
+18.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
45 currently pending
Career history
1123
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
75.2%
+35.2% vs TC avg
§102
5.2%
-34.8% vs TC avg
§112
11.5%
-28.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1097 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, applicant must clearly show the features of claim 7 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 3, 15-17 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. As to Claims 3 and 15 recites wherein the partition has a smaller thermal shrinkage rate than the first redistribution pad. However, the specification set forth shrinkage rate as In an embodiment, the partition 110 may include or be made of a material having a lower thermal shrinkage rate than the material forming the first redistribution pad 112p. Here, the thermal shrinkage rate means the degree of shrinkage in a process performed at a temperature higher than room temperature, and for example, it may be the degree of shrinkage at the curing temperature of the curing process that hardens (for example, thermal-cures) at least a portion of the insulating layer 104. For example, in the curing process of curing at least a portion (for example, the partition 110 and/or the lower insulating layer 124a) of the insulating layer 104, a shrinkage rate of the partition 110 due to a temperature higher than room temperature may be smaller than a shrinkage rate of the first redistribution pad 112p. Thus, after curing it is not the same material since applicant has linked molecules during the curing. Thus, the shrinkage rate of the finish product has not been shown to be that the partition has a smaller thermal shrinkage rate than the first redistribution pad. Applicant has only shown in the step of forming that the thermal shrinkage rate meets the limitation by applicant definition of shrinkage rate. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3, 9, 10 15-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. a. As to claim 3, 15-17, claims 3 and 15-17 recites wherein the partition has a smaller thermal shrinkage rate than the first redistribution pad. The specification set forth the meaning of shrinkage rate : In an embodiment, the partition 110 may include or be made of a material having a lower thermal shrinkage rate than the material forming the first redistribution pad 112p. Here, the thermal shrinkage rate means the degree of shrinkage in a process performed at a temperature higher than room temperature, and for example, it may be the degree of shrinkage at the curing temperature of the curing process that hardens (for example, thermal-cures) at least a portion of the insulating layer 104. For example, in the curing process of curing at least a portion (for example, the partition 110 and/or the lower insulating layer 124a) of the insulating layer 104, a shrinkage rate of the partition 110 due to a temperature higher than room temperature may be smaller than a shrinkage rate of the first redistribution pad 112p. At issue is that if it is hardened it no longer the same material properties due to crosslinking molecules. Thus, the definition is improper since applicant is defining the current property of a material by what it once was. Thus ,it is unclear if the “thermal shrinkage” rate is intended to mean a product by process or in the final process outcome. Further it is unclear how one can determine the shrinkage rate of a material before formation. b. As to claim 9, it is unclear which area is being referred there would be a contact area if the via is directly on there is also the entire surface area. The phrase an area is ambiguous since it does not set for which area is to be considered c. As to claim 10 recitation of a connection area has not clear. It appears applicant mean to recite wherein the contact via is directly on the first redistribution pad and partition and wherein an area of the partition is smaller than a connection area between the contact via and the first redistribution pad. Further area of the partition is unclear is its total surface area of the partition including side wall a principle is that is common with the redistribution pad. d. As to claim 13 there is no directionality to define a width vs thickness thus the terms are unclear as to how a width and thickness are being defined. e. As to claim 14 recitation of wherein a side surface of the under-bump pattern includes inclined surface gradually decreasing in size from the first redistribution layer toward a lower surface of the redistribution structure is unclear since applicant has not set forth relational directions of the lower surface to the redistribution layer. There are two surfaces that can reasonably be defined as lower, technically 4 including edges perpendicular to the surface the chip is mounted. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-10, ,13, 15-17, is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kang ‘043 cited by applicant . a. As to claim 1, The term on as cited by applicant means (paragraph 17 It will be understood that when an element such as a layer, film, region, area, or substrate is referred to as being “on” or “above” another element, it can be directly on the other element or intervening elements may also be present.) Thus Kang teaches A semiconductor package, comprising: a semiconductor chip (figures 1 item 200); and a redistribution structure connected to the semiconductor chip (item 100), wherein the redistribution structure includes: an under bump pattern portion of 150W and some portion 150V in figure 2a); a first redistribution layer disposed on the under bump pattern and including a first redistribution pad (figure 2a bottom portion of item 150V); a partition disposed inside the first redistribution pad and comprising a material that is different from a material of the first redistribution pad (item 155); a contact via disposed on the first redistribution pad and the partition (part of 12 extending through 114 120V portion of 120 in figure 2 as represented in figure 1 ) ; and a second redistribution layer including a second redistribution pad disposed on the contact via (item 120W and 120V below) . b. As to claim 2, Kang teaches wherein the partition comprises an insulating material (item 155 is an insulator paragraph 41). c. As to claim 3, Kang teaches a curable polymer thus it is substantially the same as the final product of applicant. Applicant set for the thermal shrinkage by defining it before curing (paragraph 58) thus it the claim is being treat as product by process . d. As to claim 4, Kang teaches wherein the redistribution structure further includes an insulating layer ( a top portion of item 110), and the partition is disposed on a same layer as at least a portion of the insulating layer and includes a same material as at least a portion of the insulating layer (paragraph 34). e. As to claim 5, Kang teaches wherein the insulating layer includes a first insulating layer having a first surface on which the under bump pattern is exposed (item 156 is exposed from the first insulating layer as defined) and a second surface on which the first redistribution layer is disposed (bottom of item 150V has the remaining portion of item 150V disposed), and a second insulating layer including a lower insulating layer disposed on a same layer as the first redistribution pad on the first insulating layer (bottom of item 110), and the partition comprises a same material as the lower insulating layer; the only way for prior art to satisfy from claim 4 and the partition is disposed on a same layer as at least a portion of the insulating layer and includes a same material as at least a portion of the insulating layer and from claim 5 and a second insulating layer including a lower insulating layer disposed on a same layer as the first redistribution pad on the first insulating layer, and the partition comprises a same material as the lower insulating layer is for the lower insulator and the insulating film to be the same. Thus the 110 can be broken into a first and second part. f. As to claim 6, Kang teaches wherein the partition is disposed at a central portion of the first redistribution pad (figure 3A-3B). g. As to claim 7, Since the definition of under bump pattern and redistribution are arbitrary one can define the under-bump pattern to include a part of the partition (a portion of 150V) h. As to claim 8 Kang teaches wherein the partition is entirely surrounded by the first redistribution pad, the contact via, and the under-bump pattern figure 3A and figure 2 the region 155 is entirely surround by the pad the via and the bump pattern by definition of each of the elements. i. As to claim 9, Applicant does not set forth which area and there are multiple areas including subset area. For example, the cylinder outer surface of the via is an area a contact area if they are directly contacting or a end surface area. Further since there is no specification an area has to be an entire area. One can choose an area of the via and the partition to meet the requirement of wherein a ratio of an area of the partition to an area of the contact via is 60 % or lower. k. As to claim 10, Kang teaches that the contact via is directly on the first distribution pad and the partition and the partition principal surface area in common with the redistribution pad has an area small than the connection area between the contact via and the first redistribution pad (figure 2 and figures 3). l. As to claim 13, Kang teaches wherein an entire width or a line width of the partition is greater than a thickness of the partition (width and thickness can arbitrarily defined to meet the claim limitation specific widths can be defined between the distance in recesses in figure 3a-3c and this width is greater than a thickness of an individual recess) . m. As to claim 15, Kang teaches A redistribution substrate for a semiconductor package, comprising: an under bump pattern (items 150W and portion of item 150V figures 2A 2B); a first redistribution layer disposed on the under bump pattern and including a first redistribution pad ( a bottom portion 150V); a separation insulating portion disposed inside the first redistribution pad and comprising an insulating material having a smaller thermal shrinkage rate than that of the first redistribution pad Kang teaches a curable polymer thus it is substantially the same as the final product of applicant. Applicant set for the thermal shrinkage by defining it before curing (paragraph 58) thus it the claim is being treat as product by process; a contact via disposed on the first redistribution pad and the separation insulating portion (item 120W 120V); and a second redistribution layer including a second redistribution pad connected to the contact via (figure 1 a 120 under the other 120). n. As to claim 16, Kang teaches wherein the partition is entirely surrounded by the first redistribution pad, the contact via, and the under-bump pattern figure 3A and figure 2 the region 155 is entirely surround by the pad the via and the bump pattern by definition of each of the elements. o. As to claim 17, Kang teaches wherein the partition is disposed at a central portion of the first redistribution pad (figure 3A-3B). The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Lim (20210202414) and or Harada (20070290343). Th phrase loop means Merriam Webster- a: a curving or doubling of a line so as to form a closed or partly open curve within itself through which another line can be passed or into which a hook may be hooked b: such a fold of cord or ribbon serving as an ornament 2 a: something shaped like or suggestive of a loop b: a circular airplane maneuver executed in the vertical plane 3: a ring or curved piece used to form a fastening, handle, or catch 4 a: a piece of film or magnetic tape whose ends are spliced together so as to project or play back the same material continuously b: a continuously repeated segment of music, dialogue, or images a drum loop 5: a series of instructions (as for a computer) that is repeated until a terminating condition is reached 6: a select well-informed inner circle that is influential in decision making out of the policy loop 7: a closed electric circuit 8: a sports league Thus, the requirement would be something shaped like or suggestive of a loop figure 3A and 3B can be considered suggestive in a loop since they radially out from center. If one cannot consider the structure of figure 3A and 3C as loops. Lim have more partition elements (figures 6A and 6B item 142 and figure 7) in a redistribution pad under bump (figure 7). Likewise, Harada teaches a loop around a central portion of redistribution pad under a under bump pad(figure 4b under bump item 26 redistribution item, 30 and the anulus figure 5a-5f). It would have been obvious to one of ordinary skill in the art at the time of filing to provided in the shape of a loop of Lim or Harada to optimize the shape of the surface of the pad (paragraph 41). b. As to claim 12, Kang or Kang in view of Lim or Harada teach wherein the first redistribution pad includes an outer portion disposed outside the partition and an inner portion disposed inside the partition (figure 3a-3c and figure 6A and 6B of Lim and Harada figures 5). Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Dalal (5796591). Kang does not teach wherein a side surface of the under-bump pattern includes inclined surface gradually decreasing in size from the first redistribution layer toward a surface of the redistribution structure wherein the . Dalal teaches a tapered under bump structure figure 5 and 6 items 20 and 18. It would have been obvious to one of ordinary the art to have provide a gradually decreasing in size from the first redistribution layer toward a surface of the redistribution structure to provide a larger surface area for bonding and to use conventional shapes to provide expected outcome of bump bonding with the shape. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW L REAMES whose telephone number is (571)272-2408. The examiner can normally be reached M-Th 6:00 am-4:00 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F. Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW L. REAMES/ Primary Examiner Art Unit 2896 /MATTHEW L REAMES/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Oct 05, 2023
Application Filed
May 27, 2026
Non-Final Rejection mailed — §102, §103, §112
Jul 13, 2026
Interview Requested

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
95%
With Interview (+18.0%)
2y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1097 resolved cases by this examiner. Grant probability derived from career allowance rate.

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