Office Action Predictor
Application No. 18/482,281

DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §101§DP
Filed
Oct 06, 2023
Examiner
MOJADDEDI, OMAR F
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Boe Technology Group Co., LTD.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
93%
With Interview

Examiner Intelligence

90%
Career Allow Rate
446 granted / 498 resolved
Without
With
+3.5%
Interview Lift
avg trend
2y 4m
Avg Prosecution
40 pending
538
Total Applications
career history

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
50.1%
+10.1% vs TC avg
§102
25.9%
-14.1% vs TC avg
§112
20.2%
-19.8% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§101 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION Status of Claims 1 . Applicant's submittal of claims 1-16 in the “Claims” filed on 10/06/2023 is acknowledged and entered by the Examiner. This office action consider claims 1-16 pending for prosecution. Double Patenting 2. A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co ., 151 U.S. 186 (1894); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert , 245 F.2d 467, 114 USPQ 330 (CCPA 1957). A statutory type ( 35 U.S.C. 101 ) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101 . 3. Claims 1-16 of the Current Application are rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 1-14 of prior U.S. Patent No. 11817307 . This is a statutory double patenting rejection. Current Application Patent 11817307 1. A display substrate, comprising: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode, wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, wherein the conductive convex comprises a first portion and a second portion covering the first portion, wherein an orthographic projection of the first portion on the substrate is located within an orthographic projection of the first electrode on the substrate, the second portion is in contact with the first electrode, a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate, and the first portion is composed of a dielectric material, and the second portion is composed of a conductive material, and wherein the dielectric material comprises an organic material, and the conductive convex further comprises an inorganic material layer covering the first portion and located between the first portion and the second portion . 2. The display substrate according to claim 1, wherein a ratio of a minimum dimension of a surface of a side of the conductive convex facing the substrate along a direction parallel to the substrate to a distance from the conductive convex to the first electrode ranges from 1: 1 to 1: 3 1. A display substrate, comprising: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode, wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, and wherein a ratio of a minimum dimension of a surface of a side of the conductive convex facing the substrate along a direction parallel to the substrate to a distance from the conductive convex to the first electrode ranges from 1:1 to 1:3 , and wherein the conductive convex comprises a first portion, a second portion covering the first portion, and an inorganic material layer covering the first portion, the inorganic material layer being located between the first portion and the second portion , and wherein an orthographic projection of the first portion on the substrate is located within an orthographic projection of the first electrode on the substrate, the second portion is in contact with the first electrode, a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate, and the first portion is composed of a dielectric material, the dielectric material comprises an organic material, and the second portion is composed of a conductive material. 3. The display substrate according to claim 1, wherein a shape of the conductive convex is at least one selected from a group consisting of a cone, a truncated cone, and a prism. 2. The display substrate according to claim 1, wherein a shape of the conductive convex is at least one selected from a group consisting of a cone, a truncated cone, and a prism. 4. The display substrate according to claim 1, wherein the second portion further covers a surface of the first electrode adjacent to the first portion. 3. The display substrate according to claim 1, wherein the second portion further covers a surface of the first electrode adjacent to the first portion. 5. The display substrate according to claim 1, wherein the conductive convex is composed of a conductive material. 4. The display substrate according to claim 1, wherein the conductive convex is composed of a conductive material. 6. The display substrate according to claim 5, wherein the first electrode is formed integrally with the conductive convex, wherein a ratio of a thickness of the first electrode to a distance from a top of the conductive convex to a bottom of the first electrode ranges from 1: 4 to 1: 2. 5. The display substrate according to claim 4, wherein the first electrode is formed integrally with the conductive convex, wherein a ratio of a thickness of the first electrode to a distance from a top of the conductive convex to a bottom of the first electrode ranges from 1:4 to 1:2. 7. The display substrate according to claim 1, wherein a plurality of conductive convexes arranged in an array are disposed on each of the first electrodes. 6. The display substrate according to claim 1, wherein a plurality of conductive convexes arranged in an array are disposed on each of the first electrodes. 8. The display substrate according to claim 7, wherein the conductive convex comprises a triangular prism, the triangular prism comprises a first surface parallel to the surface of the substrate, the first surface comprises a first side and a second side intersecting the first side, a dimension of the first side is 2-10 μm , a dimension of the second side is 1-5 μm , a height of the triangular prism along a direction perpendicular to the substrate is 1-5 μm , a distance between two adjacent conductive convexes in a direction of the first side is 2-10 μm , and a distance between two adjacent conductive convexes in a direction of the second side is 2-5 μm . 7. The display substrate according to claim 6, wherein the conductive convex comprises a triangular prism, the triangular prism comprises a first surface parallel to the surface of the substrate, the first surface comprises a first side and a second side intersecting the first side, a dimension of the first side is 2-10 μm , a dimension of the second side is 1-5 μm , a height of the triangular prism along a direction perpendicular to the substrate is 1-5 μm , a distance between two adjacent conductive convexes in a direction of the first side is 2-10 μm , and a distance between two adjacent conductive convexes in a direction of the second side is 2-5 μm . 9. The display substrate according to claim 1, further comprising: an electronic device located on the conductive convex, wherein a pin of the electronic device is in contact with the conductive convex; and an adhesive located between the conductive convexes , the pin is joined to the first electrode by the adhesive. 8. The display substrate according to claim 1, further comprising: an electronic device located on the conductive convex, wherein a pin of the electronic device is in contact with the conductive convex; and an adhesive located between the conductive convexes , the pin is joined to the first electrode by the adhesive. 10. The display substrate according to claim 9, further comprising: a thin film transistor located on the substrate; and a first dielectric layer located on the thin film transistor, wherein the first electrode is located on the first dielectric layer and is electrically connected to the thin film transistor. 9. The display substrate according to claim 8, further comprising: a thin film transistor located on the substrate; and a first dielectric layer located on the thin film transistor, wherein the first electrode is located on the first dielectric layer and is electrically connected to the thin film transistor. 11. The display substrate according to claim 2, further comprising: an electronic device located on the conductive convex, wherein a pin of the electronic device is in contact with the conductive convex; and an adhesive located between the conductive convexes , the pin is joined to the first electrode by the adhesive. 8. The display substrate according to claim 1, further comprising: an electronic device located on the conductive convex, wherein a pin of the electronic device is in contact with the conductive convex; and an adhesive located between the conductive convexes , the pin is joined to the first electrode by the adhesive. 12. A method for manufacturing a display substrate, comprising: provide a substrate; forming a first electrode on the substrate; and forming a conductive convex on the first electrode, wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, wherein forming the conductive convex comprises: forming a dielectric material layer on the first electrode; patterning the dielectric material layer to form a first portion of the conductive convex; forming a first conductive material layer on the substrate, the first electrode, and the first portion; and patterning the first conductive material layer to form a second portion of the conductive convex, wherein an orthographic projection of the first portion on the first electrode is located within an orthographic projection of the second portion on the first electrode, the second portion covers the first electrode and is in contact with the first electrode, and a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate, wherein forming the conductive convex further comprises: forming an inorganic material layer on the first portion after forming the first portion and before forming the first conductive material layer, wherein a surface of the inorganic material layer away from the substrate is conformal to a surface of the first portion away from the substrate are conformal. 10. A method for manufacturing a display substrate, comprising: provide a substrate; forming a first electrode on the substrate; and forming a conductive convex on the first electrode, wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, …, wherein forming the conductive convex comprises: forming a dielectric material layer on the first electrode; patterning the dielectric material layer to form a first portion of the conductive convex; forming a first conductive material layer on the substrate, the first electrode, and the first portion; and patterning the first conductive material layer to form a second portion of the conductive convex, wherein an orthographic projection of the first portion on the first electrode is located within an orthographic projection of the second portion on the first electrode, the second portion covers the first electrode and is in contact with the first electrode, and a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate, wherein forming the conductive convex further comprises: forming an inorganic material layer on the first portion after forming the first portion and before forming the first conductive material layer, wherein a surface of the inorganic material layer away from the substrate is conformal to a surface of the first portion away from the substrate are conformal. 13. The method according to claim 12, wherein before forming the first conductive material layer on the first portion, further comprising roughening a surface of the first portion. 11. The method according to claim 10, wherein before forming the first conductive material layer on the first portion, further comprising roughening a surface of the first portion. 14. The method according to claim 12, wherein the dielectric material layer comprises a photosensitive material, patterning the dielectric material layer comprises exposing the dielectric material layer using a first mask and developing the dielectric material layer, wherein a radiation dose of a light used for the exposure, a dimension of a light shielding portion of the first mask along a direction perpendicular to a direction in which the light shielding portion extends, and a distance between the first mask and the dielectric material layer are configured such that a diffracted light is generated at an edge of the light shielding portion during the exposure, wherein at least a portion of the diffracted light can reach a surface of the dielectric material layer located below a central portion of the light shielding portion. 12. The method according to claim 10, wherein the dielectric material layer comprises a photosensitive material, patterning the dielectric material layer comprises exposing the dielectric material layer using a first mask and developing the dielectric material layer, wherein a radiation dose of a light used for the exposure, a dimension of a light shielding portion of the first mask along a direction perpendicular to a direction in which the light shielding portion extends, and a distance between the first mask and the dielectric material layer are configured such that a diffracted light is generated at an edge of the light shielding portion during the exposure, wherein at least a portion of the diffracted light can reach a surface of the dielectric material layer located below a central portion of the light shielding portion. 15. The method according to claim 12, wherein forming the first electrode on the substrate and forming the conductive convex on the first electrode comprise: forming a second conductive material layer on the substrate; and patterning the second conductive material layer to form the first electrode and the conductive convex located on the first electrode. 13. The method according to claim 10, wherein forming the first electrode on the substrate and forming the conductive convex on the first electrode comprise: forming a second conductive material layer on the substrate; and patterning the second conductive material layer to form the first electrode and the conductive convex located on the first electrode. 16. The method according to claim 12, further comprising: forming an adhesive layer to cover the conductive convex and a portion of the first electrode located between the conductive convexes ; placing an electronic device on the adhesive layer and applying a force to the electronic device so that the conductive convex penetrates the adhesive layer and contacts the electronic device; and curing the adhesive layer. 14. The method according to claim 10, further comprising: forming an adhesive layer to cover the conductive convex and a portion of the first electrode located between the conductive convexes ; placing an electronic device on the adhesive layer and applying a force to the electronic device so that the conductive convex penetrates the adhesive layer and contacts the electronic device; and curing the adhesive layer. Relevant Prior Arts US 20180013086 A1 US 20180013081 A1 US 20180231817 A1 US 20080017873 A1 Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Omar Mojaddedi whose telephone number is 313-446-6582. The examiner can normally be reached on Monday – Friday, 8:00 a.m. to 4:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado, can be reached on 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /OMAR F MOJADDEDI/ Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Oct 06, 2023
Application Filed
Jan 23, 2026
Non-Final Rejection — §101, §DP
Apr 01, 2026
Response Filed

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
93%
With Interview (+3.5%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 498 resolved cases by this examiner