Office Action Predictor
Last updated: April 16, 2026
Application No. 18/484,267

IMAGE SENSING PIXEL CONFIGURATIONS FOR REDUCED DARK CURRENT NOISE

Non-Final OA §102
Filed
Oct 10, 2023
Examiner
HO, ANTHONY
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Microsoft Technology Licensing, LLC
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
93%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1007 granted / 1110 resolved
+22.7% vs TC avg
Minimal +2% lift
Without
With
+2.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
38 currently pending
Career history
1148
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
31.8%
-8.2% vs TC avg
§102
40.5%
+0.5% vs TC avg
§112
16.0%
-24.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1110 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on December 17, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4 and 15-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Price et al (US Pub 2023/0276144). In re claim 1, Price et al discloses an image sensor (i.e. see at least Figures 3 and 4) configured to capture imagery with mitigated noise, the image sensor (i.e. 400) comprising: a plurality of image sensing pixels (i.e. 402A, 402B) arranged to form a sensor array (i.e. see at least Figure 3), wherein: each image sensing pixel of the plurality of image sensing pixels (i.e. 402A, 402B) comprises a semiconductor photodetector (i.e. see at least Figure 4) connected to a photosensitive region (i.e. 406A, 406B) that comprises a photon reception area (i.e. 408) configured to receive photons to facilitate image capture, each photon reception area (i.e. 408) comprises a length and a width, for at least a particular image sensing pixel (i.e. see at least Figure 4) of the plurality of image sensing pixels, the length or the width of the photon reception area is smaller than about 80% of a pixel pitch measurement (i.e. see at least paragraph 0060) between the particular image sensing pixel (i.e. see at least Figure 3) and an adjacent image sensing pixel of the plurality of image sensing pixels (i.e. 402A, 402B), wherein the length or the width of the photon reception area contributes to reduced volume of the photosensitive region to mitigate sensor noise for the image sensor (i.e. see at least paragraph 0059), and a space (i.e. 440) between the photosensitive region (i.e. see at least Figure 4) of the particular image sensing pixel and the photosensitive region of the adjacent image sensing pixel (i.e. 402B) comprises at least one dielectric layer (i.e. 404B) and/or at least one metal layer (i.e. see at least paragraph 0054). It is well known in the art that an oxide would be used as a dielectric material in semiconductor devices. In re claim 2, Price et al discloses wherein the image sensor comprises a single photon avalanche diode (SPAD) image sensor (i.e. see at least paragraph 0061). In re claim 3, Price et al discloses wherein the image sensor comprises a complementary metal-oxide-semiconductor (CMOS) image sensor (i.e. see at least paragraph 0039). In re claim 4, Price et al discloses wherein the at least one oxide layer and/or the at least one metal layer are arranged transverse to the photon reception area (i.e. see at least Figure 4). In re claim 15, Price et al discloses an image sensor (i.e. see at least Figures 3 and 4) configured to capture imagery with mitigated noise, the image sensor (i.e. 400) comprising: a plurality of image sensing pixels (i.e. 402A, 402B) arranged to form a sensor array (i.e. see at least Figure 3), wherein: each image sensing pixel of the plurality of image sensing pixels (i.e. 402A, 402B) comprises a semiconductor photodetector (i.e. see at least Figure 4) connected to a photosensitive region (i.e. 406A, 406B) that comprises a photon reception area (i.e. 408) configured to receive photons to facilitate image capture, each photon reception area (i.e. 408) comprises a length and a width, for at least a particular image sensing pixel (i.e. see at least Figure 4) of the plurality of image sensing pixels, the length or the width of the photon reception area is smaller than about 80% of a pixel pitch measurement (i.e. see at least paragraph 0060) between the particular image sensing pixel (i.e. see at least Figure 3) and an adjacent image sensing pixel of the plurality of image sensing pixels (i.e. 402A, 402B), wherein the length or the width of the photon reception area contributes to reduced volume of the photosensitive region to mitigate sensor noise for the image sensor (i.e. see at least paragraph 0059), and a space (i.e. 440 and to include a small portion outside of both sides of 440) between the photosensitive region of the particular image sensing pixel and the photosensitive region of the adjacent image sensing pixel comprises an intermediate silicon region (i.e. 420A, 420B). It is well known in the art that silicon is used for active regions in semiconductor devices. In re claim 16, Price et al discloses wherein one or more dielectric layers (i.e. 404A, 404B) or one or more metal layers intervene between the photosensitive region of the particular image sensing pixel and the intermediate silicon region (i.e. see at least Figure 4). It is well known in the art that an oxide would be used as a dielectric material in semiconductor devices. In re claim 17, Price et al discloses wherein the intermediate silicon region (i.e. 420A, 420B) is connected to an electron-hole pair drain (i.e. it is inherent and well known in the art that an active region comprises an electron-hole pair). In re claim 18, Price et al discloses further comprising a covering material (i.e. 430A, 430B) arranged over an environment-facing portion of the intermediate silicon region (i.e. see at least Figure 4). Allowable Subject Matter Claims 5-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 19 and 20 are allowed. The following is an examiner’s statement of reasons for allowance: The prior arts of record do not disclose or suggest at least the limitation of “an image sensor configured to capture imagery with mitigated noise, the image sensor comprising a space between the photosensitive region of the particular image sensing pixel and the photosensitive region of the adjacent image sensing pixel comprises an intermediate silicon region that is connected to an intermediate semiconductor photodetector, wherein the intermediate semiconductor photodetector comprises a smaller size than the semiconductor photodetector of the particular image sensing pixel” as recited in claim 19. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. a. Ma et al (US Pub 2020/0388643) Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTHONY HO/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Oct 10, 2023
Application Filed
Dec 06, 2025
Non-Final Rejection — §102
Mar 18, 2026
Examiner Interview Summary
Mar 18, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
93%
With Interview (+2.4%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 1110 resolved cases by this examiner. Grant probability derived from career allow rate.

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