Prosecution Insights
Last updated: April 19, 2026
Application No. 18/484,470

SELF-ALIGNED TOPVIA AND METAL LINE WITH INCREASED HEIGHT

Non-Final OA §103§112
Filed
Oct 11, 2023
Examiner
TAN, DAVE
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
7 granted / 8 resolved
+19.5% vs TC avg
Moderate +14% lift
Without
With
+14.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
25 currently pending
Career history
33
Total Applications
across all art units

Statute-Specific Performance

§103
64.2%
+24.2% vs TC avg
§102
28.3%
-11.7% vs TC avg
§112
7.6%
-32.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 8 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 4, 5, 17, and 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: Regarding claim 4, the dielectric layer (Fig. 8b, #372), is on the top surface of an upper portion of a metal line. Regarding claim 5, a topvia (Fig. 8b, #351), is also on a top surface of an upper portion of a metal line. The dielectric layer is on an upper portion of a second metal line. Regarding claim 17, a topvia(Fig. 8b, #351), is on top of the upper portion of the first metal line. Regarding claim 18, a dielectric layer(Fig. 8b, #372), is also on a top surface of the upper portion of the first meta line. The dielectric layer is on an upper portion of a second metal line. Claims 4, 5, 17, and 18 suggest the topvia and dielectric layer are on the upper portion of the same metal line whereas the specification and figures point to the topvia and dielectric layer are on the upper portion of the first metal line and second metal line, respectively. In order to further prosecution, the claim limitations will be construed/viewed by the examiner as : The topvia and dielectric layer of claims 4, 5, 17, and 18 will be considered to be on a top surface of the upper portion of the first metal line and the upper portion of the second metal line, respectively. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 16 is/are rejected under 35 U.S.C. 103 as being anticipated by Zhu, US 20230005836, hereafter ‘Zhu’ in view of Cheng et al, US 20210090938, hereafter ‘Cheng’. Regarding claim 1, Zhu discloses : An interconnect structure comprising : a metal line having a lower portion and an upper portion of different material composition(Fig. 5a, #1015 and #1115 may include materials with different etch selectivity and may include different materials and may be different purities of ruthenium [0030-0031]), sidewalls of the lower portion of the metal line being vertically aligned with sidewalls of the upper portion of the metal line(#1015 and #1115 vertically aligned as shown and may be self-aligned with to each other [0018]). Zhu does not disclose : a dielectric liner lining the sidewalls of the lower portion of the metal line and the sidewalls of the upper portion of the metal line. However, in the same field of endeavor, Cheng teaches : a dielectric liner lining the sidewalls of the lower portion of the metal line and the sidewalls of the upper portion of the metal line(Fig. 11, #116 surrounding a side wall of #118). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Cheng to Zhu to include a dielectric liner to an interconnect to minimize offset capacitance (Cheng, [0020]). Regarding claim 16, Zhu teaches : An interconnect structure comprising : a first metal line having a lower portion and an upper portion of different material composition(Fig. 5a, #1015 and #1115 may include materials with different etch selectivity and may include different materials and may be different purities of ruthenium [0030-0031]), sidewalls of the lower portion of the first metal line being vertically aligned with sidewalls of the upper portion of the first metal line(#1015 and #1115 vertically aligned as shown and may be self-aligned with to each other [0018]); a second metal line having a lower portion and an upper portion of different material composition(Fig. 5a, to include multiple metal lines with lower portions #1015 and upper portions #1115), sidewalls of the lower portion of the second metal line being vertically aligned with sidewalls of the upper portion of the second metal line(#1015 and #1115 vertically aligned as shown and may be self-aligned with to each other [0018]) ; and an isolation layer between the first metal line and the second metal line, the isolation layer including an airgap(#1011 to include #1017). Zhu does not disclose : a dielectric liner lining sidewalls of the lower portion and the upper portion of the first metal line and lining sidewalls of the lower portion and the upper portion of the second metal line. However, in the same field of endeavor, Zheng teaches : a dielectric liner lining sidewalls of the lower portion and the upper portion of the first metal line and lining sidewalls of the lower portion and the upper portion of the second metal line(Fig. 11, #116 surrounding a side wall of #118). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Cheng to Zhu to include a dielectric liner to an interconnect to minimize offset capacitance (Cheng, [0020]). Claims 4, 5, 17, and 18 is/are rejected under 35 U.S.C. 103 as being anticipated by Zhu, US 20230005836, hereafter ‘Zhu’ in view of Cheng et al, US 20210090938, hereafter ‘Cheng’, in further view of Lin et al, US 20210407895, hereafter ‘Lin’. Regarding claim 4, Zhu as modified by Cheng discloses : The interconnect structure of claim 1. Zhu as modified by Cheng does not disclose : further comprising a dielectric layer covering a top surface of the upper portion of the metal line, sidewalls of the dielectric layer being vertically aligned with the sidewalls of the upper portion of the metal line , wherein the dielectric liner lines the sidewalls of the dielectric layer. However, in the same field of endeavor, Lin teaches : further comprising a dielectric layer covering a top surface of the upper portion of the metal line(Fig. 14b, #640 on top of #435), sidewalls of the dielectric layer being vertically aligned with the sidewalls of the upper portion of the metal line(Sidewalls of #640 shown to vertically aligned with #435), wherein the dielectric liner lines the sidewalls of the dielectric layer(#345 along a sidewall of #640). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Lin to Zhu and Cheng to include a dielectric top layer on a metal line with a dielectric lining to reduce interconnect parasitics between interconnects (Lin, [0001-0002]). Regarding claim 5, Zhu as modified by Cheng and Lin discloses : The interconnect structure of claim 4. Lin teaches : further comprising a topvia on top of the upper portion of the metal line(Fig. 14b, #235 on top of #215), wherein the topvia has a same material composition as the upper portion of the metal line and has a top surface that is co-planar with a top surface of the dielectric layer(#215 and #235 may be of the same metal [0036], with #640 being coplanar with #235 [0048]). Regarding claim 17, Zhu as modified by Cheng discloses : The interconnect structure of claim 16. Zhu as modified by Cheng does not disclose : further comprising a topvia on top of the upper portion of the first metal line, wherein the topvia has a same material composition as the upper portion of the first metal line. However, in the same field of endeavor, Lin teaches : further comprising a topvia on top of the upper portion of the first metal line(Fig. 14b, #235 on top of #125), wherein the topvia has a same material composition as the upper portion of the first metal line(#215 and #235 may be comprise the same metal [0036]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Lin to Zhu and Cheng to include an additional conductive material on top of an interconnect made of the same material to ensure composition suitability for electrical routing (Lin [0036]). Regarding claim 18, Zhu as modified by Cheng and Lin discloses : The interconnect structure of claim 17. Lin teaches : further comprising a dielectric layer covering a top surface of the upper portion of the first metal line(Fig. 14b, #264 on top of #435), wherein sidewalls of the dielectric layer are vertically aligned with the sidewalls of the upper portion of the first metal line(#640 shown to be aligned with #435), and a top surface of the dielectric layer is co-planar with a top surface of the topvia(#640 coplanar with #235 [0048]). Allowable Subject Matter Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 3 is allowable at least on its dependencies. Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 7 and 8 is allowable at least on its dependencies. Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : US 20220020688 – Self-aligned interconnect. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVE TAN whose telephone number is (571)272-6841. The examiner can normally be reached M-F: 8-4 PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD DICKE can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /D.T./Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Oct 11, 2023
Application Filed
Feb 25, 2026
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+14.3%)
3y 2m
Median Time to Grant
Low
PTA Risk
Based on 8 resolved cases by this examiner. Grant probability derived from career allow rate.

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