DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 4/26/2024 and 10/12/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 5, and 10-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US Patent Appl. Pub. No. 2013/0015555 A1).
[Re claim 1] Lin discloses the method, comprising: forming an insulating layer (36) on a frontside of a semiconductor layer (30); forming a first conductive contact (32) in a first opening in the insulating layer (36); forming a second conductive contact (34) in a second opening in the insulating layer; and selectively forming a stacked conductive layer (42) on the first conductive contact (32) without forming a portion of the stacked conductive layer (42) on the second conductive contact (34) (see figure 2a-2e and paragraph [0019]-[0026]).
[Re claim 5] Lin discloses the apparatus, comprising: an insulating layer (36) disposed on a frontside of a semiconductor layer (30); a first conductive contact (32) disposed in a first opening in the insulating layer (36); a second conductive contact (34) disposed in a second opening in the insulating layer (36); and a stacked conductive layer (42) disposed on the first conductive contact (32) and excluded from the second conductive contact (34) (see figure 2a-2e and paragraph [0019]-[0026]).
[Re claim 10] Lin discloses the apparatus further comprising: a wirebond (48) directly coupled to the second conductive contact (34) (see figure 2e and paragraph [0026]).
[Re claim 11] Lin discloses the apparatus further comprising: a wirebond (48) directly coupled to the second conductive contact (34) through an opening in a polyimide (PI) layer (44) (see figure 2F and paragraph [0025]-[0027]).
Claim(s) 1, 5-6 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai et al. (US Patent Appl. Pub. No. 2016/0247757 A1).
[Re claim 1] Tsai discloses the method, comprising: forming an insulating layer (36) on a frontside of a semiconductor layer (10); forming a first conductive contact (44) in a first opening (40) in the insulating layer (36); forming a second conductive contact (42) in a second opening (38) in the insulating layer (36); and selectively forming a stacked conductive layer (50 and 52) on the first conductive contact (44) without forming a portion of the stacked conductive layer (50 and 52) on the second conductive contact (42) (see figure 3-5 and paragraph [0016]-[0023]).
[Re claim 5] Tsai discloses the apparatus, comprising: an insulating layer (36) disposed on a frontside of a semiconductor layer (10); a first conductive contact (44) disposed in a first opening in the insulating layer (36); a second conductive contact (42) disposed in a second opening in the insulating layer (36); and a stacked conductive layer (50 and 52) disposed on the first conductive contact (44) and excluded from the second conductive contact (42) (see figure 3-5 and paragraph [0016]-[0023]).
[Re claim 6] Tsai discloses the apparatus further comprising: a polyimide layer (48) disposed on the insulating layer (36), the stacked conductive layer (50 and 52) is disposed in an opening within the polyimide layer (48) (see figure 5 and paragraph [0021]-[0023]).
[Re claim 9] Tsai discloses the apparatus wherein formation of the stacked conductive layer (50 and 52) on the second conductive contact (42) is prevented by a polyimide layer (48) (see figure 5 and paragraph [0021]-[0023]).
Allowable Subject Matter
Claims 2-4, 7-8 and 12 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 13-20 are allowed.
The following is an examiner's statement of reasons for allowance: Claim 13 allowable because of the closest prior art Tsai discloses the method, comprising: forming an insulating layer (36) on a frontside of a semiconductor layer; forming a first conductive contact (44) in a first opening (40) in the insulating layer; forming a second conductive contact (42) in a second opening (38) in the insulating layer; forming a first polyimide layer (48) on the second conductive contact (44) and the insulating layer (36) (see figure 3-5 and paragraph [0016]-[0023]). However, the prior art, either singly or in combination, fails to anticipate or render obvious, the method, the step of forming a second polyimide layer over the first polyimide layer; forming, in the second polyimide layer, a first opening above the first conductive contact and a second opening above the first polyimide layer to expose the first polyimide layer above the second conductive contact through the second opening; forming a stacked conductive layer over the first conductive contact; and forming a third opening in the first polyimide layer for the second conductive contact. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Claims 14-20 depend from claim 13 so they are allowable for the same reason.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYOUNG LEE whose telephone number is (571)272-1982. The examiner can normally be reached M to F, 10am to 6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KYOUNG LEE/Primary Examiner, Art Unit 2817
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