DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 7, 10, 11, 14-16, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al, US Patent Application Publication 2021/0408109 (as cited in previous Office Action) in view of Kwon et al, US Patent Application Publication 2019/0245156 (newly submitted)
Regarding claim 1, Jang teaches a display device comprising:
a substrate 100 comprising a front panel region DP, a rear panel region PP, and a bending region BP between the front panel region and the rear panel region (figure 12);
a thin film transistor TFT on the substrate, the thin film transistor including an active layer ACT, a gate insulating layer GI, a gate electrode GE, a source electrode SE, and a drain electrode DE;
an interlayer insulating film ILD on the gate electrode of the thin film transistor;
a connection electrode on the interlayer insulating film, the connection electrode electrically connected to the thin film transistor (the drain electrode and source electrode on the op surface of ILD);
an adhesive layer PAS1 on the connection electrode, the adhesive layer including adhesive material;
a planarization layer OC1 on the adhesive layer, wherein the adhesive layer and the planarization layer is formed with a contact hole exposing at least a portion of the connection electrode;
at least one micro light emitting diode (micro LED) ED disposed on at least a portion of the adhesive layer, the micro LED device including a semiconductor layer 111 and another semiconductor layer 113 (figure 5);
a wire electrode AE electrically connecting the semiconductor layer of the micro LED and the connection electrode through the contact hole (figure 3).
Jang fails to teach a connection wires on the interlayer insulating film apart from the connection electrode, wherein the adhesive layer in on the connection wire, wherein the connection wires extend from the front panel of the substrate to the rear panel through the bending region.
Kwon teaches a connection wires 150 on the interlayer insulating film 135 apart from the connection electrode 123/124 (figure 5), wherein the connection wires extend from the front panel of the substrate to the rear panel through the bending region (figures 1-2). The combination of Kwon with that of Jang then meets the limitation of “the adhesive layer in on the connection wire”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kwon with that of Jang because connection wirings are generally-used in a display apparatus to electrically connect the TFT and LED device to the printed circuit board, thereby allowing the display device to electrically function.
Regarding claim 2, Jang teaches a passivation layer 118 covering a side surface of the semiconductor layer or a side surface of the another semiconductor layer (figure 5)
Regarding claims 7, Jang teaches a bank BNK1 on the planarization layer, wherein the bank fills at least a portion of the contact hole (figure 3).
Regarding claim 10, Jang teaches a sealing insulation ENC covering the bank, the planarization layer, and the wire electrode (figure 3).
Regarding claim 11, Jang teaches a reflection layer CE disposed below the micro LED, the reflection layer including a material that is configured to reflect light emitted from the micro LED (figure 5 and [0153])
Regarding claim 14, Jang teaches the substrate is a flexible substrate (figure 9).
Regarding claim 16, Jang teaches a tiling device (figure 7 and [0038]), comprising :a set of display devices 10-1, 10-2, 10-3, 10-4, the set of display devices including the display device of claim 1 , wherein each display device is electrically connected to an adjacent display device, wherein the bending region of the display device of claim 1 is adjacent to another bending region of a substrate of another display device (figures 3 and 9)
Regarding claim 15, Jang teaches a first connection wire on the front panel region of the substrate, the first connection wires electrically connected to the micro LED; a side wire extending from the first connection wire on the bending region of the substrate, and the second connection wire extending from the side wire on the rear panel region of the substrate, the second connection wire electrically connected to an integrated circuit chip 220 [0201].
Note: [0199] of Jang discloses that pad electrode PD is exposed on the PAS1 and may be electrically connected to a connection line pass through the bending part through a contact hole. This would imply that this connection line would connect to the microLED and TFT on the first front panel region, then extend from the first connection wire on the bending region of the substrate, then extend from the side wire on the rear panel region of the substrate
Jang and Kwon fail to teach a width of a side wire is wider than a width of a first connection wire or a width of a second connection wire.
However, it would have been an obvious matter of design choice bounded by well-known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular dimensions because applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 21, Kwon teaches the connection wires extend 150 from the front panel region to the rear panel region, without being cut off (figures 1-2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7, 11, 12, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al, US Patent Application Publication 2020/0168777 (as cited in previous Office Action) in view of Kwon et al, US Patent Application Publication 2019/0245156 (newly submitted)
Regarding claim 1, Kang teaches a display device comprising:
a substrate 110 comprising a front panel region (as shown in figure 3),
a thin film transistor T3 on the substrate, the thin film transistor including an active layer SCL, a gate insulating layer 112, a gate electrode GE, a source electrode SE, and a drain electrode DE;
an interlayer insulating film 113 on the gate electrode of the thin film transistor;
a connection electrode PCE on the interlayer insulating film, the connection electrode electrically connected to the thin film transistor
an adhesive layer 114 on the connection electrode, the adhesive layer including adhesive material;
a planarization layer 115 on the adhesive layer, wherein the adhesive layer and the planarization layer is formed with a contact hole exposing at least a portion of the connection electrode;
at least one micro light emitting diode (micro LED) 150 disposed on at least a portion of the adhesive layer, the micro LED device including a semiconductor layer 152 and another semiconductor layer 153 (figure 4 and [0076]);
a wire electrode PE electrically connecting the semiconductor layer of the micro LED and the connection electrode through the contact hole (figure 3).
Kang fails to teach a rear panel region, a bending region between the front panel region and the rear panel region, and a connection wires on the interlayer insulating film apart from the connection electrode, wherein the adhesive layer in on the connection wire, wherein the connection wires extend from the front panel of the substrate to the rear panel through the bending region.
However, Kang teaches that substrate 110 may have flexible characteristics [0041]. The reference of Kwon teaches a substrate that has flexible characteristics, which includes a rear panel region (which includes 180 and 190), and a bending region BA/BAX between the front panel region and the rear panel region (figures 1 and 2). Further, Kwon teaches a connection wires 150 on the interlayer insulating film 135 apart from the connection electrode 123/124 (figure 5), wherein the connection wires extend from the front panel of the substrate to the rear panel through the bending region (figures 1-2). The combination of Kwon with that of Jang then meets the limitation of “the adhesive layer in on the connection wire”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kwon with that of Jang because flexible substrates are used in the art to allow them to be placed into more electrical components than rigid substrates and connection wirings are generally-used in a display apparatus to electrically connect the TFT and LED device to the printed circuit board, thereby allowing the display device to electrically function.
Regarding claims 2-3, Kang teaches a passivation layer 155 covering a side surface of the semiconductor layer or a side surface of the another semiconductor layer, wherein the planarization layer 115-2 covers a side surface of the passivation layer (figure 3)
Regarding claim 4, Kang teaches the planarization layer includes a first planarization layer 115-1 and a second planarization layer 115-2 or 155 on the first planarization layer (figure 3)
Regarding claims 5-6, Kang teaches the second planarization layer is formed with a second contact hole exposing at least a portion of an electrode 156 on the semiconductor layer, and wherein the wire electrode 155 is electrically connected to the electrode through the contact hole, and electrically connects the electrode to the connection electrode, wherein the second planarization layer 115-2 and 155 covers a side surface of the wire electrode and a side surface of the electrode (Figure 3).
Regarding claims 7, Kang teaches a bank 116 on the planarization layer, wherein the bank fills at least a portion of the contact hole (figure 3).
Regarding claims 11-12, Kang teaches a reflection layer 111 disposed below the micro LED, the reflection layer including a material that is configured to reflect light emitted from the micro LED, wherein the reflection layer is disposed below the adhesive layer 114 (figure 3).
Regarding claim 21, Kwon teaches the connection wires extend 150 from the front panel region to the rear panel region, without being cut off (figures 1-2).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang and Kwon as applied to claim 7 above, and further in view of Sakakura et al, US Patent 7,423,373 (as cited in previous Office Action).
Regarding claim 8, Jang and Kwon fail to teach the bank includes a black material.
However, Sakakura teaches black pigment-containing layer is conventionally-used in the art for a bank material in order to make a black matrix (see column 14, lines 1-2)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Sakakura with that of Jang and Kwon because black pigment-containing layer is conventionally-used in the art for a bank material in order to make a black matrix, which protects the underlying structures from unwanted light interaction.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang and Kwon as applied to claim 7 above, and further in view of Kim, US Patent 10,153,322 (as cited in previous Office Action).
Regarding claim 9, while Jang teaches the bank extends to cover at least a portion of the front panel region and a rear panel region (figure 12), Jang and Kwon fails to teach the bank extends to cover at least the bending region.
However, Kim teaches that the bank extends 114 to cover at least the bending region (BA, figure 8A), as well in the front panel (and the rear panel). The bank disposed in the active area AA is also disposed in the bending area BA so that the neutral plane NP is raised without performing additional deposition and etching processes, thereby, the tensile force which is applied due to the bending may be reduced and improving the device.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kim with that of Jang and Kwon because the bank disposed in the active area AA is also disposed in the bending area BA so that the neutral plane NP is raised without performing additional deposition and etching processes, thereby, the tensile force which is applied due to the bending may be reduced and improving the device.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang as applied to claim 1 above, and further in view of Son et al, US Patent Application Publication 2018/0190747 (as cited in previous Office Action).
Regarding claim 13, Jang and Kwon fail to teach the interlayer insulation film includes organic material.
Son teaches the interlayer insulation film includes organic material [0104] as one of several material that is conventionally-used in the art for a interlayer insulation layer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Son with that of Jang and Kwon because organic material one of several material that is conventionally-used in the art for a interlayer insulation layer.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang and Kwon as applied to claim 1 above, and further in view of Lee et al, US Patent 10,446,636 (as cited in previous Office Action)
Regarding claim 17, while Jang teaches the substrate is a single substrate 100 formed of a material, Jang and Kwon fail to teach transparent insulating material.
Lee teaches transparent insulating material (column 7, lines 35-37) as an appropriate material that is used in the art for a flexible substrate material.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Lee with that of Jang and Kwon because a transparent polymer is an appropriate material that is used in the art for a flexible substrate material.
Claim(s) 18 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al, US Patent Application Publication 2021/0408109 in view of Sakakura et al, US Patent 7,423,373 (both as cited in previous Office Action) and Kwon et al, US Patent Application Publication 2019/0245156 (newly submitted)
Regarding claim 18, Jang teaches a display device, comprising:
a substrate 100 comprising a front panel region DP, a rear panel region PP, and a bending region DP between the front panel region and the rear panel region (figure 12);
one or more thin film transistors TFT;
a first insulating layer ILD disposed over the thin film transistors;
a connection electrode on the first insulating layer, the connection electrode electrically connected to the one or more thin film transistors (the drain electrode and source electrode on the op surface of ILD);
an adhesive layer PAS1 on the connection electrode;
at least one micro light emitting diode (micro LED) ED disposed on at least a portion of the adhesive layer, the micro LED including a semiconductor layer 111 and another semiconductor layer 113;
a second insulating layer OC1 disposed over on the first insulating layer, wherein the second insulating layer is formed with a contact hole exposing at least a portion of the connection electrode;
a wire electrode AE electrically connecting the semiconductor layer of the micro LED and the connection electrode through the contact hole; and
a bank BNK2 on the second insulating layer, wherein the bank fills at least a portion of the contact hole (figure 3 and [0094]).
Jang fails to teach the bank includes a black material and a connection wire on the first insulation layer apart from the connection electrode; wherein the connection wires extend from the front panel region of the substrate to the rear panel region through the bending region.
However, Sakakura teaches black pigment-containing layer is conventionally-used in the art for a bank material in order to make a black matrix (see column 14, lines 1-2)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Sakakura with that of Jang because black pigment-containing layer is conventionally-used in the art for a bank material in order to make a black matrix, which protects the underlying structures from unwanted light interaction.
Jang and Sakakura fail to teach a connection wire on the first insulation layer apart from the connection electrode, wherein the adhesive layer in on the connection wire, and wherein the connection wires extend from the front panel region of the substrate to the rear panel region through the bending region.
Kwon teaches a connection wire 150 on the first insulation layer 135 apart from the connection electrode 123/124 (figure 5); wherein the connection wires extend from the front panel region of the substrate to the rear panel region through the bending region (figures 1-2). The combination of Kwon with that of Jang then meets the limitation of “the adhesive layer in on the connection wire”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kwon with that of Jang and Sakakura because connection wirings are generally-used in a display apparatus to electrically connect the TFT and LED device to the printed circuit board, thereby allowing the display device to electrically function.
Regarding claim 22, Kwon teaches the connection wires extend 150 from the front panel region to the rear panel region, without being cut off (figures 1-2).
Claim(s) 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang, Sakakura, and Kwon as applied to claim 18 above, and further in view of Matsuura et al, US Patent 9,958,719 (as cited in previous Office Action).
Regarding claim 19, while Jang teaches the substrate includes a display area DA for emitting light (figure 1), Jang, Sakakura, and Kwon fail to teach the display area is shaped as a circle.
However, Matsuura teaches the display area is shaped as a circle (column 2, lines 60-63) because it is generally-known in the art that the display device may be other shapes.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Matsuura with that of Jang, Sakakura, and Kwon because it is generally-known in the art that the display device may be other shapes and is dependent upon design specification needed for the device.
Regarding claim 20, Jang teaches the substrate further includes one or more sub- display areas (figure 1).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to QUOVAUNDA JEFFERSON whose telephone number is (571)272-5051. The examiner can normally be reached M-F 7AM-4PM.
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/DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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