DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/28/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 7
The claimed limitation “inner wire redistribution layer” cited in claim 7 is unclear as to whether said limitation is the same as or different from the “interior wire redistribution layer”, as recited in claim 1. Therefore, it is indefinite.
For purposes of examination this will be interpreted as “interior wire redistribution layer”.
Regarding Claim 8 and 10
The limitation “inner-side encapsulant vias” is cited in claim 8 and 10. However, the claim from which claims 8 and 10 depend, namely claim 1, do not introduce or otherwise provide antecedent basis for “inner-side encapsulant vias”. Therefore, it is unclear what structure is being referred to by “inner-side encapsulant vias” in claims 8 and 10, the metes and bounds of claims 8 and 10 cannot be ascertained. Therefore, it is indefinite.
Regarding Claim 9
The limitation “the sidewall is vertically flush with a surface of the dielectric layer” is cited in claim 9 and is indefinite because (1) “a surface of the dielectric layer” is unclear as the dielectric layer may have multiple surfaces and the claim does not specify which surface is intended and (2) “vertically flush” does not define a definite geometric relationship or reference direction. The scope of claim 9 cannot be determined with reasonable certainty therefore claim 9 is indefinite. A prior art search has been conducted. However, in view of the above indefiniteness, a meaningful application of prior art to claim 9 under 35 USC 102 and 103 cannot be made at this time, as doing so would require improper speculation about the intended scope and meaning of the claim. Once the indefiniteness issue has been resolved, any relevant prior art will be applied.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 6 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et. al. (US-20190189667-A1, hereinafter Jung), in view of Kim et. al. (US-20140077366-A1 , hereinafter Kim), and further in view of KR112 (KR20140148112A, hereinafter KR112)
Regarding Claim 1.
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Jung teaches in Fig. 9-11 teaches An image sensor (#100A) comprising: an image sensing chip (#130), including an active surface and a back surface facing each other, and the active surface having an image sensing region (#130S), and a plurality of contact pads (#130P/#125) located on a periphery of the image sensing region (#130S) on the active surface; an encapsulant (#140), wrapping around the periphery of the image sensing chip (#130) without covering the image sensing region (#130S) to expose the image sensing region; a plurality of outer-side encapsulant vias (#143), which penetrates the encapsulant (#140) and is located on the outer periphery of the image sensing chip (#130), and an inner wall of each of the plurality of outer-side encapsulant vias has a conducting layer(#143 is electrically connected wiring);
an interior wire redistribution layer (Fig. 11 #122a/#122b/#122c) covering a top surface of the encapsulant (#140) and electrically connecting the plurality of contact pads (#130P/#125) and the conducting layer of the plurality of outer-side encapsulant vias (#143); (Jung [0065-0086])
a dielectric layer (#121a/#121b) covering the surface of the interior wire redistribution layer (#122a/#122b) and the top surface of the encapsulant (#140);
Alternatively, Kim also teaches in Fig.1E a dielectric layer (#38) covering the surface of the interior wire redistribution layer (#34) and the top surface of the encapsulant (#30); It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Jung with the teachings of Kim, as identified above, in order to provide better insulation between the encapsulation layer and the wiring/redistribution layer.
Jung also teaches in Fig.9 a transparent cover plate (#110) attached to the top surface of the encapsulant (#140), and separated from the image sensing region by a gap (#120H)
Jung does not explicitly disclose
the transparent cover plate is attached to the top surface of the encapsulant through an adhesive layer;
KR112 teaches the transparent cover plate (#140) is attached to the top surface of the encapsulant (#130, formed by molding encapsulation resin) through an adhesive layer (#141); It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Jung with the teachings of KR112, as identified above, in order to secure the connection between the two layers.
Jung further teaches in Fig.9 a plurality of conducting terminals (#150), electrically connected to the exterior wire redistribution layer (See Jung [0084-0086])
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In addition, Kim also teaches in Fig.1E an exterior wire redistribution layer (#32) formed underneath the image sensing chip (#10) and a bottom surface of the encapsulant (#30 molding resin), and the exterior wire redistribution layer (#32) electrically connected to the conducting layer (#28 metal) of the plurality of outer-side encapsulant vias (#24/#26 via hole); and a plurality of conducting terminals (#12), electrically connected to the exterior wire redistribution layer (#32). (Kim [0037-0053])
It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Jung with the teachings of Kim, as identified above, in order to provide vertical interconnects through the encapsulant and to facilitate fan-out package as well as I/O distribution around the die.
Regarding Claim 3.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1, Jung further teaches wherein the encapsulant (#140) further wraps the back surface of the image sensing chip (#130), and the exterior wire redistribution layer is formed entirely on the bottom surface of the encapsulant (See Jung [0084-0086]).
Regarding Claim 6.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1, KR112 further teaches in Fig.1 wherein an aperture of each of the plurality of outer-side encapsulant vias is tapered from the bottom surface to the top surface of the encapsulant; the conducting layer is filled into the plurality of outer-side encapsulant vias (#133 via is filled with metal material).
It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112, with the teachings of KR112, as identified above, to improve reliability, reduce stress and to allows for better filling in the devices.
Regarding Claim 10.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1, Kim also teaches an encapsulant vias wherein the apertures of encapsulant vias are tapered from the top surface toward the bottom surface of the encapsulant. These limitations would have been obvious to one of ordinary skill in the art at the time of the invention to apply to encapsulant vias at any location of the package because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed variation achieve unexpected results relative to the prior art implementation. In the present case, the implementation to make the apertures of each of the plurality of inner-side encapsulant vias and each of the plurality of outer-side encapsulant vias tapered from the top surface toward the bottom surface of the encapsulant, would have been obvious, for its benefit of optimizing the reliability and manufacturing process of the device.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Jung et. al. (US-20190189667-A1, hereinafter Jung), in view of Kim et. al. (US-20140077366-A1 , hereinafter Kim) and KR112 (KR20140148112A, hereinafter KR112), and further in view of Park et. al. (US-20170117214A1, hereinafter Park)
Regarding Claim 7.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1,
Jung modified by Kim and KR112 does not explicitly the encapsulant further covers the plurality of contact pads (#125) on the active surface; the encapsulant further includes a plurality of inner-side encapsulant vias; each of the plurality of inner-side encapsulant vias penetrates the encapsulant located on the image sensing chip, and each of the plurality of contact pads is respectively exposed at one end of a corresponding inner-side encapsulant via of the plurality of inner-side encapsulant vias;
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Park teaches in Fig.2 and in related text the encapsulant (#140 package body such as molding compound [0030]) further covers the plurality of contact pads (#121 bond pads) on the active surface (top surface of die #120); the encapsulant further includes a plurality of inner-side encapsulant vias (#150); each of the plurality of inner-side encapsulant vias penetrates the encapsulant (#140) located on the image sensing chip (#120), and each of the plurality of contact pads (#121) is respectively exposed at one end of a corresponding inner-side encapsulant via (#150) of the plurality of inner-side encapsulant vias; (Park Fig.2 [0041-0042])
It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112, with the teachings of Park, as identified above, in order to increase I/O density, minimize lateral routing/connector complexity, and to provide a direct vertical interconnect path through the molded body.
Kim also teaches in Fig.1E wherein, the back surface of the image sensing chip (#10) is exposed without being covered by the encapsulant (#30); and
an inner wall of each of the plurality of inner-side encapsulant vias has a conducting layer (#28) which is electrically connected to the inner wire redistribution layer (#34) and a contact pad of the plurality of contact pads (contacting terminals between #34 and via #24).
It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim, KR112 and Park, with the teachings of Kim, as identified above, to increase I/O density, minimize lateral routing/connector complexity, and to have flexible routing and IO fanout connection in the system.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Jung et. al. (US-20190189667-A1, hereinafter Jung), in view of Kim et. al. (US-20140077366-A1 , hereinafter Kim) and KR112 (KR20140148112A, hereinafter KR112), and further in view of Kheng et. al. (US20220165670A1, hereinafter Kheng)
Regarding Claim 8.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1,
Jung teaches the exterior wire redistribution layer is formed on the bottom surface of the encapsulant (#140) and the back surface of the image sensing chip. (See Jung [0084-0086])
Jung modified by Kim and KR112 does not explicitly disclose wherein the dielectric layer is filled into each of the plurality of inner-side encapsulant vias and each of the plurality of outer-side encapsulant vias;
However, Kheng teaches in Fig.5-7 wherein a dielectric layer(material) (Fig. 7B #190) is filled into encapsulant vias (#108) to protect the conductive line (#170) ;
It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112 with the teachings of Kheng, to fill the remaining void space of the (inner/outer) via holes with dielectric materials in order to improve insulation, mechanical support, and reliability of the device.
Claims 2 and 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et. al. (US-20190189667-A1, hereinafter Jung), in view of Kim et. al. (US-20140077366-A1 , hereinafter Kim) and KR112 (KR20140148112A, hereinafter KR112) and further in view of Wang et. al. (US-20210296389-A1, hereinafter Wang)
Regarding Claim 2.
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Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1, Jung modified by Kim and KR112 does not explicitly disclose wherein the top surface of the encapsulant is flush with the active surface of the image sensing chip.
However, Wang teaches in Fig.3 wherein the top surface of the encapsulant (#3) is flush with the active surface (#11) of the image sensing chip (#13 +#14). It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112, with the teachings of Wang, as identified above, to have aligned surface to simplify the design and manufacturing process.
Regarding Claim 4.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1, Wang also teaches in Fig.3 wherein the height of the gap is equal to the thickness of the dielectric layer (#4). It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112, with the teachings of Wang, as identified above, to have aligned surface to simplify the design and manufacturing process.
Regarding Claim 5.
Jung modified by Kim and KR112 teaches The image sensor as claimed in claim 1,
Jung further teaches in Fig. 11 the dielectric layer (#121a/#121b) directly covers a periphery of the active surface.
Wang also teaches in Fig.3 wherein the interior wire redistribution layer (#4) extends horizontally to the active surface to electrically connect the plurality of contact pads (#15); It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Jung, Kim and KR112, with the teachings of Wang, as identified above, to facilitate fan-out package as well as I/O distribution around the die.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA W KAO whose telephone number is (703)756-4797. The examiner can normally be reached Monday-Friday 9am-5pm Pacific Time.
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/SOPHIA W KAO/Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817