DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Objections
2. Claim 1, beginning on line 12,
“a wavelength as to be transmitted through the first wafer to the first wafer from another surface of the first wafer” should be changed to:
“a wavelength as to be transmitted through the first wafer to the one surface of the first wafer from another surface of the first wafer” for readability.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1 and 3 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee JP 2022165203, Laminated Wafer Grinding Method, Published October 31, 2022, the following rejections are based on an English translation by USPTO-PE2E.
Referring to claim 1, Lee discloses a wafer processing method comprising:
a bonded wafer forming step of forming a bonded wafer by bonding one surface (13a) of a first wafer (13) to one surface of a second wafer (15, Fig. 1, page 3, eighth full paragraph), the first wafer having a device region (page 3, ninth full paragraph) in which a plurality of devices are formed on the one surface, a peripheral surplus region (13d2, page 4, third paragraph) surrounding the device region, and a chamfered peripheral edge (13c, fifth paragraph);
a modified layer forming step of forming an annular modified layer along a boundary of the device region and the peripheral surplus region of the first wafer by applying a laser beam having such a wavelength as to be transmitted through the first wafer (13) to the one surface (13a) of the first wafer from another surface (13b, Fig. 4) of the first wafer (13) that is opposite to the one surface thereof (page 4, paragraph 11), with a focal point of the laser beam placed at the boundary (page 5, fourth paragraph);
a grinding step of, after the modified layer forming step, grinding the first wafer (13) of the bonded wafer from the other surface (13b) of the first wafer (13) to thin the first wafer to a finished thickness (page 7, paragraph 11); and
an external force exerting step of, during or after the grinding step, exerting an external force on the peripheral surplus region that is close to the peripheral edge with respect to a region in which the modified layer is formed in the modified layer forming step, to thereby facilitate separation of the peripheral surplus region (page 8, first paragraph).
Referring to claim 3, the reference further discloses that, in the modified layer forming step, the laser beam is applied to the first wafer (13) in such a manner that cracks (13f, Fig. 4) extending from the modified layer do not appear on the one surface side (13a, page 5, fifth full paragraph, see also Fig. 4) of the first wafer, to thereby restrain the peripheral surplus region from being separated from the first wafer while the grinding step is carried out, but separate the peripheral surplus region from the first wafer in the external force exerting step.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. §103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claim 4 is rejected under 35 U.S.C. §103 as being unpatentable over Lee JP 2022165203 in view of Piao et al. U.S. Patent Application Publication 20200051862.
Referring to claim 4, Lee discloses the external force exerting step as detailed above for claim 1, but does not disclose that, in the external force exerting step, an ultrasonic wave is applied to the peripheral surplus region. Instead, Lee simply discloses vibration is applied to the peripheral surplus region (page 8, first paragraph).
Piao, in disclosing an external force exerting step using vibration, discloses that the vibration is ultrasonic vibration (para [0008]), thereby teaching that ultrasonic vibration is a familiar process for causing vibration.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have utilized an ultrasonic wave for causing vibration. One would have been motivated to make such a modification in view of the teachings in Piao that ultrasonic vibration is a familiar process for causing vibration.
Thus, such a modification would have resulted in a wafer processing method, wherein, in the external force exerting step, an ultrasonic wave would have been applied to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
5. Claim 5 is rejected under 35 U.S.C. §103 as being unpatentable over Lee JP 2022165203 in view of Henley et al. WO 0045421-A2 or Wen CN 114188265.
Referring to claim 5, Lee discloses the external force exerting step as detailed above for claim 1, but does not disclose that, in the external force exerting step, at least one of fluid or a solid is blown to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
Henley, in disclosing an external force exerting step, discloses that a stream of fluid is used to remove a peripheral surplus region (an edge region, page 9, last paragraph), thereby teaching that fluid is blown to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region; or, Wen, in disclosing an external force exerting step, discloses that fluid is used to remove a peripheral surplus region (a wafer edge region, page 3, second full paragraph), thereby teaching that fluid is blown to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have utilized fluid to remove a wafer peripheral surplus region. One would have been motivated to make such a modification in view of the teachings in Henley or Wen that fluid is blown to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
Thus, such a modification would have resulted in a wafer processing method, wherein, in the external force exerting step, fluid, meeting the claim limitation “at least one of fluid or a solid”, is blown to the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
6. Claim 6 is rejected under 35 U.S.C. §103 as being unpatentable over Lee JP 2022165203 in view of Sakamoto U.S. Patent Application Publication 20090162994.
Referring to claim 6, Lee discloses the external force exerting step as detailed above for claim 1, but does not disclose that, in the external force exerting step, a pressing member capable of moving in a direction perpendicular to the one surface of the first wafer exerts a load on the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
Sakamoto, in disclosing an external force exerting step, discloses that a pressing member (a knife edge 41, Fig. 17) capable of moving in a direction perpendicular to a surface of a first wafer (11) exerts a load (“pressed against”, para [0094]) on a wafer separation region, thereby teaching that the pressing member is capable of facilitating the separation of the wafer separation region.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have utilized a knife edge to facilitate the separation of the peripheral surplus region. One would have been motivated to make such a modification in view of the teachings in Sakamoto to facilitate the separation of the peripheral surplus region.
Thus, such a modification would have resulted in a wafer processing method, wherein, in the external force exerting step, a pressing member capable of moving in a direction perpendicular to the one surface of the first wafer exerts a load on the peripheral surplus region to thereby facilitate the separation of the peripheral surplus region.
Allowable Subject Matter
7. Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious a wafer processing method with all limitations as recited in claim 2, which may be characterized in that, in the modified layer forming step, the laser beam is applied to the first wafer in such a manner that the focal point of the laser beam is sequentially placed at a position closer to the one surface of the first wafer toward the peripheral edge, to thereby form the modified layer in a shape extending along a side surface of a truncated cone inclined from the one surface toward the other surface of the first wafer.
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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12-30-2025
/TU-TU V HO/Primary Examiner, Art Unit 2818