Prosecution Insights
Last updated: October 02, 2026
Application No. 18/487,022

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Non-Final OA §112
Filed
Oct 13, 2023
Priority
Apr 07, 2023 — JP 2023-062638
Examiner
MOJADDEDI, OMAR F
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
481 granted / 538 resolved
+21.4% vs TC avg
Moderate +10% lift
Without
With
+10.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
63 currently pending
Career history
579
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
53.8%
+13.8% vs TC avg
§102
25.9%
-14.1% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 538 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restrictions 1. Applicant's election, without traverse, of claims 1-7 in the “Response to Restriction Requirement” filed on 06/01/2026 is acknowledged and entered by the Examiner. This office action consider claims 1-21 pending for prosecution, wherein claims 8-21 are withdrawn from further consideration, and claims 1-7 are presented for examination. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 2. Claims 1-7 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Regarding Claim 1, the instant claim recites limitations, wherein the metes and bounds of the claimed method are vague and ill-defined as a result of uncertainty in the different boundaries and new limitations “a silicon substrate having a first surface and a second surface opposite the first surface and containing oxygen as impurity; a first electrode provided on the first surface; and a second electrode provided on the second surface, wherein the silicon substrate includes an n type drift layer having impurity concentration that is higher on the second surface side, an n type first buffer layer provided on the second surface side of the drift layer and containing protons as impurity, and a second buffer layer provided on the second surface side of the first buffer layer” (Claim 1; emphasis added). The claim is indefinite because of the following: i) The claim is indefinite because “a silicon substrate having a first surface and a second surface opposite the first surface and containing oxygen as impurity; a first electrode provided on the first surface; and a second electrode provided on the second surface, wherein the silicon substrate includes an n type drift layer having impurity concentration that is higher on the second surface side, an n type first buffer layer provided on the second surface side of the drift layer and containing protons as impurity, and a second buffer layer provided on the second surface side of the first buffer layer” (Claim 1) is ambiguous and unclear. It is not clear whether “the second surface side” stated in “wherein the silicon substrate includes an n type drift layer having impurity concentration that is higher on the second surface side” (Claim 1, Lines 8-10) is in reference to “a second surface” stated in Claim 1, Line 4 and Claim, Line 6. Further confusing the limitations of Claim 1 is there is no citation of “a second surface side”. Thus, there is confusion as to what “the second surface side” stated in “wherein the silicon substrate includes an n type drift layer having impurity concentration that is higher on the second surface side” (Claim 1, Lines 8-10) is in reference to. Is this in reference to “a second surface” stated in Claim 1, Line 4 and Claim, Line 6, or is this a new second surface being introduced without proper antecedent basis. Therefore, the limitation of “a silicon substrate having a first surface and a second surface opposite the first surface and containing oxygen as impurity; a first electrode provided on the first surface; and a second electrode provided on the second surface, wherein the silicon substrate includes an n type drift layer having impurity concentration that is higher on the second surface side, an n type first buffer layer provided on the second surface side of the drift layer and containing protons as impurity, and a second buffer layer provided on the second surface side of the first buffer layer” (Claim 1) is indefinite and unclear. The specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, whereby the claims are rendered indefinite. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate clarification and/or correction are/is required within metes and bounds of the claimed invention. As there is a great deal of confusion and uncertainty as to the proper interpretation of the limitations of the claim, it would not be proper for the examiner to reject such a claim on the basis of prior art. See MPEP § 706 and MPEP § 2173.II (second) wherein In re Steele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims. Regarding Claims 2-7, those are rejected under 112(b) because of their dependency status from claim 1. Relevant Prior Art 3. The prior art made of record and not relied upon is considered pertinent to the applicant's disclosure. Takishita et al. (US 20140246750 A1) Otsuka et al. (US 20220115522 A1) Tanaka et al. (US 20220208962 A1) Nakamura (US 20220285537 A1) Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Omar Mojaddedi whose telephone number is 313-446-6582. The examiner can normally be reached on Monday – Friday, 8:00 a.m. to 4:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado, can be reached on 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /OMAR F MOJADDEDI/Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Oct 13, 2023
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12745424
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
3y 7m to grant Granted Sep 22, 2026
Patent 12745529
DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE
3y 0m to grant Granted Sep 22, 2026
Patent 12745495
DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
2y 11m to grant Granted Sep 22, 2026
Patent 12740422
ELECTRONIC DEVICE
4y 1m to grant Granted Sep 15, 2026
Patent 12740187
Light emitting device and apparatus having the same
2y 11m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+10.4%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 538 resolved cases by this examiner. Grant probability derived from career allowance rate.

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