Prosecution Insights
Last updated: October 02, 2026
Application No. 18/487,510

SYSTEMS AND METHODS FOR BUFFER MANAGEMENT DURING A DATABASE BACKUP

Non-Final OA §103
Filed
Oct 16, 2023
Examiner
LEE, CHUN KUAN
Art Unit
2181
Tech Center
2100 — Computer Architecture & Software
Assignee
SAP SE
OA Round
5 (Non-Final)
68%
Grant Probability
Favorable
5-6
OA Rounds
4m
Est. Remaining
72%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
469 granted / 686 resolved
+13.4% vs TC avg
Minimal +4% lift
Without
With
+3.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
29 currently pending
Career history
712
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
73.7%
+33.7% vs TC avg
§102
5.2%
-34.8% vs TC avg
§112
8.0%
-32.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 686 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . CONTINUED EXAMINATION UNDER 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/15/2026 has been entered. RESPONSE TO ARGUMENTS Applicant’s arguments with respect to claims 1, 4-5, 7, 9, 12-13, 15, 17-18, and 20-22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. I. OBJECTIONS TO THE CLAIMS Claim 20 is objected to because of the following informalities: in claim 20, lines 6-7, the claimed limitations “… exclusively on the first NUMA node …“ should be removed. Appropriate correction is required. II. REJECTIONS BASED ON PRIOR ART Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 4-5, 7, 9, 12-13, 15, 17-18, and 20-22 are rejected under 35 U.S.C. 103 as being unpatentable over Thompson (US Pub.: 2015/0052157) in view of Gottipati et al. (US Pub.: 2024/0028470), Dixon et al. (US Patent 5,568,443), Wei (US Pub.: 2002/0154640), and Kempanna et al. (US Pub.: 2025/0021409). As per claim 1, Thompson teaches/suggests a method of performed by a computer system comprising a plurality of Non-Uniform Memory Access (NUMA) nodes, the method comprising: executing a database management system on the plurality of NUMA nodes, the database management system being configured to manage a database comprising data ([0025]-[0026]; [0059]-[0061]); and operating at a time of performing copy of the database to a computer readable storage medium (e.g. associated with transferring from source database(s) to destination/target database: [0025]-[0026]): operating with a single buffer memory (e.g. associated with temporary storage location: [0025]-[0026]) on a first NUMA node in the plurality of NUMA nodes, the single buffer memory operating accordingly ([0025]-[0026]; [0059]-[0061]); retrieving a first subset of data into first and executing one or more processing functions on the first subset in the first (e.g. associated with retrieving first subset of data from source database to be transferred to destination database while first subset of data was stored in temporary storage location, wherein the temporary stored data can be processed/formatted/parsed: [0025]-[0026]; [0033]); and copying the first subset from the first to the computer readable storage medium (e.g. associated with transferring first subset of data that was stored in temporary storage location to destination database: [0025]-[0026]); and retrieving a second subset of data into second and executing the one or more processing functions on the second subset in the second (e.g. associated with retrieving second subset of data from source database to be transferred to destination database while second subset of data was stored in temporary storage location, wherein the temporary stored data can be processed/formatted/parsed: [0025]-[0026]; [0033]), the first NUMA node where the single buffer memory resides (e.g. associated with NUMA node with temporary storage location: [0025]-[0026]; [0059]-[0061]); and operating with the first NUMA node, wherein the one or more processing functions are configured to run solely on the first NUMA node where the single buffer memory is ([0025]-[0026];[0033]; [0059]-[0061]) (Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0033]; and [0055]-[0062]). Thompson does not teach the method comprising: having a plurality of pages; and performing a backup of data to a backup storage: allocating buffer, the buffer being divided into a first half and a second half; operating with the plurality of data pages in association with the first half and operating with the first half; and in response to determining that the first half has become full: operating with the first half in association with the backup storage; and in parallel with the copying, operating with the plurality of data pages in association with the second half and operating with the second half, determining a NUMA node identifier associated with NUMA node; and binding the one or more processing functions to the NUMA node identifier, wherein said binding constrains the one or more processing functions to run exclusively on the NUMA node, being allocated. Gottipati teaches/suggests a method comprising: performing a backup of data to a backup storage ([0023]-[0025]); allocating buffer ([0040]); operating in association with the backup storage ([0023]-[0025]); and being allocated ([0040]) (Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0034]-[0045]; and [0052]) Dixon teaches/suggests a method comprising: having a plurality of pages (col. 6, ll. 14-35); and the buffer being divided into a first and a second (e.g. associated with first portion and second portion of FIFO architecture: Fig. 3; col. 4, l. 62 to col. 6, l. 35); operating with the plurality of data pages in association with the first and operating with the first (e.g. associated with FIFO storing/writing data in first portion of FIFO architecture: Fig. 3; col. 4, l. 62 to col. 6, l. 35); and operating with the first half (e.g. associated with first portion of FIFO architecture: Fig. 3; col. 4, l. 62 to col. 6, l. 35); and in parallel with the copying, operating with the plurality of data pages in association with the second and operating with the second (e.g. associated with FIFO architecture that after storing/writing data in first portion, subsequent data is stored in second portion and data in first portion would be forwarded/read accordingly, wherein dual port FIFO architecture allow simultaneous/parallel read/write access via corresponding ports: Fig. 3; col. 1, ll. 16-22; col. 4, l. 62 to col. 6, l. 35) (Fig. 3-4; col. 1, ll. 16-22; and col. 4, l. 62 to col. 7, l. 35). Wei teaches/suggests a method comprising: having first half and second half (e.g. associated with level of FIFO buffer memory at half full would have corresponding first half and second half: [0041]); operating with first half and operating with first half (e.g. associated with half full level of FIFO buffer memory that corresponds to first half: [0041])); and in response to determining that the first half has become full: operating with first half (e.g. associated with outputting from FIFO buffer memory in response to the FIFO buffer memory being filled to half full level: [0041]); and operating with second half and operating with second half (e.g. associated with second half of FIFO buffer memory after the first half of FIFO buffer memory being filled: [0041]). Kempanna teaches/suggests a method comprising: determining a NUMA node identifier associated with NUMA node (e.g. associated with determining NUMA node ID: [0075]; [0094]); and binding the one or more processing functions to the NUMA node identifier, wherein said binding constrains the one or more processing functions to run exclusively on the NUMA node (e.g. associated with NUMA node ID identifying NUMA node assigned for processing: [0075]; [0094]) (Fig. 2-3; and [0075]-[0096]), It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include Gottipati’s buffering operations, Dixon’s DRAM architecture, Wei’s FIFO operations and Kempanna’s assignment operations into Thompson’s method for the benefit of improving data transferring efficiency (Gottipati, [0004]-[0006]), using a single memory array for a plurality of FIFO buffer memories and dual-ported memory (Dixon, col. 1, ll. 41-53), having the FIFO buffer operating at optimum level (Wei, [0041]), dynamically distributing processing among different NUMA nodes (Kempanna, [0076]) to obtain the invention as specified in claim 1. As per claim 4, Thompson, Gottipati, Dixon, Wei and Kempanna teach/suggest all the claimed features of claim 1 above, where Thompson, Gottipati, Dixon and Wei further teach/suggest the method comprising: wherein allocating the single buffer memory comprises: associating a first buffer pointer with a beginning address of the single buffer memory; and associating a second buffer pointer with an address offset from the first buffer pointer, wherein when one of the first buffer pointer or the second buffer pointer is used to retrieve the first or second subset of the plurality of data pages, the other one of the first buffer pointer or the second buffer pointer is used to copy the first or second subset of the plurality of data pages to the backup computer readable storage medium (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0034]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; and Wei, [0041]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features. As per claim 5, Thompson, Gottipati, Dixon, Wei and Kempanna teach/suggest all the claimed features of claim 4 above, where Thompson, Gottipati, Dixon and Wei further teach/suggest the method comprising: wherein the second buffer pointer is associated with an address offset from the first buffer pointer by half the size of the single buffer memory (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0034]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; and Wei, [0041]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features. As per claim 7, Thompson, Gottipati, Dixon, Wei and Kempanna teach/suggest all the claimed features of claim 1 above, where Thompson, Gottipati, Dixon, Wei and Kempanna further teach/suggest the method comprising: wherein determining the NUMA node identifier comprises executing a get NUMA node identifier command and receiving the NUMA node identifier, wherein an invalid command indicates that the single buffer memory resides on multiple NUMA nodes (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0034]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; Wei, [0041]; and Kempanna, Fig. 2-3; [0075]-[0096]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features. As per claim 9, claim 9 is rejected in accordance to the same rational and reasoning as the above rejection of claim 1, as claim 9 is the computer system carrying out the method of claim 1, where Thompson, Gottipati, Dixon, Wei and Kempanna further teach/suggest the computer system comprising: a plurality of Non-Uniform Memory Access (NUMA) nodes (Thompson, [0061]); at least one processor; at least one non-transitory computer readable medium storing computer executable instructions that, when executed by the at least one processor, cause the computer system to perform a method (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; [0069]-[0079]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0034]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; Wei, [0041]; and Kempanna, Fig. 2-3; [0075]-[0096]). As per claims 12-13, and 15, claims 12-13 and 15 are rejected in accordance to the same rational and reasoning as the above rejection of claims 4-5, as claims 12-13 is the computer system carrying out the method of claims 4-5 and 7. As per claim 17, claim 17 is rejected in accordance to the same rational and reasoning as the above rejection of claims 1 and 9. As per claims 18 and 20, claims 18 and 20 are rejected in accordance to the same rational and reasoning as the above rejection of claims 4-5 and 7. As per claim 21, Thompson, Gottipati, Dixon and Wei teach/suggest all the claimed features of claim 1 above, where Thompson, Gottipati, Dixon and Wei further teach/suggest the method comprising: wherein the one or more processing functions include a checksum function for performing a checksum error analysis on the first or second subsets of the plurality of data pages (e.g. associated with use of checksum for detecting error being well-known to one of ordinary skilled in the art: Gottipati, [0026]) (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0026]; [0034]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; and Wei, [0041]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features. As per claim 22, Thompson, Gottipati, Dixon and Wei teach/suggest all the claimed features of claim 1 above, where Thompson, Gottipati, Dixon and Wei further teach/suggest the method comprising: wherein the one or more processing functions include a decryption function for decrypting one or more of the first or second subsets of the plurality of data pages (e.g. associated with encrypted data would have obviously been decrypted after being received for processing: Gottipati, [0033]) (Thompson, Fig. 1-2; Fig. 4-5; [0025]-[0026]; [0055]-[0062]; Gottipati, Fig. 1-2; Fig. 6; [0004]-[0007]; [0020]-[0025]; [0033]-[0045]; [0052]; Dixon, Fig. 3-4; col. 4, l. 62 to col. 7, l. 35; and Wei, [0041]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features. III. CLOSING COMMENTS CONCLUSION STATUS OF CLAIMS IN THE APPLICATION The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i): CLAIMS REJECTED IN THE APPLICATION Per the instant office action, claims 1, 4-5, 7, 9, 12-13, 15, 17-18, and 20-22 have received a first action on the merits and are subject of a first action non-final. DIRECTION OF FUTURE CORRESPONDENCES Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN KUAN LEE whose telephone number is (571)272-0671. The examiner can normally be reached Monday-Friday. IMPORTANT NOTE If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached on (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHUN KUAN LEE/Primary Examiner Art Unit 2181 September 04, 2026
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Prosecution Timeline

Show 12 earlier events
Jan 20, 2026
Response Filed
Mar 16, 2026
Final Rejection mailed — §103
May 06, 2026
Interview Requested
Jul 08, 2026
Interview Requested
Jul 14, 2026
Applicant Interview (Telephonic)
Jul 15, 2026
Request for Continued Examination
Jul 16, 2026
Response after Non-Final Action
Sep 09, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
68%
Grant Probability
72%
With Interview (+3.7%)
3y 4m (~4m remaining)
Median Time to Grant
High
PTA Risk
Based on 686 resolved cases by this examiner. Grant probability derived from career allowance rate.

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