Tech Center 2100 • Art Units: 2181
This examiner grants 68% of resolved cases
Chun Kuan Lee is an examiner in Art Unit 2181, within Tech Center 2100. He has 686 resolved cases, providing a substantial amount of data for analysis. The allowance rate for this examiner is 68.4 percent, which is a moderate and balanced figure for applicants. The interview lift is 3.7 percent, suggesting that direct communication provides a small but positive benefit to the probability of allowance. This 3.7 percent lift is a factor for practitioners to consider when planning their interaction strategy.
The median time to allowance is 1226 days, which is over three years and indicates a relatively long prosecution cycle. This 1226-day timeline, combined with the 68.4 percent allowance rate, provides a clear expectation for the duration of the prosecution process. The 3.7 percent interview lift indicates that while interviews are helpful, they are not the primary driver of the examiner's decisions. With 686 resolved cases, the data reflects a consistent and professional examination style. Practitioners should focus on clear and persuasive written arguments to maintain efficiency. The 1226-day median pendency remains the primary benchmark for expected prosecution length. Overall, the data indicates that this examiner is both productive and consistent in his approach.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18973890 | MODULAR SYSTEM ARCHITECTURE FOR SUPPORTING MULTIPLE SOLID-STATE DRIVES | Final Rejection | Samsung Electronics Co., Ltd. |
| 18840368 | DIE-TO-DIE DENSE PACKAGING OF DETERMINISTIC STREAMING PROCESSORS | Non-Final OA | Groq, Inc. |
| 19003527 | METHOD AND DEVICE FOR VARIABLE PRECISION COMPUTING | Non-Final OA | Commissariat à l'Energie Atomique et aux Energies Alternatives |
| 18426749 | System and Methods for Multi-Pod Inter-Chip Interconnect | Non-Final OA | Google LLC |
| 19061779 | SYSTEMS AND METHODS TO LOAD A TILE REGISTER PAIR | Non-Final OA | Intel Corporation |
| 18958384 | USING SPARSITY METADATA TO REDUCE SYSTOLIC ARRAY POWER CONSUMPTION | Final Rejection | Intel Corporation |
| 17958216 | SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING | Non-Final OA | Intel Corporation |
| 18613383 | Automatic Port Assignment For Patch Panels | Final Rejection | Oracle International Corporation |
| 19090178 | METHOD, APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM FOR CHIP CONTROL | Non-Final OA | Beijing Zitiao Network Technology Co., Ltd. |
| 19029423 | COMMUNICATING DATA WITH STACKED MEMORY DIES | Non-Final OA | Lodestar Licensing Group LLC |
| 18487510 | SYSTEMS AND METHODS FOR BUFFER MANAGEMENT DURING A DATABASE BACKUP | Non-Final OA | SAP SE |
| 18640868 | REMOTE MEMORY BRIDGE AND METHOD FOR OPERATION | Non-Final OA | Lemon Inc. |
| 18914845 | METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED DATA RAM CACHE FOR BANK ARBITRATION | Final Rejection | Texas Instruments Incorporated |
| 18498423 | PREFETCHING PROGRAM CODE FROM FLASH MEMORY BASED ON BRANCH LOGIC | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18456420 | FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM | Non-Final OA | NVIDIA CORPORATION |
| 18829179 | DEVICES USING CHIPLET BASED STORAGE ARCHITECTURES | Final Rejection | SK hynix Inc. |
| 18643881 | DEVICES USING CHIPLET BASED STORAGE ARCHITECTURES | Non-Final OA | SK hynix Inc. |
| 18410808 | MEMORY DEVICE WITH 4N AND 8N DIE STACKS | Non-Final OA | Micron Technology, Inc. |
| 18683636 | GLOBALS BLOCKS IN REPLICATED BLOCK ARRAYS | Non-Final OA | Tesla, Inc. |
| 18779259 | PACKET PROCESSING FOR CLUSTERED CONTAINERS USING INTERNAL BRIDGING AND AN OFFLOAD ARCHITECTURE | Non-Final OA | Dell Products L.P. |
| 18600820 | MEMORY SYSTEM AND MEMORY CHIP | Non-Final OA | Etron Technology, Inc. |
| 18594928 | Soc and system operated based on clock signals having different phases | Non-Final OA | DEEPX CO., LTD. |
| 18013748 | COMPUTING APPARATUS, INTEGRATED CIRCUIT CHIP, BOARD CARD, ELECTRONIC DEVICE AND COMPUTING METHOD | Final Rejection | CAMBRICON (XI'AN) SEMICONDUCTOR CO., LTD. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy