DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 4-7 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 2.12.2026.
Claim Rejections - 35 USC § 102 and 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3 and 12-15 are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Song et al. (KR 20190031093 A, machine translation provided).
Regarding claim 1, Song discloses a light emitting diode package (Figs. 3-4), comprising:
a package substrate (201) including a first substrate electrode (211) and a second substrate electrode (213) that are spaced apart from each other;
a light emitting diode chip (120) disposed on the package substrate to be electrically connected to the first substrate electrode and the second substrate electrode; and
an encapsulant (251+253+256 or 256; MPEP 2111) containing a fluorine compound (in 256 – “the moisture-proof layer 256 may include fluorine”) and covering the light emitting diode chip to be at least partially in contact (251+253+256 in direct physical contact or 256 in indirect physical contact) with the light emitting diode chip, and
wherein the fluorine compound (in 256) is contained in the encapsulant (251+253+256 or 256) as a constituent (a component) material of the encapsulant such (MPEP 2112 and/or 2114) that the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip (see below), and
wherein the fluorine compound of includes one or more of fluorinated ethylene propylene (FEP) (“FEP (fluorinated ethylene propylene copolymer)”), hexa fluoro propylene (HFP), penta fluoro propylene (PFP), tri fluoro ethylene (TFTP), tri fluoro chloro ethylene (TFCE), tetra fluoro ethylene (TFE), vinyl fluoride (VF), perfluoro acrylic ester (PAE), acrylic perfluoro alkyl (APA), perfluoro methyl vinyl ether (PMVE), or perfluoro propyl vinyl ether (Figs. 3-4).
Regarding “such (MPEP 2112 and/or 2114) that the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip”, this limitation is drawn to a functional limitation of the claimed encapsulant which does not impart a structural limitation to the claimed package.
Moreover, the examiner takes the position that since the prior art discloses FEP as a constituent of the encapsulant which also claimed by the applicant, then any functional limitation based on this material is inherently met by the prior art. See MPEP 2112 and/or 2114.
In the event “such that the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip” is not inherently met, which the examiner does not concede, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to arrive at the claimed functionality in Song (a) because Song discloses FEP as claimed and/or (b) so as to avoid deterioration of optical reliability (Song – “If the transmittance is less than 70%, the optical reliability due to the decrease in function may be deteriorated.”) and so as to maximize lighting extraction efficiency.
Regarding claim 3, Song discloses the light emitting diode package of claim 1, wherein a separation space (occupied by 131) between (partly between) the first substrate electrode (211) and the second substrate electrode (213) is surrounded by the light emitting diode chip (120) and the package substrate (201), and
wherein the encapsulant is in contact (251+253+256 in direct physical contact or 256 in indirect physical contact) with the light emitting diode chip so as not to be placed in the separation space (since 131 occupies it, Figs. 3-4).
Regarding claim 12, Song discloses the light emitting diode package of claim 1, wherein the first substrate electrode (211) and the second substrate electrode (213) include one or more materials of Au, Pd, Ni, P, Cu, or W (“The pads 211 and 213 are electrode pads and may include at least one of Cu and Au, for example. As the pad, a metal such as platinum (Pt), titanium (Ti), copper (Cu), nickel (Ni), gold (Au), tantalum (Ta), aluminum (Al)”).
Regarding claim 13, Song discloses the light emitting diode package of claim 1, wherein the package substrate (201) further includes a base (201) on an upper surface of which the first substrate electrode (211) and the second substrate electrode (213) are disposed (Figs. 3-4).
Regarding claim 14, Song discloses the light emitting diode package of claim 1, wherein the light emitting diode chip includes:
an electrode pad (one of the layers of 121 and 122, “The first bonding portion 121 and the second bonding portion 122 may be formed ..And may be formed in multiple layers”) electrically connected to the first substrate electrode and the second substrate electrode; and
a bonding agent (another of the layers of 121 and 112) connecting the electrode pad to each of the first substrate electrode and the second substrate electrode (Figs. 3-4, 121 and 122 “may be formed in multiple layers” wherein the examiner takes a part of those multiple layers to be the electrode pad and another of those multiple layers as the bonding agent per MPEP 2111).
Regarding claim 15, Song discloses the light emitting diode package of claim 1, wherein the encapsulant (only as 256 among the options 251+253+256 or 256 of claim 1) has a refractive index of 1.2 to 1.4 inclusive.
Claim 15 refers to a property of the encapsulant. Song discloses the encapsulant (as 256) as “FEP (fluorinated ethylene propylene copolymer)” which is also disclosed by applicant in claim 1.
Since the material of Song matches that of applicant, the examiner takes the position that Song inherently meets “a refractive index of 1.2 to 1.4 inclusive”. See MPEP 2112 and/or 2114.
In the event that Song fails to inherently meet the claimed refractive index, which the examiner does not concede, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to arrive at a value within the claimed range in Song (a) because Song discloses FEP as claimed and/or (b) so as to maximize lighting extraction efficiency.
Claims 1-3, 8 and 12-15 are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Yu et al. (KR 20200129973 A, machine translation provided).
Regarding claim 1, Yu discloses a light emitting diode package (Figs. 1 and 10), comprising:
a package substrate (100) including a first substrate electrode (210) and a second substrate electrode (220) that are spaced apart from each other (Fig. 1);
a light emitting diode chip (300) disposed on the package substrate to be electrically connected to the first substrate electrode and the second substrate electrode (Fig. 1); and
an encapsulant (510+520 or 520) containing a fluorine compound (“the first resin 510 may include a fluororesin-based material” and “the second resin 520 may include a fluororesin-based material”) and covering the light emitting diode chip to be at least partially in contact with the light emitting diode chip (Fig. 1), and
wherein the fluorine compound (“the first resin 510 may include a fluororesin-based material” and “the second resin 520 may include a fluororesin-based material”) is contained in the encapsulant (510+520 or 520) as a constituent (component) material of the encapsulant such that (MPEP 2112 and/or 2114) the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip (see below), and
wherein the fluorine compound of includes one or more of fluorinated ethylene propylene (FEP) (“fluorinated ethylene-propylene (FEP)” disclosed for both 510 and 520), hexa fluoro propylene (HFP), penta fluoro propylene (PFP), tri fluoro ethylene (TFTP), tri fluoro chloro ethylene (TFCE), tetra fluoro ethylene (TFE), vinyl fluoride (VF), perfluoro acrylic ester (PAE), acrylic perfluoro alkyl (APA), perfluoro methyl vinyl ether (PMVE), or perfluoro propyl vinyl ether.
Regarding “such (MPEP 2112 and/or 2114) that the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip”, this limitation is drawn to a functional limitation of the claimed encapsulant which does not impart a structural limitation to the claimed package.
Moreover, the examiner takes the position that since the prior art discloses FEP as a constituent of the encapsulant which also claimed by the applicant, then any functional limitation based on this material is inherently met by the prior art. See MPEP 2112 and/or 2114.
In the event “such that the encapsulant has (at least partly) optical transparency and (at least partly) refracts light emitted from the light emitting diode chip” is not inherently met, which the examiner does not concede, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to arrive at the claimed functionality in Yu (a) because Yu discloses FEP as claimed and/or (b) so as to achieve “high reliability for light emitted from the light emitting device 300 and can transmit the emitted light” as disclosed by Yu and so as to maximize lighting extraction efficiency.
Regarding claim 2, Yu discloses the light emitting diode package of claim 1, wherein the encapsulant (510+520 or 520) has an upward convex shape (Fig. 1).
Regarding claim 3, Yu discloses the light emitting diode package of claim 1, wherein a separation space (occupied by 510) between the first substrate electrode (210) and the second substrate electrode (220) is surrounded by the light emitting diode chip (300) and the package substrate (100), and
wherein the encapsulant (as 520) is in contact with the light emitting diode chip so as not to be placed in the separation space (Fig. 1; for claim 3, the encapsulant is only 520 among the options 510+520 or 520 of claim 1 ).
Regarding claim 8, Yu discloses (Fig. 10) the light emitting diode package of claim 1, further comprising:
a housing (800) disposed on the package substrate (100) and having a cavity in which the light emitting diode chip is placed (Fig. 10),
wherein the encapsulant (510+520 or 520 ) is at least partially placed in the cavity (Fig. 10).
Regarding claim 12, Yu discloses the light emitting diode package of claim 1, wherein the first substrate electrode (210) and the second substrate electrode (220) include one or more materials of Au, Pd, Ni, P, Cu, or W (“the bonding pads 210 and 220 may include at least one metal or alloy selected from Cu, Ti, Au, Ag, Ni, Cr, Ta, Pt, Sn, P, Fe, Al, and Zn”)>
Regarding claim 13, Yu discloses the light emitting diode package of claim 1, wherein the package substrate (100) further includes a base (100) on an upper surface of which the first substrate electrode (210) and the second substrate electrode (220) are disposed (Fig. 1).
Regarding claim 14, Yu discloses the light emitting diode package of claim 1, wherein the light emitting diode chip includes:
an electrode pad (301/302) electrically connected to the first substrate electrode and the second substrate electrode (210/220); and
a bonding agent (410/412) connecting the electrode pad to each of the first substrate electrode and the second substrate electrode (Fig. 1).
Regarding claim 15, Yu discloses the light emitting diode package of claim 1, wherein the encapsulant (510+520 or 520) has a refractive index of 1.2 to 1.4 inclusive.
Claim 15 refers to a property of the encapsulant. Yu discloses the encapsulant (510+520 or 520) as “fluorinated ethylene-propylene (FEP)” for both 510 and 520 which a material also disclosed by applicant in claim 1.
Since the material of Yu matches that of applicant, the examiner takes the position that Yu inherently meets “a refractive index of 1.2 to 1.4 inclusive”. See MPEP 2112 and/or 2114.
In the event that Yu fails to inherently meet the claimed refractive index, which the examiner does not concede, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to arrive at a value within the claimed range in Song (a) because Yu discloses FEP as claimed and/or (b) so as to maximize lighting extraction efficiency.
Claims 8, 9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (KR 20200129973 A, machine translation provided) in view of Hung et al. (of record, US 20170084587 A1).
Regarding claim 8, 9 and 11, Yu fails to disclose (claim 8; alternative rejection) the light emitting diode package of claim 1, further comprising: a housing disposed on the package substrate and having a cavity in which the light emitting diode chip is placed, wherein the encapsulant is at least partially placed in the cavity, (claim 9) the light emitting diode package of claim 8, wherein the encapsulant is provided so that an outer peripheral surface thereof is in contact with an inner surface of the housing and (claim 11) the light emitting diode package of claim 8, wherein the housing is provided so that a distance from a surface of the package substrate to an upper end of the housing is smaller than a distance from the surface of the package substrate to an upper end of the encapsulant.
Hung discloses (claim 8) further comprising: a housing (150) disposed on the package substrate (110) and having a cavity (MPEP 2125; unlabeled in Fig. 1) in which the light emitting diode chip (120) is (partly at least) placed, wherein the encapsulant (130+140) is at least partially placed in the cavity (Fig. 1), (claim 9) wherein the encapsulant (130+140) is provided so that an outer peripheral surface thereof (for example, at 141s or 130s) is in contact with an inner surface of the housing (Fig. 1) and (claim 11) wherein the housing (150) is provided so that a distance from a (topmost) surface of the package substrate (110) to an upper (not an uppermost end, but an upper end at 141s) end of the housing is smaller than a distance from the (topmost) surface of the package substrate to an upper (uppermost) end of the encapsulant (130+140, Fig. 1).
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the arrangement of Hung in Yu and arrive at the claimed invention so as to achieve relieving the deterioration of a packaged LED (Hung, [0005]).
Claims 8-11 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (KR 20200129973 A, machine translation provided) in view of Thompson et al. (of record, US 20160043276 A1).
Regarding claim 8-11, Yu fails to disclose (claim 8; alternative rejection) the light emitting diode package of claim 1, further comprising: a housing disposed on the package substrate and having a cavity in which the light emitting diode chip is placed, wherein the encapsulant is at least partially placed in the cavity, (claim 9) the light emitting diode package of claim 8, wherein the encapsulant is provided so that an outer peripheral surface thereof is in contact with an inner surface of the housing, (claim 10) the light emitting diode package of claim 8, wherein the encapsulant is provided so that an outer peripheral surface thereof is placed outside of the housing and (claim 11) the light emitting diode package of claim 8, wherein the housing is provided so that a distance from a surface of the package substrate to an upper end of the housing is smaller than a distance from the surface of the package substrate to an upper end of the encapsulant.
Thompson discloses (claim 8) further comprising: a housing (“reflector cup 26”) disposed on the package substrate (7) and having a cavity in which the light emitting diode chip (2) is placed, wherein the encapsulant (24) is at least partially placed in the cavity (Fig. 2), (claim 9) wherein the encapsulant (24) is provided so that an outer peripheral surface thereof is in contact with an inner surface of the housing (26, Fig. 2), (claim 10) wherein the encapsulant (24) is provided so that an outer (and upper) peripheral surface thereof is placed outside of the housing (26, Fig. 2) and (claim 11) wherein the housing (26) is provided so that a distance from a (topmost) surface of the package substrate to an upper (most) end of the housing (26) is smaller than a distance from the (topmost) surface of the package substrate to an upper(most) end of the encapsulant (24, Fig. 2).
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the arrangement of Thompson in Yu and arrive at the claimed invention so as to prevent wire sweep (Thompson, [0003-0004]) and/or so as to provide an arrangement for directing light emission in a given direction away from an LED.
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/Primary Examiner, Art Unit 2818