DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
The objection of Claim 5 of the last action is withdrawn. Claim 5 has been amended to overcome its objection.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 16-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ha et al (US 6,841,872 B1-of record, hereafter Ha).
Re claim 16, Ha discloses in FIGS. 4A-4K a method comprising:
forming a first non-conductive layer (105; col. 4, line 48 – col. 5, line 33) over a top side (upper surface) a semiconductor die (100; col. 4, line 48 – col. 5, line 33);
patterning (FIG. 4B; col. 4, line 48 – col. 5, line 33) the first non-conductive layer (105) to form an opening exposing a top surface (upper plane) of a bond pad (103; col. 4, line 48 – col. 5, line 33) of the semiconductor die (100);
forming (FIG. 4D) a metal trace (left 107; col. 4, line 48 – col. 5, line 33) of a redistribution layer (RDL; 1st metal pattern; col. 4, line 48 – col. 5, line 33) over a portion (upper surface) of the first non-conductive layer (105) and exposed top surface (upper plane) of the bond pad (103);
forming (FIG. 4H) a surrounding bump metallization (SBM) structure (left side 109; col. 4, line 48 – col. 5, line 33) on a portion (upper surface) of the metal trace (left 107), the SBM structure (left side 109) including a plurality of vertical metal wall segments (left side left/middle/right 109) surrounding a central opening (space at left side middle 109 between left side left/right 109; see CO in inserted figure below), each vertical metal wall segment (left side left/middle/right 109) separated (isolated) from a neighboring (adjacent) vertical wall segment (109) by way of a vertical gap (unlabeled longitudinal space; see VG in inserted figure below);
forming (FIG. 4I) a second non-conductive layer (135; col. 4, line 48 – col. 5, line 33) over the first non-conductive layer (105) and exposed portions (upper plane beside left side left/middle/right 109 and between adjacent left side left/middle/right 109) of the metal trace (left 107); and
patterning (FIG. 4J; col. 4, line 48 – col. 5, line 33) the second non-conductive layer (135) such that a top surface (upper plane) of the metal trace (left 107) is exposed in the central opening (space at left side middle 109 between left side left/right 109) of the SBM structure (left side 109).
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For the record, the inserted figure (annotated FIG. 4J of Ha) depicts a central opening (CO) of vertical metal segments (109), with vertical gaps (VG) separating the vertical metal segments (109).
Re claim 17, Ha discloses the method of claim 16, further comprising placing (FIG. 4K) a ball connector (111; col. 4, line 48 – col. 5, line 33) into the central opening (space at left side middle 109 between left side left/right 109) of the SBM structure (left side 109) such that the plurality of vertical metal wall segments (left side left/middle/right 109) substantially surround (within the space at left side middle 109 between left side left/right 109) the ball connector (111).
Re claim 18, Ha discloses the method of claim 17, further comprising reflowing (FIG. 4K; col. 4, line 48 – col. 5, line 33) the ball connector (111) such that conductive material (solder paste; col. 4, line 48 – col. 5, line 33) of the ball connector (111) wets (connects electrically; col. 4, line 48 – col. 5, line 33) to the entire inner (all of) inner sidewalls (left/right vertical planes) of the plurality of vertical metal wall segments (left side left/middle/right 109) of the SBM structure (left side 109) and to the portion (upper surface) of the metal trace (left 107).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2, 4-8; 10-11, 13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over YU (US 2015/0340329 A1-of record, hereafter Yu) in view of Ha et al (US 6,841,872 B1-of record, hereafter Ha).
Re claim 1, Yu discloses in FIGS. 1-11 a method comprising:
forming a first non-conductive layer (26; [0021]) over a top side (upper surface) semiconductor die (100; [0014]);
patterning (FIG. 1) the first non-conductive layer (26) to form an opening (26a; [0021]) exposing a top surface (upper plane) of a bond pad (22; [0021]) of the semiconductor die (100);
forming (FIG. 2) a metal trace (Cu, Al or Cu alloy 28; [0023]) of a redistribution layer (RDL: PPI; [0023]) over a portion (around 26a) of the first non-conductive layer (26) and exposed top surface (upper plane) of the bond pad (22); and
forming (FIG. 3) a surrounding bump metallization (SBM) structure (32; [0025] and [0027]) on a portion (28P; [0023]) of the metal trace (Cu, Al or Cu alloy 28), the SBM structure (32) including a plurality of (at least 2; [0025]) vertical metal wall segments (left/right 32) surrounding a central opening (32G; [0025]).
Yu fails to disclose the method further comprising: forming a second non-conductive layer over the first non-conductive layer (26) and exposed portions of the metal trace (Cu, Al or Cu alloy 28); and patterning the second non-conductive layer such that a top surface of the metal trace (Cu, Al or Cu alloy 28) is exposed in the central opening (32g) of the SBM structure (32).
However,
Ha discloses in FIGS. 4A-4K a method comprising:
forming (FIG. 4I) a second non-conductive layer (135; col. 4, line 48 – col. 5, line 33) over the first non-conductive layer (105) and exposed portions (upper plane beside left side left/middle/right 109 and between adjacent left side left/middle/right 109) of the metal trace (left 107); and patterning (FIG. 4J; col. 4, line 48 – col. 5, line 33) the second non-conductive layer (135) such that a top surface (upper plane) of the metal trace (left 107) is exposed in the central opening (space at left side middle 109 between left side left/right 109; see CO in inserted figure above) of the SBM structure (left side 109).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Yu by adding the forming a second non-conductive layer over the first non-conductive layer and exposed portions of the metal trace; and patterning the second non-conductive layer such that a top surface of the metal trace is exposed in the central opening of the SBM structure of Ha, thereby improving adhesion strength between the ball connector and a package body. As a result, the ball connector is prevented from separating from the package body, thereby improving reliability of the semiconductor package (col. 5, lines 33-42).
Re claim 2, Yu discloses the method of claim 1, further comprising placing a ball connector (34 in FIG. 4; [0028]) into the central opening (32G) of the SBM structure (32) such that the plurality (at least 2) of vertical metal wall segments (left/right 32) substantially surround (within 32G) the ball connector (34).
Re claim 4, Yu discloses the method of claim 2, further comprising reflowing ([0029]) the ball connector (34) such that conductive material (solder; [0029]) of the ball connector (34) wets to (contacts) the entire (all of) inner sidewalls (left/right vertical planes) of the plurality (at least two) of vertical metal wall segments (left/right 32) of the SBM (32).
Re claims 5-7, Yu discloses the method of claim 1, wherein each of the vertical metal wall segments (left/right 32) of plurality (at least two) of vertical metal wall segments (left/right 32) is separated from a neighboring (adjacent) vertical metal wall segment (right/left 32) by a respective gap (32G/32E; [0035] and [0040]), the gap (32G/32E) having a predetermined lateral dimension (W2; [0035] and [0040]); wherein the predetermined lateral dimension (W2) of the gap (32G/32E) is substantially 10 microns or greater (150-450 µm; [0035]); and wherein the gap (32G/32E) extends vertically (upwardly) from the portion (28P) of the metal trace (28) to a top (upper plane) of the plurality (at least two) of vertical metal wall segments (left/right 32).
Re claim 8, Yu discloses the method of claim 1, wherein forming the SBM structure (32) includes forming the plurality (at least two) of vertical metal wall segments (left/right 32) as electroplated copper pillars (as in 28; [0023] and [0027]).
Re claim 10, Yu discloses in FIG. 6 a semiconductor device comprising:
a first non-conductive layer (26; [0021]) over a top side (upper surface)
semiconductor die (100; [0014]), an opening (26a; [0021]) in the first non-conductive layer
(26) exposes a top surface (upper plane) of a bond pad (22; [0021]) of the semiconductor die (100);
a metal trace (Cu, Al or Cu alloy 28; [0023]) of a redistribution layer (RDL: PPI; [0023]) formed over a portion (around 26a) of the first non-conductive layer (26) and exposed top surface (upper plane) of the bond pad (22); and
a surrounding bump metallization (SBM) structure (32; [0025] and [0027]) formed on a portion (28P; [0023]) of the metal trace (Cu, Al or Cu alloy 28), the SBM structure (32) including a plurality of (at least 2; [0025]) vertical metal wall segments (left/right 32) surrounding a central opening (32G; [0025]).
Yu fails to disclose a second non-conductive layer over the first non-conductive layer (26) and exposed portions of the metal trace (Cu, Al or Cu alloy 28), the second non-conductive layer patterned such that a top surface of the metal trace (Cu, Al or Cu alloy 28) is exposed in the central opening (32g) of the SBM structure (32).
However, Hu renders these limitations obvious as discussed above for claim 10, claim 16, and the inserted figure above.
Re claim 11, Yu discloses the semiconductor device of claim 10, wherein the plurality of vertical metal wall segments of the SBM structure are formed as electroplated copper pillars (see claim 8).
Re claim 13, Yu discloses the semiconductor device of claim 10, further comprising a reflowed ball connector surrounded by the plurality of vertical metal wall segments such that conductive material of the ball connector is wetted to the inner sidewalls of the plurality of vertical metal wall segments and to the portion of the metal trace (see claims 2 and 4).
Re claim 15, Yu discloses the semiconductor device of claim 10, wherein each vertical metal wall segment of the plurality of vertical metal wall segments is separated from a neighboring vertical wall segment by way of a gap, the gap having a predetermined lateral dimension (see claims 5-6).
Claims 3; 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Yu and Hu as applied to claim 2 above, and further in view of CHEN et al (US 2013/0221522 A1-of record, hereafter Chen) and NOH (US 2019/0096836 A1-of record, hereafter Noh).
Re claims 3; 12 and 14, Yu and Hu disclose the method of claim 2; and the device of claim 10, wherein a horizontal width or diameter (W2; [0035] and [0040]) of the central opening (32G/32E) is substantially 10 microns or greater (150-450 µm; [0035]).
But, fails to disclose wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is approximately in a range of 40% to 60% of a largest diameter of the ball connector (34); wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is substantially in a range of 40% to 60% of the horizontal width or diameter (W2) of the central opening (32G/32E); and wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is at least 50% of a maximum height dimension of the reflowed ball connector (34).
However,
A. Chen discloses in FIG. 4A a device comprising a reflowed ball connector (401; [0034]-[0035]) with a largest diameter of 246 µm ([0035]) and a maximum height dimension of 216 µm ([0035]).
And,
B. Noh discloses in FIG. 1 a device comprising a height dimension (Hc; [0033]) of a plurality of vertical metal wall segments (left/right Cu 230; [0029]) is approximately in a range of 40% to 60% (50% to 70%; [0033]) of a height (Hb; [0033]) of a bump connector (220; [0033]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method and the device of Yu by using the reflowed ball connector largest diameter of 246 µm and the maximum height dimension of 216 µm, as disclosed by Chen, to determine the minimal pitch required to prevent shorting (Chen; [0038]), and by using the height dimension of a plurality of vertical metal wall segments to approximately in a range of 40% to 60% (50% to 70%) of a height of a bump connector, as disclosed by Noh, with Chen, to maintain an adhesion force between the ball connector and a package substrate (Noh; [0006]), wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is approximately in a range of 40% to 60% of a largest diameter of the ball connector (34); wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is substantially in a range of 40% to 60% of the horizontal width or diameter (W2) of the central opening (32g/32e); and wherein a height dimension of the plurality of vertical metal wall segments (left/right 32) is at least 50% of a maximum height dimension of the reflowed ball connector (34).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ha in view of Yu.
Re claims 19-20, Na discloses the method of claim 16.
But, fails to disclose wherein the vertical gap (unlabeled longitudinal space; see VG in inserted figure above) is formed having a predetermined lateral dimension, the predetermined lateral dimension substantially 10 microns or greater; and wherein the plurality of vertical metal wall segments of the SBM structure are formed as electroplated copper pillars.
However,
Yu discloses wherein a vertical gap (32G/32E) is formed having a predetermined lateral dimension (W2), the predetermined lateral dimension substantially 10 microns or greater (see claims 5-6); and wherein a plurality of vertical metal wall segments (left/right 32) of a SBM structure (32) are formed as electroplated copper pillars (see claim 8).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Ha by using the vertical gap formed having a predetermined lateral dimension, the predetermined lateral dimension substantially 10 microns or greater; and wherein the plurality of vertical metal wall segments of the SBM structure are formed as electroplated copper pillars of Yu, in order to form positioning members configured to limit bump movement after the bump is disposed over the RDL so as to retain the bump at a predetermined position (Yu; Abstract).
Response to Arguments
Applicant's arguments filed 6/22/2026 have been fully considered but they are not persuasive for the following reason(s):
Firstly, with respect to claim 16, the applicant argues against the examiner’s interpretation of Ha disclosing the claimed limitations of forming a surrounding bump metallization (SBM) structure on a portion of the metal trace, the SBM structure including a plurality of vertical metal wall segments surrounding a central opening, each vertical metal wall segment separated from a neighboring vertical wall segment by way of a vertical gap; forming a second non-conductive layer over the first non-conductive layer and exposed portions of the metal trace; and patterning the second non-conductive layer such that a top surface of the metal trace is exposed in the central opening of the SBM structure.
For clarity, the examiner’s current rejection, maintained from the last action, includes an annotated figure which depicts the central opening and the vertical gap of Ha. The depiction is appreciably identical the cross-sectional view of applicant’s FIG. 8, with Ha’s cross-sectional view including a center vertical wall segment not depicted in FIG. 8. However, this distinction does not preclude Ha from disclosing the claimed limitations of a central opening and a vertical gap, which when taken together with the additional method steps of Ha discussed above, result in the limitations in question being disclosed.
With respect to device claims 1, now amended to include limitations with respect to a central opening and a vertical gap (claim 9 limitations have been incorporated into claim 1), similar arguments have been presented against Yu in view of Ha. Thusly, the examiner, again, directs the applicant to the inserted figure and the rational of the rebuttal for claim 16 for the current rejection of claim 1.
Lastly, claim 10 has been amended to include the limitations of claim 9, as in claim 1, and its current rejection, too, is deemed proper based on the rational for maintaining the rejection of claim 16, and similarly claim 10.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408)918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC W JONES/Primary Examiner, Art Unit 2892
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